FR2487575A1 - METHOD FOR MANUFACTURING POWER TRANSISTORS HAVING ELECTRON IRRADIATION-MODIFIED PARAMETERS - Google Patents

Abstract

THE PROCESS FOR REDUCING THE STORAGE TIME OF THE CHARGES AS WELL AS THE GAIN PARAMETERS IN A SEMICONDUCTOR TRANSISTOR INCLUDES, IN ACCORDANCE WITH THE PRESENT INVENTION, A PHASE OF IRRADIATION OF THE TRANSISTOR WITH A PREDETERMINED DENSITY OF ELECTRON FLOWS TO OPTIMIZE THE RELATION BETWEEN GAIN AND STORAGE TIME.

Description

Process for manufacturing power transistors

  parameters modified by irradiation of electrons.

  The present invention relates to transistors irradiated with electrons and relates more particularly to power transistors. Among the important performance parameters included in the specifications for high-power semiconductor transistors are the time of storage of charges and the gain hfe * The parameter t5 relative to the storage time is a function of the duration of current carriers of the current in the semiconductor material which comprises the metallurgical collector of the transistor. The lifetime r

  is the characteristic of a semi-

  driver commonly referred to as the average time of

  where a surplus current carrier exists in

  a region before ceasing to be an excess current carrier

  dental (typically by recombination).

  In current processing methods, it is difficult to adjust the service life in the collectors of the power transistors. Typically, 7Y varies by more than a factor of 2, for example from 20ps to 40sec even in a group of semiconductor wafers having undergone the same processing phases. This variation of 1r reflects a variation of the storage time ts. The variation of ts is harmful in many applications o circuit settings may be necessary:

  to compensate for variations in ts from one device to another.

  In addition, many applications require limitations with respect to maximum storage time in conjunction with limits for minimum gain.

  The object of the present invention is to modify the para-

  meters of transistors by irradiation.

  The present invention generally resides in a method for manufacturing transistors whose electrical parameters have been modified in comparison with those of the initial transistors, this method consisting in: determining an electron radiation dosage during a first batch of tests of the transistors to satisfy given characteristics of gain and storage time by measuring at least one of the characteristics of the transistors of the first batch; positioning a surface of at least one of the semiconductor devices of a second batch of initial transistors for radiation exposure; and irradiating the above-mentioned semiconductor device or each semiconductor device of said second batch with electrons brought to the level of radiation energy such that

  set during the determination phase.

  According to the teachings of the present invention, the relationship that exists in a semiconductor transistor between the hfe gain and the storage time can be improved.

  in order to situate this relationship within specific limits.

  definite fications (maxima and minima). If the transistor can be characterized by a lifetime r, a variation of this lifetime OY causes a variation of the gain hfe as well as the storage time t according to a predetermined function of this lifetime 'Y. In particular, a reduction in storage time ts (and gain h f e) can be obtained by irradiating the transistor with a predetermined radiation density, this level of radiation density being proportional to the product.

  the intensity of the flux by the total time of exposure.

  More particularly, the transistor may be characterized by a gain h0 and a storage time t 0 and if a particular design fe mi application requires a minimum gain hmin and a maximum storage time t max (h 0> h min and t max> t max), Thus, while irradiating the transistor with a predetermined level of electron density determined and specified by the teachings of the method of the present invention, the storage time of the transistor can be reduced to a lower or equal value. However, by irradiating the transistor with a predetermined level of electron density as determined and specified by the teachings of the present invention, it can be reduced by maintaining a gain value equal to or greater than h.in.

  at a minimum the storage charge times of the transistor while at the same time

  However, in general, the process of the present invention relates to any method by which it is desired to

  decrease the gain or decrease the storage time of a quantity

specificity.

  In addition, this method can be used to decrease the range of storage time values in a group or series of fabricated transistors. A particular series of transistors may be characterized by a range At0 of storage time values s between a lower value t0 and a higher value th. If a particular design application requires a maximum range of storage time values among a series of transistors, then the transistors can be irradiated with an electron density level determined and specified by the teachings.

  of the process of the present invention, reduce the range of values.

  storage time until it is less than or equal to tmax while maintaining a transistor gain value greater than or equal to hmfen The present invention will now be described with reference to the accompanying drawings, in which: FIG. 1 is a graph showing the relationship between lifetime and electron density; Fig. 2 is an isometric view of a transistor to which the method of the present invention is applied; Fig. 3 is a plot of the impurity concentration versus distance from the base-collector p-n junction in the collector of the transistor of Fig. 2; Figure 4 is a sectional view of the transistor of Figure 2; Figure 5 is a circuit for determining the storage time of the transistor of Figures 2 and 4;

  Figure 6 is a timing chart for the function

  circuit of Figure 5; Fig. 7 is a graph showing the relationship between the lifetime and the incurring gain; Fig. 8 is a graph showing the relationship between service life and storage time; and Figure 9 shows a particular apparatus for

  be used with the process of the present invention.

  Figure 1 is a log-log graph showing the relationship between

  between the effective lifetime t of the current carriers in a bipolar transistor and the density or dosage of electrons to which the transistor is exposed for various initial lifetimes j /. This relationship is well known and is

  represented and explained in an article written by P. Rai-

  Choudbury et al, "Electron-Minority Carrier Lifetime Control" in "IEEE Transactions in Electron Devices", Volume ED-23,

No 8, Aoft 1976.

  This relationship can be written as: Te1 10 K- 0e # (1) e o: 7 is the lifetime in seconds (s) after irradiation; e is the lifetime in seconds (s) before irradiation; K 'is the coefficient in cm (e-S) of damage by radiation;

2

  2e is the electron density in e / cm2.

  More directly: te = (2) 1+ K'ee oe can be expressed as a function of the product of time t (in seconds) during which the transistor is exposed to radiation by the flux density e of this radiation, so that: Xe = f (the t) (3)

  Figure 1 includes several curves from 11 to 19

  trant, for various dosages or flux densities Xe, the variation; o in the case of a transistor having an initial lifetime te current carriers. For example, curve 11 of FIG. 1 shows the variation of 2 in the case of a transistor having an initial lifetime of 10 s. After having been exposed to a flux density of 1013 electrons / cm 2, the lifetime of the electron carriers is 5.50 μs, as shown by curve 11. As another example, the curve 19 of Fig. 1 shows the variations of 7v for a transistor having an initial lifetime of 100 ps. After exposure to a flux density 95 of 10 electrons / cm 2, the service life of the current carriers is 10,701s as shown. The various other curves 12 to 18 shown in FIG. 1 furthermore show the effect of exposure to a range of electron densities of a bipolar transistor having different initial lifetimes. It can be seen from curves 11 to 19 in FIG. 1 that the lower the initial lifetime 0 for a given transistor, the lower the reduction (w w-te) of

  the lifetime of the current carriers.

  The glossary of variables and constants and the index of relations and equations given below will be used to facilitate the understanding of the relationships and equations explaining the process of this paper.

invention.

  Glossarpe of variables and constants AB metallurgical base area (in cm2 A = metallurgical emitter surface (in cm 2 DB = effective diffusion coefficient of electrons in metallurgical base (dimensionless) DC = diffusion coefficient of majority carriers at high levels in the collector (in cm / second) DCo = diffusion coefficient of the majority carriers at low levels in the collector (in cm 2 / second) D = diffusion coefficient of the electrons, generally speaking, in a layer semiconductor D = DB in the base layer 114 Dn = DCo in the low-level collector layer 120 D = DC in the high-level collector layer 120 hB = recombination parameter for the base (in cm 4 / sec ) hC = recombination parameter for the collector (in cm 4 / sec) hE = recombination parameter for the emitter (in cm4 / sec) hFEO = gain and peak current (common emitter assembly) (dimensionless) hfey = gain limited useful or transmitter efficiency IB = base current (in amperes (A)) IBF = direct base current (in amperes (A)) IBR = reverse base current (in amperes (A)) IC = collector current ( in amps (A)) k = Boltzmann constant = 8.62 x 10-5 eV / KK '= radiation damage coefficient in cm2 (eS) NA = density of acceptors in the base (in cm 3) NC = density of the donors in the collector n (in cm-3) Nw (O) = concentration of the carriers in excess of the junction

+ -3

  nn 124 at t = 0 (in cm) in a classical saturation q = charge of electrons in coulombs = 1.6 x 10-19 coulombs T = absolute temperature in Kelvin degrees in the active region of the transistor tS = charge storage time (in seconds) VCE = collector-emitter DC voltage (in volts) WBO = active base width (in cm) Wc = width of the collector n region (in cm) WCIB = current-induced base width ( in cm) "C = mobility at low levels for the majority carriers in silicon (in cm / Vs) N = lifetime in the collector region n 122 e = lifetime after irradiation (in seconds (s)) Tre = lifetime before irradiation (in seconds) Me = electron density (in e / cm) Index of equations and WC equations IchEWc B = (hB + hC r (hB + h) qA D hB + fl) 7 BC BC

C = 2 N -

  qAB (hB + hC) hFE0 4D '' c) C EOC I C E (WC / Dc) 2 h ++ h 4 E2 (hB + hc) 4q AEAB IBF IC

= DC / CO

Dco = kTPCO / q

I0 WC

Nw (O) = 2 + -

  a VCENCWC QO (4kT / q) QB J NA dx o 2W WPB QB NA dxD DB Dn o WCIB = WC (11-IO / IC) Figure 2 is an isometric view of a transistor 100 without metallization, this transistor 100 being used in the process of the present invention. We can refer to this o

  transistor 100 to explain the variables of the glossary

  above. The silicon transistor 100 has an upper surface 100 and a lower surface 102 between which there is a n-type emitter layer 110 forming a p-n junction 112 with a p-type base layer 114. The collector 120 includes an n-type layer 122 and a layer 126 adjacent thereto, these two layers together forming an n-n boundary 124. The n-type layer 122 forms a p-n 128 junction with the p-type base layer 114. The base area AB is the area covered by the junction p-n 128 and is represented by a first hatched area in Figure 2. The emitter area AE is the area covered essentially by the lower area.

  of the n + 110 transmitter, that is to say essentially the super-

  covered by current flowing through junction p-n 112.

  The AB area is typically about twice the value of the AE area. The width WCIB is the distance which, in the layer n 122 separates the junction

  p-n 128 of a line 130 o the excess carrier concentration

  in layer n 122 is zero. The width WCO is the distance which, in the base p 114, separates the junction p-n 128 from a line 132 tangent to the lower part of the junction p-n 112. The width Wc is the width of the region 122 of

n type collector.

  Measurements of the physical properties of transistor 100 include diffusion coefficients DB, DE, and COD, recombination parameters hB, hC, and hE, impurity concentrations NA and NC, and CO mobility at low levels. The

  m bilit / o0 at low levels is a physical property of -

  some semiconductor materials measured in cm2 / V-sec. Mobility / LCO at low levels for majority carriers in silicon is 1300 cm 2 / V-sec. for a npn transistor. The diffusion coefficients DC and D0 are function del40 as indicated in the index above. The recombination parameters hB, hC and hE each represent the measurements of the effects of

  recombination of minority carriers in the

  doped for the respective regions of the transistor 100.

  Each of the recombination parameters can be expressed by Deff Nh eff eff o: Deff = effective diffusion coefficient for the minority carriers; Leff = effective diffusion length for minority carriers; and Neff = effective concentration of the majority carriers Figure 3 is a graph in which the ordinate axis 50 represents the impurity concentration and the abscissa 60 represents the distance from the pn base-collector 128 in the collector of transistor 100 of FIG. 2. The graph of FIG. 3 comprises curves 51 and 52 showing, respectively, the concentration of impurities n (electrons) and p (holes) in collector layer n 122 for the state of direct polarization. during a typical saturation as a function of the distance to the pn junction 128. A typical saturation depicts a state in

  which junction p-n 128 is polarized everywhere in the direct direction.

  The slope of the curves 51 and 52 is determined by the current density in the collector 120. The graph of FIG. 3 also includes curves 53 and 54 respectively showing the concentration of impurity n and p in the layer 122 of the collector forward bias state during near-saturation as a function of distance from pn junction 128. Near saturation depicts a state in which pn junction 128 is forward-biased only under transmitter 110 but is polarized in opposite directions everywhere else. Line 55 in broken lines

  designates the interface n-n + 124. Curve 53 tilts negatively

  a certain distance in the collector n 122, which reflects a decrease in the concentration of impurities n (electrons) .After a distance equal to the width WCIB, the slope of a curve 53 becomes zero, which reflects a constant concentration. in impurities n (electrons) equivalent to the NC property. The difference between the concentration N and the impurity concentration n (electron 5) at the interface nn 124 expresses the concentration N (0) in excess carriers at the junction nn (W) 124. FIG. 4 is a sectional view through IV-IV of the transistor of FIG. 2. FIG. 4 shows a metallization which has been carried out on the transistor 100 to obtain a complete device in working order. A base electrode 140 of metal and of a thickness of 8pum is disposed on the exposed surface of the base layer 114 and may be constituted

  by any conductive metal but aluminum is pre-

  preferable. An emitter electrode 144 of metal and a thick

  8) um is placed on the exposed surface of the

  110 and can have the same composition as the elec-

  trode 140. A molybdenum piece 146 having a thickness of 0.15 mm is disposed on the emitter electrode 144 and a molybdenum piece 148 having a thickness of 0.76 mm is disposed on the uncovered surface. of the n + layer 126 for

  form a collector electrode.

  FIG. 5 shows a circuit for determining the charge storage time tsof transistor 100. On the

  Figure 5, the same references designate the corresponding parts

  of previous figures. A resistor RL is mounted between a supply source Vcc and the collector electrode 148. The emitter electrode 146 is connected to ground and

  the base transmitter 140 is connected to a current source i Bt>.

  The current source iB (t) comprises, on the one hand, electric power sources V1 and V2 each comprising a positive terminal and a negative terminal and, on the other hand, resistors

  R1 and R The current source i B (t) also includes a

  unipolar S1 controller with two directions comprising a pole P1 and pinsIrl and 7r2. The negative terminal of the source

  electrical energy V1 is connected to ground and the posi-

  This source is connected to one of the ends of the resistor R. The other end of the resistor R is connected to the pad t7 of the switch. The positive terminal of the energy source V2 is connected to ground and the negative terminal of this

  source is connected to one of the ends of the resistor R2.

  The other end of the resistor R2 is connected to the pad / 72 of the switch. The charge storage time is the period of time required for the collector current IC to decrease

  up to a value of 0.9 IC after a current of polarity

  IBR has been applied to transistor 100. FIG. 6 shows a time diagram for determining the storage time ts in the case of transistor 100. Curves 150 and 152 show the instantaneous values i C (t) and iB ( t) the collector current and the base current, respectively. At a time it to, a forward direction bias current IBF is applied to the base electrode 140 of the transistor 100 as represented by the curve 152 of FIG.

  this results in a current IC in the electrode of col-

  148. At time t1, the reverse bias polarization current IBR is substituted for the base current IBF as shown in curve 152 in Fig. 6 at time t1. The collector current IC decreases to a value equal to 0.9 IC at a time t2. The period of time elapsing between the

  moment t1 and the moment t2 is the storage time ts.

  It has been determined that there is a relationship between the current gain hfe and the lifetime N of the carriers in the collector feeder. The relationship is illustrated by curve 30 in FIG. 7. The equation from which is calculated or plotted curve 30 is: hfe = f (N) = hfeY / 1 + (4) oh hfe0 (5) hfeY QODB (I 2 + I 2

1 + C)

QBD * \ i - C and

2

  hfe (WCIB / (4DcrN) (6) where the variables, constants and relationships in equations (4), (5) and (6) are given in detail in the above glossary of variables and constants as well as in the above index of relations and equations In a more direct way, the relation between the gain hfe, the density Me of electrons and 7 "o can be expressed as follows: o hfeY hfe = f (e 2 f7e)) + ciBhfe (y (1+ K'De) 4DCN For the curve 30 plotted in FIG. 7, the variables of equation (7) have the following values:

IC = 50 A

2.5 V VCE

  hE = 2 x 10-14 cm 4 / S AE = 1 cm 2 WC = 50 x 104 cm Nc = 1.4 x 1014 cm-3 hfeO = 25 It was also determined that there is a relationship between the storage time ts in a transistor and the duration

  of actual life7B transit in the base of the same transistor.

  Figure 8 is a graph containing a curve 40 which

  shows the relation between t and 7B in a transistor. The equation

  s B tion from which the curve 40 is plotted is = Ir lnNW (O) Wc (AB / AE) ts = f <7.) = 7'B in (8 s fB) B 1) Nw (o) wc IBRrB () L2 + qAE and o IC i-- IC NW (O) Wc (9) where variables, constants and relationships in

  equation (8) are given in detail in the lossaiâ-e ci-

  above variables and constants as well as in the index

  above relations and equations.

  More directly, equation (8) can be expressed as a function of the electron density and the initial lifetime N: N 9rN (1 + Nw (O) Wc (AB / AE)) (l + tNK ' ## EQU1 ##

  For the curve 40 plotted in FIG. 8, the varia-

  equation (9) have the following values:

IC = 50A

BFP IBR 4A

  hE = 2 x 10-14 cm-4 / S hB + hC = 2hE AE = 1 cm2 WC = 50 x 10-4 cm Nc = 1 4 x 1014 cm-3 Based on equation (1) and 11 to 19 of FIG. 1, a determined dosage of radiation can be used to decrease the YN lifetime, and then the lifetime can be used to calculate the relationship between the radiation dosage and the hfe gain at using equation (7) and Figure 7 as well as the relationship between radiation dosage and storage time ts using the equation

(9) and Figure 8.

  The following example is intended to illustrate and clarify the process of the present invention:

EXAMPLE

  A particular design application requires,

  ie, specifies: hD hfe 10 (minimum gain) tD 2 us (maximum storage time); and tS a particular manufacturing process gives a group or series of transistors having a useful life 0 of the carrier o:

2'-0 40Ops.

  From equations (7) and (9) and curves 30 and 40, we deduce: h = 11.9 (gain of the group of transistors after the fe fe manufacturing process); t0 = 3.3Js (charge storage time of the transistors after the manufacturing process); o do h exceeds the specified or required gain hfe but tO is greater than the specified storage time t but does not meet the design requirements. Assuming that we want the

  series of transistors has features of

  such that the hf6 gain after irradiation is as large as possible, although the storage time t5e is reduced after irradiation to the point of satisfying the design requirements (te td), one can determine or calculate the appropriate dosage Se using the curves 16 and 40 and equation (1) and equation (8) or (9), respectively, with which curves 16 and 40 are obtained. For a storage time of 2 / s after irradiation, it is necessary to obtain, after irradiation, a lifetime e such that: e te = 1 s, this relationship being obtained using curve 40 of FIG. In FIG. 1, curve 16 represents the relationship between the irradiation lifetime 7e and the radiation dosage for a transistor having an initial life O0 such that:

% 40 = 40 ps.

  Examining curve 16 of FIG. 1, it can be seen that the appropriate dosage of radiation required to provide a lifetime of 10 ps is about 8 x 1012 electrons / cm which in turn causes a storage time kills after irradiation of 2 / 1s. Examining curve 30 of FIG. 7, it can be seen that for a lifetime of 11s, the gain hbe for a transistor of the series of this example (1) is reduced from 11.9 to 10.6, after irradiation gain is the largest possible gain given for a storage time e2 ps required by the design specifications for one s

initial hfe gain of 11.9.

  Continuing with the design specifications and operating characteristics of the transistors of this example (1) and assuming that it is desired that this series of transistors of this example (1) exhibit operating characteristics such as storage time after irradiation is as low as possible while maintaining the gain hf8 after irradiation at a value greater than or equal to the specified design gain, the appropriate dosage of radiation can be determined using curves 16 and 40 and equations (1) and (7), respectively, from which are obtained the curves 16 and 30. For a gain hOs of 10 after irradiation, it is necessary after irradiation a lifetime 7 such that e te = 8 jas, this relationship being obtained with the aid of the curve 30 of FIG. 7. By examining the curve 16, it can be observed that the appropriate dosage Xe of radiation necessary to bring about a lifetime of 8 "s is approximately 1,015 x 10 13 e / cm 2

  which, in turn, results in a hOS gain of 10 after irradiation.

  Examining the curve 40 of FIG. 8, it can be observed that for a lifetime e of 8 pus, the storage time for a transistor of the series of this example (1) is reduced by 3.3 ps at one time. storage charge after irradiation of 1.5 ps which is the minimum possible storage time t e for a transistor of the series of this example (1) with a given gain h O 8 2 10 and with the given initial conditions = 11, 9 fe fe

and ts = 3.3 3ps.

  FIG. 9 shows a preferred method of irradiating the transistor 100 of FIGS. 2, 4 and 5. The apparatus of FIG. 9 comprises an irradiation means 60 for providing a radiation 62 of electrons, the electrons of said radiation being at an energy level of about 2 MeV, but, anyway, the energy level of said radiation must be sufficient to change the lifetime or recombination time in the collector layer 122. A conveyor belt 64 on which the transistor 100 is placed is placed under the irradiation means 60. The transistor 100 must be oriented so that its upper surface 101 is first exposed to the radiation 62. The belt 64 must be moved at a predetermined speed so that the total time that transistor 100 is exposed is sufficient to give exposure to a density

predetermined electrons.

  Although the present invention has been described in the case of its preferred embodiment, it goes without saying that this

  description is given for illustrative purposes only and

  non-restrictive and that variants or modifications may be

  be made within the scope of the present invention.

  It will be appreciated by those skilled in the art that the process of the present invention can be carried out in a variety of ways and can take various forms and applications other than those previously described. For example, the method of the present invention may be implemented in the case where a particular design application requires a storage time td, such that ds = t5so eo tso = specified storage time and td tlJ2s and a manufacturing method particular of a group or series of transistors having a range of duration of viero method in which is determined, for example, by analysis

  statistic that the variation in storage times of trans-

  tor manufactured exceeds the required variation.

  In addition, the process of the present invention is applied

  to npn transistors so that at the places of the description

  In the preceding discussion of acceptors and donors, donors and acceptors should be substituted, respectively, if a transistor is used.

  of the pnp type. In addition, at the places of the description which

  precedes that one refers to electrons and holes, it would be necessary to substitute holes and electrons, respectively,

  in the case where one would use a pnp type transistor.

  It is important to note that although an electron irradiation means is used to explain the process of the present invention, this means is given only for purely illustrative and non-limiting purposes. Other conventional means of irradiation, (for example proton irradiation means) can be envisaged and, in fact, the scope of the present invention includes any means for modifying the lifetime of carriers in transistor A

  semiconductors, for example doping with gold.

Claims (4)

  1. Process for manufacturing transistors whose parameters   meters have been modified compared to those of   initial processes, characterized in that it consists in: determining an electronic radiation dosage in a first test batch of transistors to satisfy given characteristics of gain and storage time of   by measuring at least one characteristic of the tran-   sistors of the first batch; positioning a surface of at least one of the semiconductor devices of a second batch of initial transistors for radiation exposure; and irradiating the aforementioned semiconductor device or each semiconductor device of said second batch with   electrons at the radiant energy level deter-   during the determination phase.   2. Method according to claim 1, characterized in that the determination of the energy level comprises the   measuring the gain and the charge storage time of the transistors   irradiated wires of said first test batch.   3. Process according to claims 1 or 2, characterized   in that the radiation is determined by establishing the useful limited gain or emitter efficiency, the base width induced by the current, the lifetime before irradiation, the radiation damage coefficient and the diffusion coefficient of majority carriers at high levels in the collector, dividing the useful limited or issuer yield gain by 1 plus a first quantity equal to the quotient between, on the one hand, the base width multiplied by the limited gain multiplied by a second quantity equal to 1 plus the lifetime before irradiation multiplied by the radiation endomotion coefficient multiplied by the electron flux density, and on the other hand, four times the diffusion coefficient of the majority holders multiplied by the duration of life before irradiation.   4. Process according to any one of the claims   characterized in that the charge storage time is determined by the lifetime before irradiation divided by a third quantity equal to 1 plus the lifetime multiplied by the damage coefficient of the radiation multiplied by the density of the electron flow, said third quantity being multiplied by the natural logarithm of a fourth quantity equal to the quotient between a fifth and sixth quantity, said fifth quantity comprising   a seventh quantity equal to 1 plus the concentration in   saturation excess multiplied by the width of the collector region multiplied by the quotient of the area of the metallurgical base divided by the area   metallurgical emitter, this seventh quantity being multi-   folded by 1 plus the product of the service life before irradiation   by the radiation damage coefficient and the electron flux density, said sixth quantity comprising   an eighth quantity equal to the quotient of a collector current   given multiplied by the width of the collector squared divided by four times the electron charge multiplied by the diffusion coefficient of majority carriers at high levels in the collector multiplied by the area   of the metallurgical emitter, the quotient just mentioned   multiplied by 1 plus the product of the lifetime before irradiation and by the radiation damage coefficient as well as by the electron flux density, said sixth quantity further comprising said eighth quantity plus the product of the base reverse current by the lifetime before irradiation divided by the multiplied electron charge   by the area of metallurgical emitter.