FR2470495A1 - Digital switching for telecommunications conference system - uses processor to control ports for routing data to required destination - Google Patents

Abstract

A conference system for telecommunications terminals operating in a simultaneous bidirectional mode is realised by use of a digital switching system. A processor effects the read or write operations of the data on a bus line. Telephonic speech is sampled to form digital data frames for transmission on a number of channels. A number of terminal circuits receive the data via ports and a time division multiplexed data bus permits exchange of the data or a sequential sharing basis. Memory circuits record the selected data frames and a processor controls the ports to effect read and write operations into the memory. This allows the selected data to be routed in an output signal to the ports for the appropriate destination.

Description

 The present invention applies generally to distributed control digital switching systems serving a plurality of telecommunications terminals and, more particularly, to the means used in these systems for ensuring the dissemination of information transmitted by a terminal, or another signal source, to a given group of destination terminals. The invention relates in particular to the realization of this broadcasting function in telephone systems.

 In a telecommunications system in accordance with the present invention, information received by any interface of a digital connection network from any terminal having access to this interface can be selectively distributed to any number of other terminals connected to the one or all network interfaces. The system is at the permanent disposal of all terminals, regardless of its possible simultaneous use by any number of other terminals on one. or all interfaces of the digital connection network. I1 comprises independent means distributed over all the interfaces of the network where they can be used concurrently by any number of combinations of terminals and unidirectional paths by which respective terminals can communicate in both directions with their respective interfaces of the connection network.

The invention will be better understood on reading the description which follows, given by way of nonlimiting example, with reference to the appended figures which represent
- Figure 1, a block diagram of an information dissemination system
- Figure 2, a simplified diagram of possible signal exchanges on an interface or end of a digital connection network
- Figure 3, the principle of time switching between the different incoming and outgoing channels at an interface or end of the network
- Figure 4, a simplified functional diagram of the hardware providing the broadcast function at one end of the network;
- Figure 5, a block diagram of a broadcasting system with four terminals having access to the same end of the network;
- Figure 6, a theoretical diagram similar to that of Figure 5 for a broadcasting system concerning two terminals distributed over four different ends of the connection network;
- Figure 7, another theoretical diagram relating to the multiple use of broadcasting equipment associated with several network ends, also valid for the representation of the system of Figure 6
- Figure 8, the common use of broadcasting equipment from one end for two separate broadcasting functions;
- Figure 9, a block diagram of a fraction of a terminal interface of a digital switching system consisting of four interface switches, or ports, which can execute broadcast operations
- Figure 10, a block diagram of a terminal interface port and, more particularly, elements of this port which relate to the execution of broadcasting operations.

In a digital switching system according to the invention, subscriber line trunks or other telephone circuits are provided, inter alia, with a signal coder
MIC (pulse modulation and coding) which constitute the digital representation of telephone conversations. These digital junctions are, for example, of the type described in US Pat. No. 4,161,633. The MIC signals are time multiplexed in groups of 32 over unidirectional digital transmission lines, a single MIC line being used for serial transmission. bits of a group of signals. 32 time slots (IT) constitute the multiplexing frame which is generally repeated 8000 times per second so that if, for example, each digital signal sample is expressed by 16 binary elements (eb) the transmission bit rate over a MIC line is 4096 keb.s 1.

 The digital speech samples from a terminal are routed by the system to the destination terminal by means of several multiplex lines interconnecting different interface circuits and different elementary switches of the digital connection network and of a determined time channel on each of these lines. Such elementary switches therefore effect IT changes which can be defined as the transposition of digital data from one channel to another. A digital connection network consisting of a plurality of switches of the same type is described in the application for French patent No. 79 05851 filed March 7, 1979, by the Applicant Company for: "Digital connection network with modular extension", and the switch itself is described more particularly in French patent application No. 79 05850 filed March 7 1979, by the Applicant Company, for: "Digital switching element with multiple access ports". The structures deriving from these patent applications are the basis of the present invention.

 In a telecommunications system according to this invention, a terminal selection unit can connect, for example, 1920 low traffic terminals (subscriber lines) or 480 high traffic terminals (circuits) to the digital connection network via interface switches included in the selection unit, in the same way as in the system described by the first of the aforementioned patent applications. It is based on the principle of a complete distribution of the control members in the terminal selection units. For this purpose, each terminal selection unit is divided into a plurality of groups of terminals each associated with an interface and control element. Such an element is assigned for example to 60 subscriber lines and consists of a unit for connecting the respective trunk group, which we will simply call the terminal interface, and for a processor performing certain call processing functions, in particular selecting the conversation paths in the connection network and controlling various telephone functions in the group's terminals. Each terminal interface is connected to the connection network by at least two bidirectional transmission lines and two interface switches, so as to allow the transmission of control data to the connection network, the exchange of information with other terminal interfaces of the same or a different unit and telephone communications between any two terminals served by this interface, or between any of these terminals and any terminal associated with another terminal interface of any selection unit.

 Broadcasting is defined as a method of transmitting a particular signal (tone, announcement, calling subscriber identification, etc.) to a selected subscriber, to any group of subscribers or even to all of the subscribers in the system. .

Figure 1 illustrates the principle of a broadcasting system in a digital telecommunications network. The broadcasting system represented involves N terminals, one of which is the source of information, the terminal 1 in the example of FIG. 1, and the other terminals, 2 to N, are receivers of the information broadcast by the first. Digital samples of information are transmitted periodically from terminal 1 to the system and the system applies a digital coefficient to them which brings them back to an appropriate scale (or weighting coefficient) and then transmits them to terminals 2 to N. The processing equipment for the information disseminated is represented in circle 12 by the reference p. The periodicity of the transmission of digital information to the broadcasting system is, for example, equal to that of the speech samples.

A new sample or a new value of the digital information signal reaches the broadcasting system 10 once per frame, via the unidirectional time path connecting the terminal 1 to the system. Above this line, an arrow surmounted by the reference 1RFJ1 indicates in FIG. 1 the transfer of the digital information element R in the frame F by the terminal 1. In a given broadcasting process, this notation leads to represent the first element of information transmitted by Troll, the second by 7 and so on, since it is a broadcast from terminal 1. At the exit of the system, Figure 1 indicates l information transmitted to terminals 2 to N in a channel of frame F, on unidirectional lines terminating at these terminals, by CT] i with 2jN. In general [T zj = kj [RF ~ D expression in which k. is the weight applied to the element
J of digital information R supplied to terminal j, and Dj is the transfer time of this information using the duration of a frame as a unit of time. In particular, the first information unit applied to the terminal j is Tj which is equal to k. troll.

 The interface between a digital network and a number of information transmission terminals can be defined as a terminal exchange unit or end encompassing a group of first stage switches of the digital connection network. The latter may moreover comprise only a single stage of switches but, in all cases, the terminal group or particular end of the connection network is defined here as containing the means for changing time channels to which only access some terminals and which are still part of the first switching stage.

 All the internal individual links or meshes of a digital connection network are unidirectional multiplex lines.

All the unidirectional paths established in the network by time channels of different meshes start from one end of the network and also end at one end. Two unidirectional paths are complementary when they are associated with the same end and are in opposite directions, that is to say when they form a bidirectional connection with this end. If the only possible way to interconnect two terminals requires crossing different switching stages of the network, then the two terminals are connected at different ends of the network. The simplest topological structure is that of a digital network at one end.

 The digital elements of information enter the network at reception points and exit therefrom by transmission points at periodic intervals determined by the frequency of multiplexing of the information. Referring to FIG. 2, it can be seen that the signal inputs and outputs at one end of the network are considered as time paths and correspond to time intervals (IT) between which data can be exchanged by the digital switching means belonging to this end. Each terminal is connected by an incoming time channel and an outgoing time channel carrying the references RCUE and XMIT respectively in FIG. 2 and which will also be called receive channel and send channel of the end 20. The unidirectional paths transmitting Network signals from this end are also represented by transmit channels (XMIT) and the unidirectional network paths that terminate at this end are considered to be receive channels (RCVE).

 More specifically, FIG. 2 represents the terminal 1 connected at the end 20 of the network by the channels XMIT1 and RCVE1, and the terminal N connected at the same end by the channels XMITN and RCVEN.

All the unidirectional paths starting from the end 20 are represented by the transmission channels XMITN + 1 to XMITp and all the unidirectional paths which terminate there are represented by reception channels RCVEN + 1 to RCVE. In general the maximum values of P and Q are equal and, for intermediate values, the unidirectional paths of opposite direction are preferably in equal number and constitute complementary pairs of channels (N + 1), (N + 2), etc.

 FIG. 3 indicates that an end 20 of a digital connection network can be represented by a set of channels united in a single frame with a functional block symbolizing the hardware associated individually and collectively with these channels.

Figure 4 illustrates the principle of interconnection of channels by broadcasting equipment assigned to one end of a digital network. A digital information unit accepted by a determined incoming channel RCVE during frame F is indicated by CXz
During the same frame the information element is scaled appropriately, or weighted, and supplied to a set of outgoing channels
XMIT1 to XMITN. The weighting coefficient determining the correction of the element Cx for the channel XMIT. is noted k. and he can change the
F ii sign and the amplitude of the quantized sample represented by the numerical value of EXz. The resulting digital element is denoted ksi X 2.

The formation of a broadcasting system requires at least one particular piece of equipment, as shown in FIG. 4. FIG. 5 gives a simple example of a broadcasting carried out by the equipment p from a single end of the digital network. Via the incoming route
RCVE, which is assigned to it at the end of the network, the terminal T1 sends information which is repeated or reflected by the network on the destination terminals T2, T3 and T4, via their respective outgoing channels XMIT2 to XMIT4. This routing of information is carried out by the broadcasting equipment p assigned to the end of the network common to the four terminals concerned. In the example of FIG. 5, the information received from T1 is supplied to T2, T3 and T4 for the same frame or during the next frame, but always with a delay less than the frame period, that is to say a delay O with the notation explained at the beginning of this description. The maximum actual transmission delay is obviously equal to the time interval which separates the RCVE channel from the most distant outgoing channel and it is always expressed in a number of IT less than the number of IT per frame. In addition, a unit weighting has been assumed for all information transfers, hence the simple value LXFJ indicated in all the channels.

 If the reception channel RCVE1 was an incoming channel associated with the termination of a unidirectional path on this end, instead of being a channel associated with a terminal such as T1 according to the representation in FIG. 5, we would then have a system broadcast on at least two ends of the network. This is how FIG. 6 shows an example of diffusion with multiple ends, in order to describe how the respective diffusion equipments cooperate to establish all the necessary connections. Figure 7 is another theoretical diagram usable to describe the same system.

The terminal T1 constitutes the source of information and it transmits in its incoming channel RCVE1 the successive digital samples which represent this information. In the example of FIGS. 6 and 7, the broadcasting system retransmits these digital values to nine other terminals T2 to T10 connected on four different ends of a digital connection network, the terminals
T2 and T3 on the same end A as the transmission terminal, terminals T4 and T5 on the end B, T6 and T7 on the end C and finally T8, Tg and T10 on the end D. To transmit the information, for example at terminal T10, the broadcasting equipment at the end
A (ssA hardware) transposes each sample of the incoming channel RCVE1, into the outgoing channel XMIT4 which is associated with an initial segment OSP1 of a unidirectional connection path of the network leading to a terminal segment TSP1 associated with the incoming channel RCVE6 of the 'end B.

The broadcasting equipment $ 8 of this end B transfers the digital motus from RCVE6 to the outgoing channel XMIT9 which corresponds to an initial segment OSP3 of the unidirectional connection path established between the ends B and D of the digital network, the terminal segment of this path being associated with the incoming channel RCVE15 from the Do end In the latter, the pBD broadcasting equipment transfers the digital words from RCVE15 to XMIT17 which is the outgoing channel from the D end of the digital network to the terminal T10 Given that the transfer of information from terminal T1 to all the other terminals requires several broadcasting equipment and several unidirectional time connection paths over the meshes of the digital connection network, the number of channels per multiplexing frame is generally insufficient for this transfer to be carried out in a time less than a frame period. In the case shown, the information XT transmitted to the terminal T10 is noted EXF D1 7 where D indicates the transmission delay of [XF] in whole number of frames.

We will now describe how the broadcasting equipment of a single network end can be shared by several broadcasting systems established simultaneously at this end. For this, reference is made to FIG. 8 in which a first broadcast is carried out from an original channel RCVE1 towards destination channels XMIT3 to XMIT j and a second broadcast relates to a source associated with the incoming channel RCVE2 and channels recipients associated with the respective outgoing channels XMITj + l to XMITN. The number of simultaneous and independent broadcasting operations handled by a broadcasting equipment at a network end is determined by the number of disjoint sets of transmission channels that constitutes the equipment, considering that two transmission channels any belong to the same set if they receive information from the same source.

We will now describe the hardware means for implementing the broadcasting system according to the invention, first referring to FIG. 9 which represents interface circuits placed between the terminals and the digital connection network of a time switch adapted to the execution of the broadcasting service defined above. The terminal interface of FIG. 9 comprises a plurality of terminations of bidirectional multiplex lines, called ports, which are time switching circuits of modular type, the detailed description of which has been given in the aforementioned French patent applications and of which a part of the functions will be described again here with reference to FIG. 10 insofar as these functions are useful for the object of the present invention.

Among the plurality of ports of a terminal interface, FIG. 9 represents four of them, ports 102, 104, 106 and 108, and shows that they are all connected together and to a selective access buffer memory 110 by an omnibus line. 112 time division multiplexed and consisting of a set of bidirectional circuits allowing the parallel exchange of data signals, control addressing and synchronization, namely the respective omnibus circuits 120, 122, 118, 124. port includes control circuits and provides interface functions between a bidirectional multiplex line 114 conveying the number of incoming and outgoing channels determined by the time-division multiplex frame outside the interface, and the omnibus line 112 also multiplexed over time, for example at the same rate but offering a multiple bit rate due to the series-parallel conversion of the binary elements of information.

Another bidirectional line connects the memory 110 to a processor 116, which allows the latter to transmit orders to all the ports, via the buffer memory 110 and then the bus line 112. The responses to these orders are sent on line 112 by affected ports and they are written into memory 110 where they are then read by processor 116. There are three main types of orders
1) Port to Port: it is interpreted as a request to transfer information from an incoming channel in a port to an outgoing channel from another port or, sometimes, from the same port, the information entering and leaving then of the interface by the same bidirectional line
2) Port to Buffer memory (Storage): it is a command to transfer the content of a channel of a multiplexed transmission line into a memory location with a determined address
3) Buffer memory at Port (Broadcast): this is an order to transfer the content of a location in the buffer memory whose address is specified, in also defined channels of specified multiplex lines.

 We now refer to FIG. 10 which, as previously indicated, represents certain details of the type of port used. The incoming multiplex signals on a line 140, in other words the incoming side of the bidirectional line 114 connected to this port, are coupled to a receiving part 142 of the port 102. The latter is completed by a transmitting part 144 which is connected to the receiver 142 by the 112 bus line.

The receiver 142 provides the interface for the incoming multiplex line 140 and the omnibus multiplex line 112 by means of its own control circuit. Similarly, the transmitter 144 fulfills the interface functions between the omnibus line 112 and the outgoing multiplex transmission line 146 which is also one of the complementary links of one of the bidirectional multiplex lines bearing the reference 114 in the figure. 9. The transmitter circuits 144 also have their own control members.

We have seen that the omnibus line 112 comprises four groups of transmission circuits: the data lines 120, on which the information is exchanged between the ports and the buffer memory 110 (FIG. 9) in both directions, or between a receiving part of a port and its transmitting part or the transmitting part of another port; the address lines 122 on which addresses of memory locations are selected; destination port numbers or specific channel numbers in destination ports; the control lines 118 which are used for the transmission of orders by the processor and the synchronization lines 124 which carry the clock signals necessary for ensuring the temporal coordination of the interactions of the ports and of the processor with the bus line.

 The receiver 142 of each port comprises a synchronization circuit 148 coupled to the multiplex line 140. I1 detects the rhythm and the phase of the incoming signals and produces a pair of output signals synchronized with the incoming channels. One of these signals, transmitted on line 150, consists subsequently of the incoming words and the other signal, transmitted on line 152, indicates the channel number (O to 31 in MIC) which corresponds to the word currently transmitted on line 150.

An address memory 154 with selective access and read / write (random access memory) is also provided in the receiver 142 to store the destination addresses of the digital words received in each of the incoming channels. Such an address can be that of a particular location of the buffer memory 110 or that of a port and of a particular channel of this port, depending on the destination of the corresponding incoming word. A state memory of the receiver, which is also a random access memory 156, is used to record data representative of the current state of each channel of the incoming multiplex frame. This current state may have been established by order of the processor 116 or by certain data contained in previous words of the channel. The essential role of the state memory 156 is to indicate to a channel processor 158 of the receiver which are the operations that it must perform on the omnibus line 112.

 The incoming channel processor 158 can also modify the contents of the address and state memories, 154 and 156 respectively, to make the necessary updates to the destination addresses and the channel states. Its operation depends on the content of the state memory 156, on the word received and on the time base distributed to all the circuits of the port by a local clock synchronized by the lines 124. The transfers of data from port to port or from a memory port are placed under the control of this processor 158, while the overall operation of the receiver 142 is directed by a main processor 160.

The commands intended for the main processor of a port receiver are written in the buffer memory 110 (FIG. 9). The main processor 160 extracts these orders from memory 110 by transmitting the corresponding address on line 122 while carrying out the appropriate signaling on command line 118, the sought order can then be taken from data line 120.

The main processor executes the order received in due time and sends a response to the buffer memory 110, via the bus line 112. The operations that the processor 160 must execute are write operations in the address memory 154 and in the state memory 156. By way of example, an operation for transferring information from the port to the buffer memory from a particular incoming channel is executed by writing the internal destination address to the memory 110 in the address memory 154, as well as the state corresponding to this transfer in the state memory 156, the address used for these two records being obviously that of the incoming channel which provides the information.

 The transmitting part of the ports or, more simply, the transmitter 144 of each port, receives data transmitted on the bus line 112 by the receiver 142 of the same port or of any other port having access to the same bus line. The information coming from an incoming channel in a receiver 142 is written in a specified location of a random access random access memory 162, called the data memory, of the transmitter 144 of the destination port. This corresponds to a port-to-port transfer operation and the reception location in the memory 162 has an address which corresponds to the number of the outgoing channel in which the information is to be transferred, or switched. The memory 162 thus fulfills the function of a data or speech buffer memory allowing their transposition from an incoming channel to a different outgoing channel according to the principle of time switching.

 For all the broadcasting operations which relate to one or more particular outgoing channels of the transmitter 144, the data memory 162 contains an address of the buffer memory 110 (FIG. 9) for each channel. The random access memory 164 contains data representative of the current state of all the channels. A particular memory location in this state memory 164 and the identical address location in the data memory 162 control the transfer of information in an outgoing channel of corresponding number on the outgoing multiplex line of the port. interactions of the transmitter 144 with the omnibus line 112 are controlled by the channel processor ~ 166 which also participates in the transfer of the signals on the outgoing multiplex and in the operation of the data memories 162 and of states 164. This processor 166 receives control signals coming from the circuits 118 of the omnibus line 112, to which it is connected by a line 168. The channel states, recorded in the state memory 164, are also transmitted to the processor 166 which performs the operations of multiplexing and command of the random access memories necessary for the insertion of the multiplexed signals in the appropriate outgoing channels, according to both the status and command signals it receives t.

 The main processor 170 controls the entire operation of the transmitter 144. In a similar manner to what has been described for a receiver 142, the main processor 170 of the receiver 144 of a port searches the memory 110 for the commands which are sent to it by the command processor 116. The processor 170 then executes these commands which result in writing operations in the data memories 162 and in state memories 164, then it provides appropriate responses which it transfers into the common buffer memory 110. Such processes make it possible to establish the partial connections required at one end of the network by a broadcasting system according to the invention. These co-connections correspond to a transfer of data between a determined location of memory 110 and a or several outgoing channels selected in one or more ports of the same terminal interface, that is to say between an incoming channel of this interface and said outgoing channels, via the mem oire commune 110. As we saw above with reference to the theoretical diagrams of FIGS. 6 and 7, unidirectional paths connecting several interfaces are generally required to transfer the data from the source terminal to all the destination terminals. The data received in an incoming channel of a determined port can thus have already been switched according to the same principle in previous interfaces.

The switching circuits which have just been described can also establish bidirectional conference connections between N subscriber terminals. On this subject, reference is made in particular to the French patent application filed on March 20, 1981 by the
Applicant company, for: "Digital telecommunications switching system, equipped with conference connection means for one or more groups of terminals". A fourth type of order is used in this case by the processor 116 of a single interface which controls the conference call, independently of the total number of interfaces necessary to establish N-1 bidirectional links between each of the N subscribers and the (N-1) between subscribers. This order determines the transfer to determined outgoing channels of the sum of the digital samples coming from a set of incoming channels involved in the conference system, this sum being carried out by an adder 174 (FIG. 10 ) which receives all of the necessary terms from a set of locations in buffer 110, via registers 172.

These registers. 172 and the adder circuit 174 are also used for transferring data in a broadcasting system according to the present invention, the adder 174 then playing no role since it only receives one sample per frame. The address F of a location in memory 110, the content of which W must be multiplexed with other signals on the outgoing line 146 by transfer in a defined channel C, is given in memory 162 at address C corresponding to the number of the outgoing channel. Reading the content of the memory 162 in the address location C therefore serves as a means of addressing the memory 110 in order to read the word W there to be transmitted. It is first recorded in one of the registers 172 and, at the start of the time interval of channel C, it is coupled to the time multiplexer 176, via the adder 174 which makes no modification thereto, then to the output register 178 from which it is injected into channel C of the multiplexing frame of the outgoing line 146.

In summary, in a terminal interface port used by a broadcasting system, the multiplexed signal to be broadcast is extraRX Mew 7 e - the incoming line 140 of the port receiver 142 by means of the synchronization circuit 148 already described, the state of the channel is placed in the buffer memory port mode, so that all the words of the same channel received sequentially during the successive frames are always recorded in the same location N of the memory 110. Immediately afterwards, in all the transmitters 144 of the ports concerned by the broadcasting system, all the outgoing channels into which the signal to be broadcast must be inserted are placed in the "Broadcasting" state, so that said transmitters read the address word N in the frame on each frame. memory 110 and transmit it to the appropriate outgoing channels. In this way, a time division multiplexed signal received by a port in any incoming channel can be broadcast in as many outgoing channels as a terminal interface can have. The same repeated process in cascade, as previously described theoretically, allows the dissemination of information to any number of terminals.

It is obvious that the above description has been given only by way of nonlimiting example and that other variants can be envisaged without thereby departing from the scope of the inventioC4

Claims (9)

 1. Digital telecommunications switching system comprising means for broadcasting information consisting of digital data frames in a plurality of channels, characterized in that it comprises several termination circuits called ports in which there are means of reception of digital data frames from a plurality of sources, a time division multiplexed omnibus line and coupled to all the ports to allow exchanges of digital data between them on the basis of the sequential sharing of the omnibus line, memory circuits also coupled to the bus line for storing selected digital data frames that one or more of said ports transfer to said bus line, means for controlling said ports which can bring all the destination ports of the information broadcast in a defined state for which they execute selective access operations to said c memory circuits, via the omnibus line, in order to extract the digital data representative of said information, and means for transmitting the digital data thus collected, in an output signal from each of said destination ports.  2. Digital switching system according to claim 1, characterized in that said memory circuits are appropriate parts of a random access memory.  3. Digital switching system according to claim 1, characterized in that said port control means comprise a processor which applies control data to said bus line and performs read operations in said memory. 4. Digital switching system according to claim 1, characterized in that each port comprises a reception circuit constituting an interface between the incoming data frames and the bus line and a transmission circuit constituting an interface between this bus line and the output signal of said port, the latter signal also being formed of digital data frames in a plurality of outgoing channels. 5. Digital switching system according to claim 4, characterized in that the transmission circuit of each port comprises means for transferring in one of its outgoing channels data coming from an incoming channel of a circuit of reception of a port, this operation being defined as a transfer of data from port to port and being carried out by means of the omnibus line and of a random access memory included in said transmission circuit for recording temporarily said data extracted from the bus line to a memory location whose address corresponds to that of the designated outgoing channel. 6. Digital switching system according to claim 1, characterized in that said digital data provide the values of samples of speech signals according to the technique of pulse modulation and coding (MIC), a plurality of signals MIC being associated with said plurality of channels by means of two time division multiplexing. 7. Digital switching system according to claim 3, characterized in that the port control processor comprises means for transferring in a determined memory location from said memory, digital data coming from a given channel of the one of said sources.  8. Digital switching system according to claim 3, characterized in that the control processor can execute a data search instruction relating to a broadcast operation. 9. Digital switching system according to claim 39 characterized in that the control processor can execute an instruction to search for data to be switched in a conference system.