FR2459980A1 - METHODS AND APPARATUSES FOR LOCATING DEFECTS IN ELECTRONIC CIRCUITS - Google Patents

Abstract

THE INVENTION RELATES TO THE LOCATION OF FAULTS IN ELECTRONIC CIRCUITS. THE APPARATUS INCLUDES MEANS FOR APPLYING A SEQUENCE OF TEST SIGNALS TO THE CIRCUIT TO BE TESTED, MEANS FOR MEMORIZING THE NUMBER OF THE OPERATION WHICH, IN THE SEQUENCE, SHOWS THE FAULT, MEANS 12, 14, 16 TO APPLY A DETERMINED SIGN CURRENT PULSE ON A CONDUCTOR ASSOCIATED WITH THE FAULT WHEN A NEW SEQUENCE OF SIGNALS REACHES THE STORED NUMBER, AND MEANS TO DETERMINE 44 TO 52, THE DIRECTION OF FLOW OF THIS PULSE ALONG THE CONDUCTOR, AND TO DETERMINE 54 THE DIRECTION OF THE FAULT IN RELATION TO THE POINT OF APPLICATION OF THE PULSE. APPLICATION TO THE LOCATION OF FAULTS OCCURRING IN TRANSITIONAL STATES.

Description

Methods and apparatus for locating faults in circuits

  e. The present invention relates to methods and apparatus for

  fault localization in electronic circuits.

  In a process for the automatic testing of digital integrated circuits

  plexes, a sequence of test signals is applied to the test circuit.

  to quickly move the circuit through a large number of

  possible states of its operation. The response of the circuit to the test signals is continuously monitored during their application to check for faults. Once a defect has been established,

  it is usually desirable to locate one's pre-

  in the circuit so that the circuit can be repaired.

  A known method of defect localization is to put the circuit

  in a particular operating state in which the defect appears

  then use a probe to measure the various parameters of the circuit. However, this method has the disadvantage that for some circuits and in some cases, the particular operating state in which the fault occurs is a transient state, so that

  it is not possible to put the circuit in this state.

  The subject of the present invention is, according to two of its aspects, automatic test methods and apparatus in which the disadvantage

  previous is mostly overcome.

  Certain kinds of electronic circuits, particularly logic circuits requiring high frequency clock pulses and / or certain kinds of Random Access Memory (RAM) having internally generated supply voltages, produce

  the effects of which tend to mask the magnetic field

  induced by the application of a current pulse, even when

  that the circuit is maintained in its default state. Another object of the invention, according to two additional aspects, is to remedy this

  problem using the improved technique (aforesaid survey.

  According to one aspect of the invention there is provided a method of testing a powered circuit comprising: - applying a sequence of test signals to said circuit; - storing in response to detection of a fault in said circuit; circuit

  during the application of said sequence of test signals, the number

  ro of the operation in said sequence for which the

must,

  - repeat the application of the said sequence of test signals to the cir-

  fired by connecting means for applying a current pulse to a driver of the circuit associated with the fault,

  - automatically triggering said means for applying an impulse

  current to apply a pre-current sign current pulse

  determined to said driver when said sequence reaches the operation whose number has been stored, and - determining the direction of flow of said current pulse along the conductor so as to allow the determination of the direction of the defect with respect to the point on the driver o is

applied the impulse.

  Preferably, the current pulse has an approximate waveform

  triangularly with a relatively steep leading edge and a relatively less abrupt trailing edge, and the operation of determining the direction of flow of said current pulse along the conductor includes detecting magnetic field variations

  induced near said conductor by the leading edge of said

  drive, and production, in response to the detection of variations in

  field, a signal indicative of said direction of flow.

  According to a second aspect of the invention there is provided a method for locating a fault in a powered electronic circuit comprising: applying to a conductor of said circuit a current pulse of

  predetermined sign and having an approximately

  angular with a relatively steep leading edge and a relatively less abrupt trailing edge, - detecting magnetic field variations induced in the vicinity of said conductor by said leading edge of said impulse, and

  - to produce, in response to the detection of said man-made field variations

  gnetic, a signal indicative of the direction of the flow of

  said current pulse along said conductor, so as to allow

  put the determination of the direction of said defect in relation to

  point on said conductor where said pulse is applied.

  According to a third aspect of the invention, there is provided a method for locating a fault in a powered electronic circuit consisting of: a) putting said circuit in a state where the fault is apparent, b) locating the node of the circuit o the defect (c) repeatedly apply to a driver of that circuit

  node of the current pulses of the same predetermined sign, each

  that pulse having an approximately triangular waveform

  with a relatively steep front flank and a relatively

  less abruptly, d) detecting magnetic field variations induced near said conductor by the leading edge of each pulse so as to produce respective first signals representative of said pulse-induced variations,

  e) integrating a predetermined number of said first signals to pro-

  derive a signal representative of their average value, f) detecting induced magnetic field variations in the vicinity of said conductor, in the absence of application of said pulses, by noise currents in said circuit, so as to produce other signals representative of said noise-induced variations,

  g) integrating a predetermined number of said other signals to produce

  re a signal representative of their average value, and

  h) produce, in response to the amplitude and polarity of the

  between the average values of the first and second

  a signal indicative of the direction of flow of the

  pulses of current along said conductor, so as to allow

  set the determination of the direction of said defect in relation

  at the point on the said conductor where the said impulse

sions.

  Advantageously, the operations f) and g) are carried out before the operations

rations (c), (d) and (e).

  In all these first three aspects of the invention, the methods

  in addition, preferably, an automatic execution of the de-

  terminating the fault direction in response to the predetermined sign

  of said current pulse and the flow direction thereof.

this one along the driver.

  According to a fourth aspect of the invention, there is provided an apparatus for testing a powered electronic circuit comprising

  means for applying a sequence of test signals to said circuit

  cooked, - means for storing, in response to detection of a defect

  in said circuit during the application of said sequence of

  test numbers, the number of the operation in that sequence for the

what appears the defect,

  means for applying a predetermined sign current pulse

  terminated at a driver of the circuit associated with the fault, - means for triggering the means for applying the current pulse to apply such a pulse when said sequence, during a new application thereof to the circuit, reaches the operation whose number has been stored, and

  means for determining the direction of flow of said

  current pulse along the conductor so as to allow the determination of the direction of the defect with respect to the point on the

  o driver is applied the pulse.

  The current pulse again preferably has an approximately triangular waveform with a relatively steep leading edge

  and a relatively less abrupt rear flank, and the means for de-

  terminate the flow direction of the stream preferably

  this means arranged to detect magnetic field variations.

  induced in the vicinity of said driver by the front flank of the

  said pulse and means responding to the sign of said variations

  magnetic field to produce a signal indicative of said direction

current flow.

  According to a fifth aspect of the invention, there is provided a device

  for locating a defect in a food electronic circuit

  comprising: - means arranged to apply to a conductor of said circuit a current pulse of predetermined sign and having a waveform

  approximately triangular with a front flank relatively

  brupt and a relatively less abrupt rear flank, - means arranged to detect magnetic field variations

  induced near said conductor by said leading edge of the

said impulse, and

  means corresponding to the meaning of said magnetic field variations

  only to produce a signal indicative of the direction of flow of said current pulse along said conductor so

  to permit the determination of the direction of the said defect by

  port at the point on said conductor o is applied said pulse.

  According to a sixth aspect of the invention there is provided a device

  to locate a fault in an electronic circuit powered

as:

  means arranged to apply in a repetitive manner to a conductor

  of said predetermined signal current pulse circuit

  and each having an approximately triangular waveform a-

  with a relatively steep front flank and a relatively

  less abrupt, - means arranged to detect magnetic field variations

  induced near said conductor by the leading edge of each

  said pulses and by noise currents in said circuit

  cooked to produce signals representative of said

  impulse and noise induced rays,

  integration means arranged to receive and integrate

  first and second sets of said signals representative of the varia-

  to produce respective signals representative of

  their respective averages of said first and second sets of

  said signals representing variations, one of said first and

  second sets of signals being produced in response to both

  said impulses and said noise, and the other being produced in response to

only this noise, and

  means corresponding to the amplitude and polarity of the difference

  this between the two signals representative of the means for producing a signal indicative of the direction of flow of said pulses

  current along said conductor so as to allow the determination of

  the direction of the said defect in relation to the point on the

  said driver o are applied said pulses.

  The apparatus of each of these last three aspects of the invention

  in addition, preferably, means corresponding to the predetermined sign

  end of the current pulse (s) and direction of flow.

  of these along the driver to determine and, preferably,

  the direction of the fault.

  The current pulse application means comprise, preferably

  A differentiating circuit is provided for producing said triangular waveform at its output in response to a steep-edge signal at

his entry.

  Advantageously, the detection means comprise a coil coil

  on a U-shaped core and the means of applying the impulse

  currents have a conductive element arranged between

branches of said core.

  In all the embodiments of the invention, the amplitude of the

  said current pulse is preferably chosen to be insufficient for

  modify the logic state of said circuit.

  The invention will be better understood by reference to the following description:

  in connection with the accompanying drawings given by way of example

non-limiting.

On these drawings

  - fig. 1 is a block diagram of a circuit of a home appliance.

  fault calibration according to the invention;

  - fig. 2 shows somewhat idealized representations of

  waveforms appearing in the circuit of FIG. 1;

  - fig. 3 is a sectional view of an embodiment of a sound.

  of being part of the apparatus of FIG. 1; - fig. 4 is a block diagram of an automatic test equipment according to the invention and adapted to incorporate the apparatuses of FIGS. 1 and 3;

  - fig. 5 is a simplified circuit of the circuit of FIG. 1.

  The apparatus that will be described is intended for fault localization

  on mounted circuit boards. In the field trials

  such a wafer carrying, for example, a logic circuit

  As a complex digital, power is supplied to the circuit by a side connector on the wafer, and the test signals are then applied in a predetermined sequence to the circuit to take various different logic states. For each of these states, the electrical voltages at various points of the circuit are measured and

  their logical values (or combinations of these) are

  with predetermined values (or combinations thereof)

  ci) which are expected during normal operation without

  circuit faults. Any deviation from these expected values

a fault in the circuit.

  In general, the fault can be a short circuit (or the failure of a component whose effect is similar to a short circuit) between the point, such as a conductive track of the printed circuit where the incorrect voltage is observed and either the supply conductor or the return conductor of the circuit. If the point is a node of the circuit, to which several different components are connected, a simple measurement

  the voltage of the node does not identify the defective component.

  tueux. However, the injection of a test current pulse into

  the knot can solve this difficulty.

  As a result, and as shown in FIG. 1, the apparatus comprises a power supply circuit 10 which has an injection probe

  current 12 connected to a current source 14 and to a sink well.

  16. To test a circuit in which the power supply

  - tion is, as usual, positive compared to the driver

  In turn, the current source 14 is provided to provide positive current pulses and the current sink 16 is provided to provide negative current pulses. The choice of the current source

  14 or the current well 16 is controlled by a lock memory.

  bistable polarity 18 in response to either two-way signals

  The comparators 20 and 22 are inversely connected to each other at two input / output terminals 26 and 28. These two terminals are connected to a manually operated switch 24. The comparators 20 and 22 are connected in opposite directions to each other. 26

  and 28 also constitute the power supply terminals of the apparatus, the

  DC power supply being separated from the input signals and

  two coils 30 and 32 for supplying the different

  components of the device along appropriate conductors (no

  represented for the sake of clarity).

  The operation of the current source 14 or the current sink

  16 is triggered by a delay circuit 34 and may be

  by a signal on an input terminal 36.

  The delay circuit 34 acts in connection with a signal of com-

  command on an input terminal 38 to trigger one or the other of the

  source 14 or the well 16 chosen by the polarity memory 18, of

  permanently at a frequency of approximately 1 kHz (

  internally), or selectively in response to a signal from an OR gate 40 which has two inputs connected to one of the comparators 20 and 22 (external operation). The input terminal 38 is also connected to

  polarity memory 18 to command him to respond to either

  20 and 22 (in external operation), or to the switch 24 (in internal operation). Once the delay circuit 34 has triggered one of the elements: source 14 or sink 16, it temporarily inhibits a subsequent operation of the comparators 20 and 22

  via a command line 41.

  The apparatus also has a current sensitive circuit 42, in which a coil 44 is wound on the central portion of a U-shaped ferrite core indicated schematically at 46. The ends of the coil

  44 are connected to a sense amplifier 48 which excites

  opposite signs of two comparators 50 and 52. These comparisons

  also receive reference voltages of opposite polarity e

  respectively V + and V- and their outputs are connected to a circuit lo-

  display 54 which also receives the output signals from the

  moire 18 in the power supply circuit 10.

  The output of the amplifier 48 is also connected to an input 70 of a noise reduction circuit 72. This circuit 72 has another input 74 connected to the output of the delay circuit 34, and two inputs

  76,78. The circuit 72 also has an output 80 connected to the

  respective inhibition of comparators 50 and 52 and two

  very outputs 82,84 which are connected to the respective outputs of the com-

  50 and 52. The structure and operation of the noise reduction circuit 72 will be described later in more detail.

in relation to FIG. 5.

  The display logic 54 responds to the signals on its inputs to ex-

  quote one of the two light-emitting diode direction indicators-

  56 and 58, by means of respective memoranda of

  rusting 60 and 62 which are enabled by the timing circuit

34.

  The outputs of the comparators 50 and 52 are also connected to an amplifier

  differential output indicator 64 which provides corresponding signals

  of opposite signs on the input / output terminals 26 and 28: these signals are prevented from affecting the polarity memory 18 by the fact that

  that the operation of comparators 20,22 is temporarily

  says as mentioned previously.

  The structure of each of the above mentioned circuits will become

  obvious to the skilled person in light of the following description

  and does not need to be discussed here in detail.

  <In operation, the circuit to be tested is energized and put in the state with a fault, the current injection probe 12 is placed on a printed circuit conductor forming part of the node o exists

  the fault, and a current pulse is injected into the conductor.

  Assuming that the control signal on terminal 38 has chosen the

  external operation, the injection of the current pulse will be de-

  triggered by the timing circuit 34 in response to a pulse

  on one of the terminals 26 or 28 acting through the

  20 or 22 and the OR gate 40. At the same time, the polarity memory 18 responds to the appropriate comparator to energize the current source 14 or the current sink 16 in connection with the

  polarity of the trigger pulse.

  The amplitude of the current pulse is limited to 1 mA, which is insufficient to cause a change in the state of the circuits

  logic of the circuit to be tested. For example, for circuits in

  that transistor-transistor (TTL), a pulse of the current source

  14 causes a positive voltage pulse of about 100 mV of am-

  the maximum limit of 800 mV for a

  gnal to represent an input logic signal 0 (assuming the

positive logic).

  Similarly, a pulse of the current sink 16 causes a negative voltage pulse of about 100 mV maximum amplitude from

  a logic output signal 1 of 2.8 V, in the worst case, vis-à-

  screw of the minimum of 2.4 V. which is accepted as a logical signal of

entry 1.

  The ends of the U-shaped ferrite core 46 are simultaneously placed on or just above the printed circuit conductor so that the magnetic field associated with the current pulse flowing through it can induce a corresponding voltage pulse.

at the terminals of the coil 44.

  This pulse acts by the amplifier 48 to trigger one or the other of the comparators 50 or 52 according to the polarity of the pulse, which in turn depends on the direction of the magnetic field inducing this pulse. However, the direction of the defect (to be distinguished from the flow direction of the current to or from the defect)

  is connected not only with the polarity of the pulse of

  sion, but also with the polarity of the test current pulse.

  As a result, the display logic 54 receives a signal from both the triggered comparator 50 or 52 and the polarity memory 18, and

  by comparing these signals, provides a signal to the

  Property 56 or 58 to indicate the direction to the fault. The indication

  This is maintained by means of the memories 60 and 62 which are excited at an appropriate instant after the injection of the current pulse by

the delay circuit 34.

  In operation in the internal mode, the test current pulses are triggered automatically by the timing circuit 34 at a rate of 1 kHz and with a polarity which depends on the setting of the switch 24. If the apparatus is to be used, in operation under external mode, in connection with an automatic test equipment which provides the sequence of test signals mentioned above, such as the type of automatic test equipment of the Applicant type

  MB 2400 or MB 7700, the test equipment is intended to control the se-

  quence of the test operations so as to identify and memorize the number of the operation for which the circuit to be tested presents the state

  defective. The test equipment is then led to repeat the sequence

  this, triggering the apparatus shown in FIG. 1, via terminals 26 and 28, when the identified operation reproduces, thereby applying the test current pulse while the circuit to be tested is in

  the faulty state: the circuitry ensuring this tripping will be de-

  subsequently written in relation to FIG. 4. The resulting signal supplied to the automatic test equipment by amplifier 64 and terminals 26 and 28 energizes the equipment to diagnose the fault

* or choose additional test operations, if necessary.

  The current pulses provided by the circuits 14 and 16 have an approximately triangular waveform, as shown in a somewhat idealized form in FIG. 2a (and 2d), in which the leading edge is very steep (for example a rise time of 10 nanoseconds) and a much less abrupt trailing edge (for example a descent time of 200 nanoseconds). Although the trailing edges of the pulses are shown in FIG. 2 as substantially

  linear, they are in practice approximately exponential,

  that the pulses are generally shaped each by means of a respective simple differentiating circuit of the series capacitance type, bypass resistance, connected in the respective circuits

  14 or 16 and designed to receive a steep front-end

  latched by the timing circuit 34. As also shown in FIG. 2, the resulting voltage pulse induced in the coil 44 has a high amplitude excursion in one direction followed by a longer excursion, but a smaller amplitude in the other direction. So, a

  appropriate choice of amplitudes V + and V- makes it easy to distinguish

  the direction of the first excursion (and thus that of the direction of flow of the test current pulse). The impulses of

  induced in the coil 44 are shown in some form.

  that little idealized in fig. 2: in practice, they are put into

  me by the inductance and parasitic capacitance of coil 44 so

  that they appear as damped sinusoidal impulses, a-

  with the first half-wave much larger in amplitude than the

count.

  Fig. 2 also shows the relationship between the management of the

  the current, the polarity of the test current and the direction of

  need. Thus, with reference to FIGS. 2b and 2c, for a positive test current pulse, the flow of current to the right or to the left indicates (for appropriate orientation of the nucleus of

  ferrite 46) a fault to the right or to the left respectively.

  Conversely, for a negative test current (Figures 2 and 2f), the

  current to the right or to the left indicates a fault

  to the left or to the right respectively. The display logic

  ge 54 comprises a simple arrangement of doors and memory memories.

  rust designed to implement these relationships.

  It should be noted that if the ferrite core 46 is rotated axially by 1800, the polarity of the voltage-in pulse coil 44 is also reversed, thus interchanging the states of the indicators 56 and 58. However, if these indicators are mounted on the same support as

  the core 46 on opposite sides of its axis 66, their positions are also

  if interchanged, thus maintaining the correct indication.

  An embodiment of the apparatus constructed in this manner is shown in FIG. 3 in which the elements corresponding to those of FIG. 1 have corresponding reference numbers preceded by a 1.

  In fig. 3, the various elements of the circuit are mounted on a

  elongate printed circuit board 100 inside a tubular box

  102, through whose wall the indicators 156 and 158 and the switch 124 project. The U-shaped ferrite core 146 is mounted at one end of the housing 102, with the current injection probe 112 in the form of a metal plate ending with a point 104 directed downwards between the branches of the core 146: for clarity, the ferrite core 146 is shown rotated 900 in FIG. 3 to make visible the current injection probe 112, but in practice the branches of the core 146 and the probe 42 is in the same plane perpendicular to the plane of FIG. 3. Thus, the apparatus can be placed with one hand on a conductor 106 of a circuit board

  to be tested 108, while the current injection probe 112 and the

  ferrite yau 146 are simultaneously correctly positioned for 1 '

test current pulse.

  The ETA automatic test equipment of FIG. 4 is indicated by

  200 and can for example be made up of an equi-

  type MB 7700 manufactured and sold by the Applicant. THE YOUR

  200 is shown connected, via an omni-

  bus 202 to a complex digital circuit to be tested 204 and which may for example comprise a large number of circuits with high integration

  (LSI) mounted on a printed circuit board (not shown).

  The circuit board 204 is normally mounted in its connector.

  conventional side (not shown), and the bus 202 is connected to this side connector. As is well known, the ETA 200 is programmed

  to provide the circuit 204, via the bus 202, with its necessary power supply.

  and a sequence of test signals, and to monitor the response to

  circuit 204 to these test signals to detect any faults

  which could be in the circuit.

  The ETA 200 is equipped with interface circuits, generally designated

  206, to serve as an interface between VETA and the apparatus of FIGS.

  1 and 3. The circuits 206 comprise a transmitter-receiver for

  born 208 to receive data and transmit data to ETA (more precisely receive and transmit them to a processor

  central circuit), the circuit 208 being connected to apply the data

  it receives from LETA 200 to a data write unit 210.

  It has three exits 212, 214, 217 which are connected respectively

  at input / output terminals 26,28 and at input terminal 38 of 1 '

  apparatus of figs. 1 and 3, and a fourth exit 215 connected to the boundary

  No. 36 of this device. Terminals 26 and 28 are also connected to both

  216,218 of a data reading unit 220, whose outputs

  are common to the inputs of the write unit 210 and connected

to the transceiver 208.

  The ETA 200 has an output 222 on which it provides pulses of

  synchronized each with a respective operation of the sequence

  this of test signals applied to the circuit 204, this output being

  related to the counting input of a test number counter 224. The counting outputs of the counter 224 are connected to a first set of inputs of a comparator 226 and to the inputs of a bistable memory

  228 whose outputs are connected to the other series of inputs of the

rator 226.

  ETA 200 still has an output 230 on which it produces an impulse

  synchronized with a test pulse when it detects a

  in circuit 204. Output 230 is connected to a voltage input

lidation of memory 228.

  The output of the comparator 226 is connected to an input of an AND gate 232 with two inputs, the other input of which is connected to the output 222 of the ETA 200 and whose output is connected to another input of the unit.

writing 210.

  In operation, 'ETA 200 is started for a first cycle

  sequence of test signals, and in so doing, the total in the

  224 is incremented by 1 for each successive operation of the sequence: the contents of the counter 224 are thus indicative of the number in the sequence of the test signal actually applied to the circuit 204.

  at any moment. During this first cycle of sequence, the functioning

  the apparatus of FIGS. 1 and 3 is prohibited, if necessary by a

  signal applied by the ETA 200 to its input terminal 36 via the trans-

  transceiver 208 and the write unit 210.

  It is assumed that in operation # 27 of the sequence, VETA 200 detects

  a defect in the circuit 204. In addition to memorizing the details of the de-

  For diagnostic purposes, the ETA 200 produces a "pulse"

  must be detected "on its output 230, this pulse serving to locate the

  content of the counter 224, namely 27, in the memory 228: the sequence

  it then continues until its end. Assuming, furthermore, that an initial diagnosis based on the known operating characteristics of the circuit 204 and possibly involving the probing of voltages at various points of the circuit, indicates that the defect is associated with

  a particular conductor or node of the circuit to which several cir-

  embedded cookers (LSI) are connected, the ETA 200 indicates to the operator to place the probe 12/112 of the apparatus of fig. 1 and 3 on the node in question and, according to the preprogrammed information relating to the nature of the circuits connected to the node, excites an appropriate output 212 or 214 of the writing unit 210 (corresponding to one of the elements source 14 or well 16 in the apparatus of FIGS. 1 and 3) via the transceiver 208. The ETA is then restarted for a new sequence of test signals. When it reaches the operation 27 of the sequence, that is to say the operation for which the fault appears, the comparator 226 provides an output signal that validates the AND gate 232. The test pulse present on the other entrance of the

  ET gate and thus triggers the apparatus of FIGS. 1 and 3, through the

  212 or 214 of the data writing unit 210 which is validated and

  the corresponding input 26 or 28, to apply a pulse of

  to the node in question, with the results described previously in

  connection with FIGS. 1 to 3. In particular, the output signal

  sultant appearing at the terminals 26,28 is retransmitted to VETA 200 through the reading unit 220 and the transceiver

  208. The operator can repeat this process (which is

  speedily) several times during the exploration of the different

  parts of the knot until it has determined the location of the

cis of the defect.

  It can be appreciated that this technique is particularly

  te to locate transient faults, since it ensures that 1 '

  fault locating current pulse is applied to a

  as long as we know the present defect. The injection technique of a current pulse has the additional advantage that the effects of a relatively low current pulse can be detected even in

  presence of a higher continuous current.

  As mentioned above, some digital logic circuits, particularly

  particularly those involving high frequency clock pulses.

  and / or certain kinds of Random Access Memory (RAM) having internally generated supply voltages, produce noise currents with similar effects, and thus tend to obscure the magnetic field variations that the probe 12 / 112 is intended to detect. Once a defective node has been identified by an initial diagnosis of the kind mentioned above, the operator can easily check whether the circuit 204 is subject to such noise currents by placing the circuit in its defective state, putting the

  probe 12/112 on the faulty node, and triggering several

  one by one through the appropriate entry 26 or 28 of the. 1 while the operation of the current source 14 or the current sink 16 is prohibited via the input 36. If one of the comparators 50 or 52 is triggered during these measurements, as indicated for example by

  the lighting of one of the indicators 56, 58, a bistable memory (not shown

  VETA 200 is switched to indicate that the level of noise at the faulty node is unacceptably high. In this case, the ETA 200 chooses a different operating mode in which the

  noise reduction circuit 72 effectively replaces the comparisons

50 and 52.

  The noise reduction circuit 72 is shown in more detail in FIG. and has a connected diode bridge switch circuit 310 connected

  to be made conductive by the signal provided by the winding se-

  terminal 312 of a pulse transformer 314 connected to the terminals of a diagonal bridge. The primary winding 316 of the transformer 314 is connected to be excited by a pulse applied to the input

  74 of the circuit 72 and coming from the timing circuit 34 of FIG. 1.

  This pulse is applied to the winding 316 through a door

  ET 318 with two inputs; one of these entries is constituted by

  74 and the other through the entry 76. Input 76 is connected to

  receive a memory enable signal, seen above, of "high noise level" in the ETA 200 of FIG. 4: an inverted version of this validation signal, provided by an inverter 320, is applied

  at the output 80 of the circuit 72 to inhibit the operation of the com-

50 and 52 of FIG. 1.

  The output signals produced by the amplifier 48 of FIG. 1 are applied, through the input 70 of the circuit 72, to the input of the other diagonal of the bridge circuit 310 whose output is connected, through

  a filtering capacitor 322, to an integrator 324.

  carries a high gain amplifier 326 having an input resistor 328 and parallel mounting of a capacitor 330 and a resistor

  332 connected to negative feedback between its output and its input.

  The output of the integrator 324 is connected to the input of a converter

  analog-digital 334 which has a validation input connected to the

  74 of the circuit 72 through a frequency divider 336.

  The digital output of the converter 334 is directed through a cir-

  switching oven 338 (shown in Fig. 5 as a simple

  inverter for clarity), to one of the two totalizers 340,342.

  The state of the switching circuit 338 is controlled by the ETA 200 of the

  Fig. 4 as explained below.

  The respective outputs of the totalizers 340,342 are connected to a digital subtraction circuit 344 whose output is compared with positive and negative thresholds in digital comparators 346 and 348 respectively. The respective outputs of comparators 346 and 348

  constitute the outputs 82, 84 of the circuit 72.

  In practice, the switching circuit 338, the totalizers 340,342,

  the subtraction circuit 344 and the comparators 346, 348 actually

  part of ETA 200 but have been shown separately for

pls of clarity.

  In the operating mode chosen by the switching of the memory

  re "high noise level" in V'ETA 200, the ETA puts the circuit of FIG. 1 in its internal operating mode by means of the input 38, prohibits the operation of the current source 14 and the current sink 16 by means of the input 36 and puts the switching circuit 338 in the illustrated state fig. . 5. The delay circuit 34 produces

  a pulse train at 1 kHz and approximately

  with each triggering pulse, makes the cir-

  baked bridge switch 310, by means of the input 74 of the circuit 72, during the interval o the brief initial excursion of high amplitude voltage of each voltage pulse that would have been induced in

  coil 44 by the corresponding test pulses (if these pulses

  tests had not been inhibited) would have occurred. independent

  their polarity, the noise impulses detected by the

24599 & 0

  44 of the probe 12/112 are transmitted by the switching circuit.

  310 to the filter capacitor 322 and the voltage level will vary.

  This capacitor is integrated by the integrator 324. After a predetermined number of trigger pulses, the analog-to-digital converter 334 is triggered by the frequency divider 336 to produce a digital signal representative of the voltage at the same time.

  output of the integrator whose time constant is chosen from

  However, this voltage represents the average level of the voltage on the filtering capacitor 322. The digital signal produced by the converter 334 is applied to the totalizer 340. This complete process is then reiterated about a hundred times, so that

  the totalizer 340 contains a digital signal representing the

  their average noise pulses detected by the coil 44 of the

donde 12/112.

  The ETA 200 then suppresses the inhibition signal on the input 36, permitting

  thus putting the operation of the current source 14 or the current sink 16 which has been chosen by way of the inputs 26, 28 of the circuit of FIG. 1, and sets the switching circuit 338 of FIG. 5 in

  his other state (that is, the one not shown) -. The process

  plet described in the previous paragraph is then repeated, only this time the pulses detected by the coil 44 of the probe 12/112 are

  both noise and current impulses applied to the

  yen of the probe. At the end of this repetition, the totalizer 342

  holds a digital signal representing the average value of the pulses induced by the test pulses and by the noise and detected by

the coil 44 of the probe 12/112.

  The digital signal in the totalizer 340 is then subtracted from that in the totalizer 342 and the result compared with the thresholds

  positive and negative applied to comparators 346 and 348. If the

  sultat is more positive than the positive threshold, the comparator 346 pro-

  produces an output signal, whereas if the result is more negative

  that the negative threshold, the comparator 348 produces an output signal.

  The output signals of the comparators 346, 348 are used in the circuit of FIG. 1 exactly the same way as the signals from

output of comparators 50,52.

  it should be noted that the average value of the noise pulses is

  somewhat low, while the average value of

  induced by the test pulses is probably strongly positive or negative, depending on the polarity of the test pulses and the direction of the defect with respect to the point of application of the pulses

test.

  As a result, in the mode of operation just described, the sign of the pulses induced by the test pulses detected by the detector 12/112 can be determined surely even in the presence of

  noise pulses of the same order of magnitude as the internal pulses

driven by the test pulses.

  If desired, another comparator (not shown) may be

  linked to the output of the totalizer 340 (ie the totalizer of the mean value of the noise pulses), and arranged to produce

  warning indication if the overall average value of

  noise level exceeds a predetermined level. In addition, the convert

  334 can be triggered asynchronously by ETA 200 instead

  than synchronously through the frequency divider 336, tan-

  say that the frequency of the trigger pulses produced by the timing circuit 34 in its internal operating mode can be increased from the 1 kHz frequency mentioned above

up to several tens of kHz.

  Many modifications can be made to the modes of

  of the invention described as examples. Thus, the current probe 112 may, if desired, be separated from the rest of the apparatus of FIG. 3, that is, the current may be injected at a point in the conductor or node and its effects detected at another point in the same conductor or node. Also, the two indicators 156, 158 which typically comprise light-emitting diodes, can

  being on the same side of the box 102 and associated with arrows (or

  gues): an arrow is pointing downwards to indicate that the de-

  must be in the part of the driver or node on the side of the

  tier 102 carrying the indicators, while the other arrow is

  to indicate that the defect is in the

  driver or node on the other side of the box 102.

  In addition, the apparatus of FIGS. 1 and 3 can be adapted for use as a voltage probe as well as a current probe, in which case it can be provided to stop the application of a current pulse and /

  warning if the logical state at the point of application

  tion of the current pulse begins to change in response to

  current pulse; alternatively, the current source 14 and the current sink 16 may be voltage limited so as to ensure

  besides that they can not change the logical state of the circuit to be tested.

  Still, the memory 228 of FIG. 4 can be, if it is

  sire, switchable by the operator in response to -the information displayed at VETA 200, rather than (or as well as) automatically switchable

by 'ETA.

Claims (12)

  1 - Method for testing a powered electronic circuit, characterized   in that it consists in: - applying a sequence of test signals to said circuit,   - memorize, in response to the detection of a fault in said cir-   baked during the application of said test signal sequence,   the number of the operation in said sequence for which   appears to be the fault, - to repeat the application of said sequence of test signals to the circuit by connecting means for applying a current pulse to a conductor of the circuit associated with the fault, - to automatically trigger said application means of a current pulse for applying a predetermined sign current pulse to said driver when said sequence reaches the numbered operation, and   determining the flow direction of said pulse of   along the conductor so as to allow the determination of   the direction of the defect in relation to the point on the con-   o driver is applied the pulse.   2 - Process according to claim 1, characterized in that the impulse   Current flow has an approximately triangular waveform   with a relatively steep front flank and a rear flank   less abrupt, and the operation of determining the   of the flow of said current pulse along the   conductor includes the detection of magnetic field   induced in the vicinity of said conductor by the leading edge of said pulse, and the production, in response to the detection of   field variations, of a signal indicative of said direction of flow (Fig. 2).   3 - Method for locating a fault in an electronic electronic circuit   characterized in that it consists of:   - apply to a driver of said circuit a current pulse   of predetermined sign and having an approximate waveform   triangular shape with a relatively steep leading edge and a relatively less abrupt   to detect induced magnetic field variations in the vicinity   ge of said conductor by said leading edge of said pulse, and producing, in response to the detection of said magnetic field variations, a signal indicative of the direction of the flow   of said current pulse along said conductor, of   to enable the determination of the direction of the defect   in relation to the point on the said conductor where the called impulse.   4 - Method for locating a fault in an electronic electronic circuit   characterized in that it consists in a) putting said circuit in a state where the defect is apparent, b) locating the node of the circuit where the defect originates,   (c) repeatedly apply to a driver of that circuit over   said node of the current pulses of the same predetermined sign   born, each pulse having an approximately triangular waveform with a relatively steep leading edge and a relatively less abrupt trailing edge,   d) detect induced magnetic field variations in the vicinity of   swimming said conductor by the leading edge of each pulse   in order to produce respective first signals representing   said pulsed variations, e) integrating a predetermined number of said first signals to produce a signal representative of their average value,   f) detecting induced magnetic field variations in the vicinity of   said driver, in the absence of any application of the said   pulses, by noise currents in said circuit, of   to produce other signals representative of the said   induced by noise, g) integrating a predetermined number of said other signals to produce a signal representative of their average value, and   h) produce, in response to the amplitude and polarity of the difference   between the average values of the first and second   cond signals, a signal indicative of the direction of flow   said current pulses along said conductor,   to enable the determination of the direction of said defect with respect to the point on said conductor where said pulses.   Method according to Claim 4, characterized in that the operations   rations f) and g) are performed before operations c), d) and e).   6 - Process according to one of the preceding claims, characterized   in that it consists, moreover, in automatically performing the said   determining the direction of the defect in response to the predetermined sign   completed the current pulse or pulses and to the direction   flow thereof along the conductor.   7 - Process according to one of the preceding claims, characterized   in that the amplitude of the current pulse or pulses is   chosen insufficient to change the logic state of the circuit.   8 - Apparatus for testing a powered electronic circuit, characterized   characterized in that it comprises: - means (200) for applying a circuit test signal sequence; - means (224,228) for storing in response to detection of a fault in said circuit during the application of said sequence of test signals, the number of the operation in said sequence for which the fault appears, - means (12, 14, 16) for applying a predetermined sign current pulse to a driver of the circuit associated with the default   means (226, 232, 210) for triggering the means of application   tion of the current pulse to apply such an impulse   when said sequence, during a new application thereof to the circuit, reaches the operation whose number has been stored, and - means (44 to 52) for determining the direction of flow of said current pulse along of the driver so as to allow (in 54) the determination of the direction of the defect   compared to the point on the driver where the impulse if we.   9 - Apparatus according to claim 8, characterized in that the   yens (12, 14, 16) for applying a current pulse are pre-   seen to produce a current pulse having a waveform   approximately triangular with a front flank relatively   and a means (44 to 52) for determining the flow direction of the current preferably comprise means (44, 46) arranged to detect induced magnetic field variations. in the neighbourhood   said conductor by the leading edge of said pulse and   yens (50,52) corresponding to the sign of said magnetic field variations   to produce a signal indicative of said direction of flow. the current.   Apparatus for locating a fault in a powered electronic circuit, characterized in that it comprises   means arranged (12, 14, 16) for applying to a driver   said circuit a current pulse of predetermined sign and having an approximately triangular waveform with a   relatively steep front flank and a relatively   less abruptly, - means (44, 46) arranged to detect magnetic field variations induced in the vicinity of said conductor by said leading edge of said pulse, and - means (50, 52) corresponding to the direction of said variations of said   magnetic field to produce a signal indicative of the direction   flow of said current pulse along said conductor so as to enable (54) the determination of the direction of said defect with respect to the point on said conductor o is applied said pulse.   11 - Apparatus for locating a fault in an electronic circuit a-   limenté, characterized in that it comprises: - means (34) arranged to apply in a repetitive manner to a   conduct of said current signal current pulse circuit   -defined and each having an approximately triangular waveform with a relatively steep leading edge and a relatively less abrupt trailing edge, - means (44, 46) arranged to detect induced magnetic field variations in the vicinity of said conductor by the flank before each of said pulses and by noise currents   in said circuit so as to produce signals representing   of said pulse-induced and noise-induced variations, integrating means (324) arranged to receive and integrate first and second sets of said representative signals   variations to produce respective signals representing   respective average values of said first and second sets of said signals representative of the variations, one of said first and second sets of signals being generated in response to both said pulses and said noise, and the other being generated in response only to said noise; , and   - means (344,346,348) corresponding to the amplitude and polarity   the difference between the two signals representative of   means to produce a signal indicative of the direction of   flow of said current pulses along said conductor   in such a way as to enable the direction of said defect to be determined with respect to the point on said conductor o are applied said pulses.   12 - Apparatus according to one of claims 9 to 11, characterized in   the means (14, 16) for applying a current pulse comprise a differentiator circuit designed to produce said triangular waveform at its output in response to a signal at steep front at his entrance.   13 - Apparatus according to one of claims 9 to 12, characterized in   the detection means comprise a coil (144) wound   around a U-shaped core (146) and that the means of   of a current pulse include a conductive element   tor (112) disposed between the limbs of said core (146).   14 - Apparatus according to one of claims 8 to 13, characterized in   what it entails, besides, means (54,56,58) answering the   predetermined sign of the current pulse or pulses and at the   flow of these along the conductor to   undermine and indicate the direction of the defect.   Apparatus according to one of Claims 8 to 14, characterized in that   what the amplitude of each current pulse is chosen is   sufficient to modify the logic state of said circuit.