FR2447078B1 - Unite d'antememoire a dispositif de lecture simultanee d'instructions - Google Patents

Unite d'antememoire a dispositif de lecture simultanee d'instructions

Info

Publication number
FR2447078B1
FR2447078B1 FR7930207A FR7930207A FR2447078B1 FR 2447078 B1 FR2447078 B1 FR 2447078B1 FR 7930207 A FR7930207 A FR 7930207A FR 7930207 A FR7930207 A FR 7930207A FR 2447078 B1 FR2447078 B1 FR 2447078B1
Authority
FR
France
Prior art keywords
antememory
unit
simultaneously reading
reading instructions
instructions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7930207A
Other languages
English (en)
Other versions
FR2447078A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/968,050 external-priority patent/US4312036A/en
Priority claimed from US05/968,049 external-priority patent/US4313158A/en
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of FR2447078A1 publication Critical patent/FR2447078A1/fr
Application granted granted Critical
Publication of FR2447078B1 publication Critical patent/FR2447078B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0855—Overlapped cache accessing, e.g. pipeline
    • G06F12/0859—Overlapped cache accessing, e.g. pipeline with reload from main memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3814—Implementation provisions of instruction buffers, e.g. prefetch buffer; banks
FR7930207A 1978-12-11 1979-12-10 Unite d'antememoire a dispositif de lecture simultanee d'instructions Expired FR2447078B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/968,050 US4312036A (en) 1978-12-11 1978-12-11 Instruction buffer apparatus of a cache unit
US05/968,049 US4313158A (en) 1978-12-11 1978-12-11 Cache apparatus for enabling overlap of instruction fetch operations

Publications (2)

Publication Number Publication Date
FR2447078A1 FR2447078A1 (fr) 1980-08-14
FR2447078B1 true FR2447078B1 (fr) 1986-05-30

Family

ID=27130504

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7930207A Expired FR2447078B1 (fr) 1978-12-11 1979-12-10 Unite d'antememoire a dispositif de lecture simultanee d'instructions

Country Status (3)

Country Link
DE (1) DE2949787A1 (fr)
FR (1) FR2447078B1 (fr)
GB (2) GB2037037B (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4467411A (en) * 1981-03-06 1984-08-21 International Business Machines Corporation Scheduling device operations in a buffered peripheral subsystem
CA2086691C (fr) * 1992-03-30 1997-04-08 David A. Elko Transmission de messages entre des processeurs et un dispositif de couplage
US7013305B2 (en) 2001-10-01 2006-03-14 International Business Machines Corporation Managing the state of coupling facility structures, detecting by one or more systems coupled to the coupling facility, the suspended state of the duplexed command, detecting being independent of message exchange
US6341331B1 (en) * 1999-10-01 2002-01-22 International Business Machines Corporation Method and system for managing a raid storage system with cache

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5021821B1 (fr) * 1968-10-31 1975-07-25
US3588829A (en) * 1968-11-14 1971-06-28 Ibm Integrated memory system with block transfer to a buffer store
DE2501119C3 (de) * 1975-01-14 1979-04-12 International Computers Ltd., London Datenverarbeitungseinrichtung
DE2509835C3 (de) * 1975-03-06 1980-11-06 Siemens Ag, 1000 Berlin Und 8000 Muenchen Arbeitsspeicheranordnung
AU529675B2 (en) * 1977-12-07 1983-06-16 Honeywell Information Systems Incorp. Cache memory unit

Also Published As

Publication number Publication date
GB2072905B (en) 1983-08-03
FR2447078A1 (fr) 1980-08-14
GB2037037A (en) 1980-07-02
GB2072905A (en) 1981-10-07
GB2037037B (en) 1983-07-27
DE2949787A1 (de) 1980-06-12

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Legal Events

Date Code Title Description
ST Notification of lapse