FR2352461B1 - - Google Patents
Info
- Publication number
- FR2352461B1 FR2352461B1 FR7715609A FR7715609A FR2352461B1 FR 2352461 B1 FR2352461 B1 FR 2352461B1 FR 7715609 A FR7715609 A FR 7715609A FR 7715609 A FR7715609 A FR 7715609A FR 2352461 B1 FR2352461 B1 FR 2352461B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
- G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/688,668 US4035780A (en) | 1976-05-21 | 1976-05-21 | Priority interrupt logic circuits |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2352461A1 FR2352461A1 (fr) | 1977-12-16 |
| FR2352461B1 true FR2352461B1 (US07642317-20100105-C00010.png) | 1983-08-19 |
Family
ID=24765296
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7715609A Granted FR2352461A1 (fr) | 1976-05-21 | 1977-05-20 | Circuits logiques d'interruption par priorites |
Country Status (8)
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4320502A (en) * | 1978-02-22 | 1982-03-16 | International Business Machines Corp. | Distributed priority resolution system |
| US4255789A (en) * | 1978-02-27 | 1981-03-10 | The Bendix Corporation | Microprocessor-based electronic engine control system |
| JPS55137358A (en) * | 1979-04-16 | 1980-10-27 | Nissan Motor Co Ltd | Controller for automobile |
| BE887134A (fr) * | 1979-12-14 | 1981-05-14 | Gte Automatic Electric Lab Inc | Circuit expanseur d'interruption |
| US4382284A (en) * | 1981-04-15 | 1983-05-03 | Honeywell Inc. | Command and residual priority control of loads |
| DE3140310C1 (de) * | 1981-10-10 | 1983-04-07 | Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt | Schaltungsanordnung zur Speicherung von eine Datenverarbeitungseinrichtung weiterzugebenden Daten |
| US4523277A (en) * | 1982-09-30 | 1985-06-11 | Ncr Corporation | Priority interrupt system for microcomputer |
| US5083261A (en) * | 1983-11-03 | 1992-01-21 | Motorola, Inc. | Dynamically alterable interrupt priority circuit |
| US4631670A (en) * | 1984-07-11 | 1986-12-23 | Ibm Corporation | Interrupt level sharing |
| GB2167583B (en) * | 1984-11-23 | 1988-11-02 | Nat Res Dev | Apparatus and methods for processing an array of items of data |
| US4788640A (en) * | 1986-01-17 | 1988-11-29 | Intel Corporation | Priority logic system |
| US4802087A (en) * | 1986-06-27 | 1989-01-31 | Honeywell Bull Inc. | Multiprocessor level change synchronization apparatus |
| US4961067A (en) * | 1986-07-28 | 1990-10-02 | Motorola, Inc. | Pattern driven interrupt in a digital data processor |
| US4839800A (en) * | 1986-08-29 | 1989-06-13 | Bull Hn Information Systems Inc. | Data processing system with a fast interrupt |
| US4821177A (en) * | 1986-09-02 | 1989-04-11 | Honeywell Bull Inc. | Apparatus for controlling system accesses having multiple command level conditional rotational multiple port servicing priority hierarchy |
| JPH0746310B2 (ja) * | 1987-06-30 | 1995-05-17 | 三菱電機株式会社 | 半導体論理回路 |
| US5072365A (en) * | 1989-12-27 | 1991-12-10 | Motorola, Inc. | Direct memory access controller using prioritized interrupts for varying bus mastership |
| DE69224427T2 (de) * | 1991-12-04 | 1998-08-13 | Koninkl Philips Electronics Nv | Arbiter mit einem unter Prioritätskonfliktskontrolle veränderlichen direkten Signal |
| DE69226011T2 (de) * | 1991-12-04 | 1999-02-04 | Philips Electronics N.V., Eindhoven | Arbiter mit einer gleichmässig verteilten Architektur |
| US5341052A (en) * | 1991-12-04 | 1994-08-23 | North American Philips Corporation | Arbiter with test capability and associated testing method |
| JPH07105175A (ja) * | 1993-10-08 | 1995-04-21 | Nec Corp | マイクロコンピュータ |
| US5958036A (en) * | 1997-09-08 | 1999-09-28 | Lucent Technologies Inc. | Circuit for arbitrating interrupts with programmable priority levels |
| US6694398B1 (en) * | 2001-04-30 | 2004-02-17 | Nokia Corporation | Circuit for selecting interrupt requests in RISC microprocessors |
| WO2004114132A1 (ja) * | 2003-06-20 | 2004-12-29 | Fujitsu Limited | 割り込み制御方法、割り込み制御装置及び割り込み制御プログラム |
| JP4731126B2 (ja) * | 2004-03-30 | 2011-07-20 | ルネサスエレクトロニクス株式会社 | 割り込み制御回路 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3421150A (en) * | 1966-08-26 | 1969-01-07 | Sperry Rand Corp | Multiprocessor interrupt directory |
| US3534339A (en) * | 1967-08-24 | 1970-10-13 | Burroughs Corp | Service request priority resolver and encoder |
| DE2210426C2 (de) * | 1972-03-03 | 1973-11-08 | Nixdorf Computer Ag, 4790 Paderborn | Verfahren zur vorranggesteuerten Auswahl einer von mehreren Funktions einheiten zur Anschaltung an eine ihnen gemeinsam zugeordnete Einrichtung in Datenverarbeitungsanlagen und Schaltung zur Durchführung des Verfahrens |
| IT971304B (it) * | 1972-11-29 | 1974-04-30 | Honeywell Inf Systems | Sistema di accesso a priorita variabile dinamicamente |
| US3889237A (en) * | 1973-11-16 | 1975-06-10 | Sperry Rand Corp | Common storage controller for dual processor system |
| US4006466A (en) * | 1975-03-26 | 1977-02-01 | Honeywell Information Systems, Inc. | Programmable interface apparatus and method |
-
1976
- 1976-05-21 US US05/688,668 patent/US4035780A/en not_active Expired - Lifetime
-
1977
- 1977-03-24 CA CA274,648A patent/CA1095628A/en not_active Expired
- 1977-04-12 AU AU24172/77A patent/AU505582B2/en not_active Expired
- 1977-05-16 DE DE19772722124 patent/DE2722124A1/de not_active Withdrawn
- 1977-05-17 GB GB20709/77A patent/GB1540960A/en not_active Expired
- 1977-05-18 BE BE177713A patent/BE854804A/xx unknown
- 1977-05-18 JP JP52057526A patent/JPS6029138B2/ja not_active Expired
- 1977-05-20 FR FR7715609A patent/FR2352461A1/fr active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| AU2417277A (en) | 1978-10-19 |
| GB1540960A (en) | 1979-02-21 |
| US4035780A (en) | 1977-07-12 |
| AU505582B2 (en) | 1979-11-22 |
| CA1095628A (en) | 1981-02-10 |
| FR2352461A1 (fr) | 1977-12-16 |
| DE2722124A1 (de) | 1977-12-08 |
| BE854804A (fr) | 1977-09-16 |
| JPS6029138B2 (ja) | 1985-07-09 |
| JPS52142940A (en) | 1977-11-29 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |