FR2336833B1 - - Google Patents

Info

Publication number
FR2336833B1
FR2336833B1 FR7539720A FR7539720A FR2336833B1 FR 2336833 B1 FR2336833 B1 FR 2336833B1 FR 7539720 A FR7539720 A FR 7539720A FR 7539720 A FR7539720 A FR 7539720A FR 2336833 B1 FR2336833 B1 FR 2336833B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7539720A
Other languages
French (fr)
Other versions
FR2336833A1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SP K BJUR
Original Assignee
SP K BJUR
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SP K BJUR filed Critical SP K BJUR
Priority to FR7539720A priority Critical patent/FR2336833A1/en
Publication of FR2336833A1 publication Critical patent/FR2336833A1/en
Application granted granted Critical
Publication of FR2336833B1 publication Critical patent/FR2336833B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/10—Arrangements for initial synchronisation
FR7539720A 1975-12-24 1975-12-24 Clock pulse synchronising cct. for transmitter and receivers - has counted pulses equal to phase shift of receiver clock pulses and start signal Granted FR2336833A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7539720A FR2336833A1 (en) 1975-12-24 1975-12-24 Clock pulse synchronising cct. for transmitter and receivers - has counted pulses equal to phase shift of receiver clock pulses and start signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7539720A FR2336833A1 (en) 1975-12-24 1975-12-24 Clock pulse synchronising cct. for transmitter and receivers - has counted pulses equal to phase shift of receiver clock pulses and start signal

Publications (2)

Publication Number Publication Date
FR2336833A1 FR2336833A1 (en) 1977-07-22
FR2336833B1 true FR2336833B1 (en) 1978-06-30

Family

ID=9164159

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7539720A Granted FR2336833A1 (en) 1975-12-24 1975-12-24 Clock pulse synchronising cct. for transmitter and receivers - has counted pulses equal to phase shift of receiver clock pulses and start signal

Country Status (1)

Country Link
FR (1) FR2336833A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0770991B2 (en) * 1986-08-27 1995-07-31 日本電気株式会社 Clock reproduction circuit

Also Published As

Publication number Publication date
FR2336833A1 (en) 1977-07-22

Similar Documents

Publication Publication Date Title
FR2309088B1 (en)
FR2306832B1 (en)
JPS5417349B2 (en)
JPS5187471A (en)
JPS5235585U (en)
JPS5611106B2 (en)
JPS5724832B2 (en)
JPS5429342Y2 (en)
JPS5531248Y2 (en)
JPS557011Y2 (en)
AU495836B2 (en)
JPS52124743U (en)
JPS5194768U (en)
JPS5275355U (en)
JPS51128717U (en)
JPS51113226U (en)
BG23043A1 (en)
CH304475A4 (en)
CH584833A5 (en)
CH587115A5 (en)
CH587761A5 (en)
CH588603A5 (en)
CH589394A5 (en)
CH589454A5 (en)
CH590087A5 (en)

Legal Events

Date Code Title Description
ST Notification of lapse