FR2334244A1 - Simultaneous multi subscriber PCM circuit - reduces computation time using sequential addition and subtraction operations at constant rate - Google Patents
Simultaneous multi subscriber PCM circuit - reduces computation time using sequential addition and subtraction operations at constant rateInfo
- Publication number
- FR2334244A1 FR2334244A1 FR7537102A FR7537102A FR2334244A1 FR 2334244 A1 FR2334244 A1 FR 2334244A1 FR 7537102 A FR7537102 A FR 7537102A FR 7537102 A FR7537102 A FR 7537102A FR 2334244 A1 FR2334244 A1 FR 2334244A1
- Authority
- FR
- France
- Prior art keywords
- constant rate
- computation time
- sequential addition
- simultaneous multi
- subtraction operations
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/42—Systems providing special services or facilities to subscribers
- H04M3/56—Arrangements for connecting several subscribers to a common circuit, i.e. affording conference facilities
- H04M3/561—Arrangements for connecting several subscribers to a common circuit, i.e. affording conference facilities by multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
A communications circuit uses PCM techniques allowing simultaneous use by more than two subscribers. The design is intended to minimise the computation required and the time involved in the various operations. The switching, carried out at a constant repetition rate, is to an input memory where the non-linear subscriber codes are fed in as groups. The codes are converted to a linear form in an expansion circuit. Computation is by an add and subtract circuit. Each memory group is read twice in succession, alternate subtraction and addition occurring during the two periods. Two registers are employed, one being inhibited during substraction and reset to zero at the start of the addition phase.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7537102A FR2334244A1 (en) | 1975-12-04 | 1975-12-04 | Simultaneous multi subscriber PCM circuit - reduces computation time using sequential addition and subtraction operations at constant rate |
BE2055501A BE848969R (en) | 1975-12-04 | 1976-12-02 | CONFERENCE CIRCUIT FOR MIC SWITCHING NETWORK |
ES453929A ES453929A1 (en) | 1975-12-04 | 1976-12-03 | A circuit for conference for a mic shuttering mesh. (Machine-translation by Google Translate, not legally binding) |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7537102A FR2334244A1 (en) | 1975-12-04 | 1975-12-04 | Simultaneous multi subscriber PCM circuit - reduces computation time using sequential addition and subtraction operations at constant rate |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2334244A1 true FR2334244A1 (en) | 1977-07-01 |
FR2334244B1 FR2334244B1 (en) | 1979-07-13 |
Family
ID=9163306
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7537102A Granted FR2334244A1 (en) | 1975-12-04 | 1975-12-04 | Simultaneous multi subscriber PCM circuit - reduces computation time using sequential addition and subtraction operations at constant rate |
Country Status (3)
Country | Link |
---|---|
BE (1) | BE848969R (en) |
ES (1) | ES453929A1 (en) |
FR (1) | FR2334244A1 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0004307A1 (en) * | 1978-03-16 | 1979-10-03 | Siemens Aktiengesellschaft | Process for the establishment of conference connections in a PCM-time multiplex switching system |
EP0005833A1 (en) * | 1978-06-05 | 1979-12-12 | Siemens Aktiengesellschaft | Method and circuit for establishing conference connections in a PCM-time multiplex switching system |
FR2472318A1 (en) * | 1979-12-18 | 1981-06-26 | Telecommunications Sa | Telephone conference system - adds samples of selected subscriber channels and retransmits and distributes sum to subscribers as second order digital signal |
EP0120552A1 (en) * | 1983-01-18 | 1984-10-03 | Plessey Overseas Limited | Conference bridge |
-
1975
- 1975-12-04 FR FR7537102A patent/FR2334244A1/en active Granted
-
1976
- 1976-12-02 BE BE2055501A patent/BE848969R/en not_active IP Right Cessation
- 1976-12-03 ES ES453929A patent/ES453929A1/en not_active Expired
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0004307A1 (en) * | 1978-03-16 | 1979-10-03 | Siemens Aktiengesellschaft | Process for the establishment of conference connections in a PCM-time multiplex switching system |
EP0005833A1 (en) * | 1978-06-05 | 1979-12-12 | Siemens Aktiengesellschaft | Method and circuit for establishing conference connections in a PCM-time multiplex switching system |
FR2472318A1 (en) * | 1979-12-18 | 1981-06-26 | Telecommunications Sa | Telephone conference system - adds samples of selected subscriber channels and retransmits and distributes sum to subscribers as second order digital signal |
EP0120552A1 (en) * | 1983-01-18 | 1984-10-03 | Plessey Overseas Limited | Conference bridge |
Also Published As
Publication number | Publication date |
---|---|
BE848969R (en) | 1977-06-02 |
FR2334244B1 (en) | 1979-07-13 |
ES453929A1 (en) | 1977-11-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |