FR2313709B1 - - Google Patents

Info

Publication number
FR2313709B1
FR2313709B1 FR7443623A FR7443623A FR2313709B1 FR 2313709 B1 FR2313709 B1 FR 2313709B1 FR 7443623 A FR7443623 A FR 7443623A FR 7443623 A FR7443623 A FR 7443623A FR 2313709 B1 FR2313709 B1 FR 2313709B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7443623A
Other languages
French (fr)
Other versions
FR2313709A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Priority to FR7443623A priority Critical patent/FR2313709A1/fr
Publication of FR2313709A1 publication Critical patent/FR2313709A1/fr
Application granted granted Critical
Publication of FR2313709B1 publication Critical patent/FR2313709B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/08—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations, the intermediate ones not being accessible for either enqueue or dequeue operations, e.g. using a shift register
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/20—Signal processing not specific to the method of recording or reproducing; Circuits therefor for correction of skew for multitrack recording
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Signal Processing (AREA)
  • Complex Calculations (AREA)
FR7443623A 1974-12-31 1974-12-31 Dispositifs de circuits intermediaires Granted FR2313709A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7443623A FR2313709A1 (fr) 1974-12-31 1974-12-31 Dispositifs de circuits intermediaires

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7443623A FR2313709A1 (fr) 1974-12-31 1974-12-31 Dispositifs de circuits intermediaires

Publications (2)

Publication Number Publication Date
FR2313709A1 FR2313709A1 (fr) 1976-12-31
FR2313709B1 true FR2313709B1 (Direct) 1978-05-05

Family

ID=9146936

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7443623A Granted FR2313709A1 (fr) 1974-12-31 1974-12-31 Dispositifs de circuits intermediaires

Country Status (1)

Country Link
FR (1) FR2313709A1 (Direct)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4115759A (en) * 1977-08-08 1978-09-19 Honeywell Information Systems Inc. Multiple bit deskew buffer

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3851335A (en) * 1973-07-30 1974-11-26 Ibm Buffer systems

Also Published As

Publication number Publication date
FR2313709A1 (fr) 1976-12-31

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Legal Events

Date Code Title Description
ST Notification of lapse