FR2296247A1 - Procede et dispositif pour le controle d'une memoire numerique - Google Patents

Procede et dispositif pour le controle d'une memoire numerique

Info

Publication number
FR2296247A1
FR2296247A1 FR7539470A FR7539470A FR2296247A1 FR 2296247 A1 FR2296247 A1 FR 2296247A1 FR 7539470 A FR7539470 A FR 7539470A FR 7539470 A FR7539470 A FR 7539470A FR 2296247 A1 FR2296247 A1 FR 2296247A1
Authority
FR
France
Prior art keywords
control
digital memory
digital
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7539470A
Other languages
English (en)
Other versions
FR2296247B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of FR2296247A1 publication Critical patent/FR2296247A1/fr
Application granted granted Critical
Publication of FR2296247B1 publication Critical patent/FR2296247B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/10Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
FR7539470A 1974-12-23 1975-12-23 Procede et dispositif pour le controle d'une memoire numerique Granted FR2296247A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7416755A NL7416755A (nl) 1974-12-23 1974-12-23 Werkwijze en inrichting voor het testen van een digitaal geheugen.

Publications (2)

Publication Number Publication Date
FR2296247A1 true FR2296247A1 (fr) 1976-07-23
FR2296247B1 FR2296247B1 (fr) 1982-01-15

Family

ID=19822708

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7539470A Granted FR2296247A1 (fr) 1974-12-23 1975-12-23 Procede et dispositif pour le controle d'une memoire numerique

Country Status (10)

Country Link
US (1) US4061908A (fr)
JP (1) JPS5617760B2 (fr)
BE (1) BE837039A (fr)
CA (1) CA1051556A (fr)
DE (1) DE2556187A1 (fr)
FR (1) FR2296247A1 (fr)
GB (1) GB1536857A (fr)
IT (1) IT1051535B (fr)
NL (1) NL7416755A (fr)
SE (1) SE403847B (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997004459A1 (fr) * 1995-07-14 1997-02-06 National Semiconductor Corporation Autotest integre pour plusieurs memoires vives
US6041426A (en) * 1995-04-07 2000-03-21 National Semiconductor Corporation Built in self test BIST for RAMS using a Johnson counter as a source of data

Families Citing this family (46)

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JPS54947A (en) * 1977-06-06 1979-01-06 Hitachi Ltd Failure detection system for digital output circuit
JPS585479B2 (ja) * 1977-09-30 1983-01-31 株式会社日立製作所 磁気バブルメモリ試験方法
JPS5552581A (en) * 1978-10-11 1980-04-17 Advantest Corp Pattern generator
US4195770A (en) * 1978-10-24 1980-04-01 Burroughs Corporation Test generator for random access memories
DE2852985C2 (de) * 1978-12-07 1983-04-14 Siemens AG, 1000 Berlin und 8000 München Verfahren für die Ansteuerung eines Speichers, insbesondere in Fernsprechvermittlungsanlagen
US4271512A (en) * 1979-03-30 1981-06-02 Lyhus Arlan J Information collection and storage system with memory test circuit
US4243937A (en) * 1979-04-06 1981-01-06 General Instrument Corporation Microelectronic device and method for testing same
US4301535A (en) * 1979-07-02 1981-11-17 Mostek Corporation Programmable read only memory integrated circuit with bit-check and deprogramming modes and methods for programming and testing said circuit
US4495603A (en) * 1980-07-31 1985-01-22 Varshney Ramesh C Test system for segmented memory
US4335457A (en) * 1980-08-08 1982-06-15 Fairchild Camera & Instrument Corp. Method for semiconductor memory testing
WO1983002164A1 (fr) * 1981-12-17 1983-06-23 Ryan, Philip, Meade Dispositif de localisation a haute vitesse de defauts dans les memoires etendues
US4456995A (en) * 1981-12-18 1984-06-26 International Business Machines Corporation Apparatus for high speed fault mapping of large memories
FR2539887B1 (fr) * 1983-01-20 1985-07-26 Tech Europ Commutation Procede pour assurer la securite du fonctionnement d'un automate programmable et automate pour la mise en oeuvre du procede
JPS6048545A (ja) * 1983-08-26 1985-03-16 Nec Corp マイクロコンピユ−タ
US4608687A (en) * 1983-09-13 1986-08-26 International Business Machines Corporation Bit steering apparatus and method for correcting errors in stored data, storing the address of the corrected data and using the address to maintain a correct data condition
US4661930A (en) * 1984-08-02 1987-04-28 Texas Instruments Incorporated High speed testing of integrated circuit
KR900005666B1 (ko) * 1984-08-30 1990-08-03 미쓰비시전기 주식회사 반도체기억장치
US4674090A (en) * 1985-01-28 1987-06-16 Signetics Corporation Method of using complementary logic gates to test for faults in electronic components
US4715034A (en) * 1985-03-04 1987-12-22 John Fluke Mfg. Co., Inc. Method of and system for fast functional testing of random access memories
US4669082A (en) * 1985-05-09 1987-05-26 Halliburton Company Method of testing and addressing a magnetic core memory
US4712213A (en) * 1985-12-11 1987-12-08 Northern Telecom Limited Flip status line
IT1201837B (it) * 1986-07-22 1989-02-02 Sgs Microelettronica Spa Sistema per la verifica della funzionalita' e delle caratteristiche di dispositivi a semiconduttore di tipo eprom durante il "burn-in"
US4872168A (en) * 1986-10-02 1989-10-03 American Telephone And Telegraph Company, At&T Bell Laboratories Integrated circuit with memory self-test
US4891811A (en) * 1987-02-13 1990-01-02 International Business Machines Corporation Efficient address test for large memories
US4801869A (en) * 1987-04-27 1989-01-31 International Business Machines Corporation Semiconductor defect monitor for diagnosing processing-induced defects
US4873705A (en) * 1988-01-27 1989-10-10 John Fluke Mfg. Co., Inc. Method of and system for high-speed, high-accuracy functional testing of memories in microprocessor-based units
US4876684A (en) * 1988-02-11 1989-10-24 John Fluke Mfg. Co., Inc. Method of and apparatus for diagnosing failures in read only memory systems and the like
US5023874A (en) * 1989-02-23 1991-06-11 Texas Instruments Incorporated Screening logic circuits for preferred states
JPH0317760A (ja) * 1989-06-14 1991-01-25 Mitsubishi Electric Corp データ書込み確認方式
US5070502A (en) * 1989-06-23 1991-12-03 Digital Equipment Corporation Defect tolerant set associative cache
AU660011B2 (en) * 1991-04-26 1995-06-08 Nec Corporation Method and system for fault coverage testing memory
US5457695A (en) * 1992-02-27 1995-10-10 Texas Instruments Incorporated Method and system for screening logic circuits
US5381419A (en) * 1993-03-01 1995-01-10 At&T Corp. Method and apparatus for detecting retention faults in memories
DE4402122A1 (de) * 1994-01-21 1995-07-27 Siemens Ag Verfahren zum Test von digitalen Speichereinrichtungen
US5588046A (en) * 1995-10-23 1996-12-24 Casio Phonemate, Inc. Digital telephone answering device and method of testing message storage memory therein
US5996106A (en) * 1997-02-04 1999-11-30 Micron Technology, Inc. Multi bank test mode for memory devices
US5913928A (en) 1997-05-09 1999-06-22 Micron Technology, Inc. Data compression test mode independent of redundancy
KR100305679B1 (ko) * 1999-02-24 2001-09-26 윤종용 반도체 메모리 장치의 테스터의 테스터 방법 및 그 장치
JP2001067899A (ja) * 1999-08-31 2001-03-16 Toshiba Corp 半導体記憶装置
US6421794B1 (en) 2000-03-09 2002-07-16 John T. Chen Method and apparatus for diagnosing memory using self-testing circuits
US6701472B2 (en) * 2001-02-09 2004-03-02 Adc Telecommunications Israel, Ltd. Methods for tracing faults in memory components
DE10133689C2 (de) * 2001-07-11 2003-12-18 Infineon Technologies Ag Testverfahren und Testvorrichtung für elektronische Speicher
US6968479B2 (en) * 2002-03-06 2005-11-22 Hewlett-Packard Development Company, L.P. Verifying data in a data storage device
CN100337285C (zh) * 2004-07-13 2007-09-12 海信集团有限公司 一种对NAND flash存储器进行物理损坏模拟的系统及其方法
WO2017058111A1 (fr) * 2015-09-28 2017-04-06 Agency For Science, Technology And Research Procédé de détection d'erreur dans un dispositif de mémoire vive magnétique à champ électrique oscillant (tef-ram), et dispositif tef-ram
CN112102875B (zh) * 2020-09-23 2023-04-11 深圳佰维存储科技股份有限公司 Lpddr测试方法、装置、可读存储介质及电子设备

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2242279C3 (de) * 1972-08-28 1979-11-15 Siemens Ag, 1000 Berlin Und 8000 Muenchen Schaltungsanordnung zur Ermittlung von Fehlern in einer Speichereinheit eines programmgesteuerten Datenvermittlungssystems

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5689466A (en) * 1995-04-07 1997-11-18 National Semiconductor Corporation Built in self test (BIST) for multiple RAMs
US6041426A (en) * 1995-04-07 2000-03-21 National Semiconductor Corporation Built in self test BIST for RAMS using a Johnson counter as a source of data
WO1997004459A1 (fr) * 1995-07-14 1997-02-06 National Semiconductor Corporation Autotest integre pour plusieurs memoires vives

Also Published As

Publication number Publication date
FR2296247B1 (fr) 1982-01-15
NL7416755A (nl) 1976-06-25
SE7514414L (sv) 1976-06-24
JPS5189354A (fr) 1976-08-05
JPS5617760B2 (fr) 1981-04-24
DE2556187A1 (de) 1976-07-01
CA1051556A (fr) 1979-03-27
IT1051535B (it) 1981-05-20
BE837039A (fr) 1976-06-23
GB1536857A (en) 1978-12-20
US4061908A (en) 1977-12-06
SE403847B (sv) 1978-09-04

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