FR2286439B1 - - Google Patents

Info

Publication number
FR2286439B1
FR2286439B1 FR7529287A FR7529287A FR2286439B1 FR 2286439 B1 FR2286439 B1 FR 2286439B1 FR 7529287 A FR7529287 A FR 7529287A FR 7529287 A FR7529287 A FR 7529287A FR 2286439 B1 FR2286439 B1 FR 2286439B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7529287A
Other languages
French (fr)
Other versions
FR2286439A1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Data General Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/509,183 external-priority patent/US3931613A/en
Application filed by Data General Corp filed Critical Data General Corp
Publication of FR2286439A1 publication Critical patent/FR2286439A1/en
Application granted granted Critical
Publication of FR2286439B1 publication Critical patent/FR2286439B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18Handling requests for interconnection or transfer for access to memory bus based on priority control
FR7529287A 1974-09-25 1975-09-24 Single memory unit access system for multiple central processors - has multiprocessor control for time shared address and data transfers Granted FR2286439A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US50915974A 1974-09-25 1974-09-25
US05/509,183 US3931613A (en) 1974-09-25 1974-09-25 Data processing system

Publications (2)

Publication Number Publication Date
FR2286439A1 FR2286439A1 (en) 1976-04-23
FR2286439B1 true FR2286439B1 (en) 1983-06-17

Family

ID=27056452

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7529287A Granted FR2286439A1 (en) 1974-09-25 1975-09-24 Single memory unit access system for multiple central processors - has multiprocessor control for time shared address and data transfers

Country Status (1)

Country Link
FR (1) FR2286439A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2469752B1 (en) * 1979-11-14 1986-05-16 Bull Sa DEVICE FOR SHARING A CENTRAL SUBSYSTEM OF AN INFORMATION PROCESSING SYSTEM INTO SEVERAL INDEPENDENT SUBSYSTEMS

Also Published As

Publication number Publication date
FR2286439A1 (en) 1976-04-23

Similar Documents

Publication Publication Date Title
JPS50146455A (en)
JPS50123228A (en)
JPS50158439A (en)
JPS5124964U (en)
JPS50120664A (en)
JPS50142805U (en)
JPS5139348U (en)
JPS5123234U (en)
JPS5124219U (en)
JPS5110612U (en)
JPS50155474U (en)
JPS50151919A (en)
JPS5156562U (en)
JPS50154259A (en)
JPS5138443U (en)
CH578109A5 (en)
BE834963A (en)
CH583469A5 (en)
AU480264A (en)
CH583325B5 (en)
CH579948A5 (en)
CH582817A5 (en)
CH578274A5 (en)
CH582581A5 (en)
CH580804A5 (en)

Legal Events

Date Code Title Description
ST Notification of lapse