FR2245027B1 - - Google Patents

Info

Publication number
FR2245027B1
FR2245027B1 FR7431077A FR7431077A FR2245027B1 FR 2245027 B1 FR2245027 B1 FR 2245027B1 FR 7431077 A FR7431077 A FR 7431077A FR 7431077 A FR7431077 A FR 7431077A FR 2245027 B1 FR2245027 B1 FR 2245027B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7431077A
Other versions
FR2245027A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19732347632 external-priority patent/DE2347632C3/de
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2245027A1 publication Critical patent/FR2245027A1/fr
Application granted granted Critical
Publication of FR2245027B1 publication Critical patent/FR2245027B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
FR7431077A 1973-09-21 1974-09-13 Expired FR2245027B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732347632 DE2347632C3 (de) 1973-09-21 Anordnung und Verfahren zum Verringern der Zugriffszeit in einem Speichersystem

Publications (2)

Publication Number Publication Date
FR2245027A1 FR2245027A1 (fr) 1975-04-18
FR2245027B1 true FR2245027B1 (fr) 1978-06-09

Family

ID=5893308

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7431077A Expired FR2245027B1 (fr) 1973-09-21 1974-09-13

Country Status (6)

Country Link
US (1) US4005389A (fr)
BE (1) BE820158A (fr)
FR (1) FR2245027B1 (fr)
GB (1) GB1472303A (fr)
IT (1) IT1021490B (fr)
NL (1) NL7411462A (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4318175A (en) * 1979-08-13 1982-03-02 Bunker Ramo Corporation Addressing means for random access memory system
US4445172A (en) * 1980-12-31 1984-04-24 Honeywell Information Systems Inc. Data steering logic for the output of a cache memory having an odd/even bank structure
US4490806A (en) * 1982-06-04 1984-12-25 Research Corporation High repetition rate transient recorder with automatic integration
EP0332972B1 (fr) * 1988-03-15 1992-05-27 Siemens Aktiengesellschaft Méthod et dispositif pour transfert de données
EP0675502B1 (fr) * 1989-04-13 2005-05-25 SanDisk Corporation Système EEPROM avec effacement en bloc contenant des puces multiples
EP0513519A1 (fr) * 1991-05-15 1992-11-19 International Business Machines Corporation Système de mémoire pour systèmes multiprocesseurs
JP2919774B2 (ja) * 1994-07-01 1999-07-19 ディジタル イクイプメント コーポレイション 深いフレームバッファにおいて浅いピクセルを迅速に指示してコピーする方法
US5742789A (en) * 1995-12-28 1998-04-21 Emc Corporation Dynamically adaptive data retrieval for a disk drive storage system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3821724A (en) * 1973-07-12 1974-06-28 Gte Sylvania Inc Temporary storage apparatus
US3863232A (en) * 1973-12-26 1975-01-28 Ibm Associative array

Also Published As

Publication number Publication date
IT1021490B (it) 1978-01-30
DE2347632B2 (de) 1976-02-19
FR2245027A1 (fr) 1975-04-18
USB506839I5 (fr) 1976-03-23
GB1472303A (en) 1977-05-04
US4005389A (en) 1977-01-25
DE2347632A1 (de) 1975-04-03
NL7411462A (nl) 1975-03-25
BE820158A (fr) 1975-03-20

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Legal Events

Date Code Title Description
ST Notification of lapse