FR2242816B3 - - Google Patents

Info

Publication number
FR2242816B3
FR2242816B3 FR7429275A FR7429275A FR2242816B3 FR 2242816 B3 FR2242816 B3 FR 2242816B3 FR 7429275 A FR7429275 A FR 7429275A FR 7429275 A FR7429275 A FR 7429275A FR 2242816 B3 FR2242816 B3 FR 2242816B3
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7429275A
Other versions
FR2242816A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burroughs Corp filed Critical Burroughs Corp
Publication of FR2242816A1 publication Critical patent/FR2242816A1/fr
Application granted granted Critical
Publication of FR2242816B3 publication Critical patent/FR2242816B3/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/04—Shaping pulses by increasing duration; by decreasing duration
    • H03K5/05—Shaping pulses by increasing duration; by decreasing duration by the use of clock signals or other time reference signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/04—Shaping pulses by increasing duration; by decreasing duration
    • H03K5/06—Shaping pulses by increasing duration; by decreasing duration by the use of delay lines or other analogue delay elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/14—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of delay lines

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
FR7429275A 1973-08-27 1974-08-27 Expired FR2242816B3 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US391963A US3866061A (en) 1973-08-27 1973-08-27 Overlap timing control circuit for conditioning signals in a semiconductor memory

Publications (2)

Publication Number Publication Date
FR2242816A1 FR2242816A1 (fr) 1975-03-28
FR2242816B3 true FR2242816B3 (fr) 1977-06-17

Family

ID=23548696

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7429275A Expired FR2242816B3 (fr) 1973-08-27 1974-08-27

Country Status (10)

Country Link
US (1) US3866061A (fr)
JP (1) JPS5046461A (fr)
AU (1) AU7220774A (fr)
BE (1) BE818044A (fr)
BR (1) BR7406598D0 (fr)
CA (1) CA1039851A (fr)
DE (1) DE2437287A1 (fr)
FR (1) FR2242816B3 (fr)
IT (1) IT1019854B (fr)
NL (1) NL7410859A (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4122550A (en) * 1978-02-08 1978-10-24 Intel Corporation Low power random access memory with self-refreshing cells
US4222112A (en) * 1979-02-09 1980-09-09 Bell Telephone Laboratories, Incorporated Dynamic RAM organization for reducing peak current
US4340943A (en) * 1979-05-31 1982-07-20 Tokyo Shibaura Denki Kabushiki Kaisha Memory device utilizing MOS FETs
JPS5634186A (en) * 1979-08-29 1981-04-06 Hitachi Ltd Bipolar memory circuit
US4556961A (en) * 1981-05-26 1985-12-03 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory with delay means to reduce peak currents
JPS5963091A (ja) * 1982-09-30 1984-04-10 Fujitsu Ltd スタテイツクメモリ回路
US4580246A (en) * 1983-11-02 1986-04-01 Motorola, Inc. Write protection circuit and method for a control register
US4618786A (en) * 1984-08-13 1986-10-21 Thomson Components - Mostek Corporation Precharge circuit for enhancement mode memory circuits

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3028552A (en) * 1960-04-20 1962-04-03 Ibm Frequency shifting clock
NL284961A (fr) * 1961-11-02
US3244907A (en) * 1962-12-31 1966-04-05 Rca Corp Pulse delay circuits
US3238461A (en) * 1963-10-11 1966-03-01 Rca Corp Asynchronous binary counter circuits
US3329831A (en) * 1963-12-23 1967-07-04 Ibm Electronic ring circuit comprising plurality of first and second switching means driven by overlapping a.c. waveforms
US3684897A (en) * 1970-08-19 1972-08-15 Cogar Corp Dynamic mos memory array timing system

Also Published As

Publication number Publication date
NL7410859A (nl) 1975-03-03
CA1039851A (fr) 1978-10-03
IT1019854B (it) 1977-11-30
BR7406598D0 (pt) 1975-06-24
US3866061A (en) 1975-02-11
JPS5046461A (fr) 1975-04-25
AU7220774A (en) 1976-02-12
BE818044A (fr) 1974-11-18
FR2242816A1 (fr) 1975-03-28
DE2437287A1 (de) 1975-03-13

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Legal Events

Date Code Title Description
ST Notification of lapse