FR2210797A1 - - Google Patents
Info
- Publication number
- FR2210797A1 FR2210797A1 FR7344994A FR7344994A FR2210797A1 FR 2210797 A1 FR2210797 A1 FR 2210797A1 FR 7344994 A FR7344994 A FR 7344994A FR 7344994 A FR7344994 A FR 7344994A FR 2210797 A1 FR2210797 A1 FR 2210797A1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
- G06F7/78—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
- G06F7/785—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using a RAM
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
- H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
- H04Q3/54508—Configuration, initialisation
- H04Q3/54533—Configuration data, translation, passwords, databases
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Databases & Information Systems (AREA)
- Computer Networks & Wireless Communication (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Memory System (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL7217127A NL7217127A (enExample) | 1972-12-15 | 1972-12-15 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2210797A1 true FR2210797A1 (enExample) | 1974-07-12 |
| FR2210797B1 FR2210797B1 (enExample) | 1980-06-20 |
Family
ID=19817564
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7344994A Expired FR2210797B1 (enExample) | 1972-12-15 | 1973-12-17 |
Country Status (7)
| Country | Link |
|---|---|
| BE (1) | BE808607R (enExample) |
| CA (1) | CA1004369A (enExample) |
| ES (1) | ES421452A1 (enExample) |
| FR (1) | FR2210797B1 (enExample) |
| GB (1) | GB1442340A (enExample) |
| IT (1) | IT1050223B (enExample) |
| NL (1) | NL7217127A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2440058A1 (fr) * | 1978-10-27 | 1980-05-23 | Materiel Telephonique | Systeme de memoire tampon pour unite d'echange entre deux unites fonctionnelles et procede de mise en oeuvre |
-
1972
- 1972-12-15 NL NL7217127A patent/NL7217127A/xx not_active Application Discontinuation
-
1973
- 1973-12-14 BE BE2053287A patent/BE808607R/xx active
- 1973-12-14 GB GB5801473A patent/GB1442340A/en not_active Expired
- 1973-12-14 CA CA188,215A patent/CA1004369A/en not_active Expired
- 1973-12-14 ES ES421452A patent/ES421452A1/es not_active Expired
- 1973-12-17 FR FR7344994A patent/FR2210797B1/fr not_active Expired
- 1973-12-24 IT IT5459473A patent/IT1050223B/it active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2440058A1 (fr) * | 1978-10-27 | 1980-05-23 | Materiel Telephonique | Systeme de memoire tampon pour unite d'echange entre deux unites fonctionnelles et procede de mise en oeuvre |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2210797B1 (enExample) | 1980-06-20 |
| CA1004369A (en) | 1977-01-25 |
| GB1442340A (en) | 1976-07-14 |
| ES421452A1 (es) | 1976-04-16 |
| IT1050223B (it) | 1981-03-10 |
| AU6340873A (en) | 1975-06-12 |
| NL7217127A (enExample) | 1974-06-18 |
| BE808607R (nl) | 1974-06-14 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |