FR2198267A1 - - Google Patents
Info
- Publication number
- FR2198267A1 FR2198267A1 FR7320857*A FR7320857A FR2198267A1 FR 2198267 A1 FR2198267 A1 FR 2198267A1 FR 7320857 A FR7320857 A FR 7320857A FR 2198267 A1 FR2198267 A1 FR 2198267A1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US26786972A | 1972-06-30 | 1972-06-30 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2198267A1 true FR2198267A1 (cs) | 1974-03-29 |
| FR2198267B1 FR2198267B1 (cs) | 1977-07-29 |
Family
ID=23020468
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7320857A Expired FR2198267B1 (cs) | 1972-06-30 | 1973-05-25 |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS4964385A (cs) |
| FR (1) | FR2198267B1 (cs) |
| GB (1) | GB1414018A (cs) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5632756A (en) * | 1979-08-24 | 1981-04-02 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Semiconductor integrated circuit |
| US4319396A (en) * | 1979-12-28 | 1982-03-16 | Bell Telephone Laboratories, Incorporated | Method for fabricating IGFET integrated circuits |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR1555059A (cs) * | 1967-03-23 | 1969-01-24 |
-
1973
- 1973-05-25 FR FR7320857A patent/FR2198267B1/fr not_active Expired
- 1973-05-30 GB GB2581273A patent/GB1414018A/en not_active Expired
- 1973-06-14 JP JP48066482A patent/JPS4964385A/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR1555059A (cs) * | 1967-03-23 | 1969-01-24 |
Non-Patent Citations (2)
| Title |
|---|
| REVUE AMERICAINE "1971 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE. DIGEST OF TECHNICAL PAPERS". 18 FEVRIER 1971, COMPUTER-GENERATED IG FET LAYOUT USING A VERTICALLY PACKED WEINBERGER ARRANGEMENT". D.G. SCHWEIKERT, PAGES 118-119.) * |
| REVUE AMERICAINE "IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC 2, NO. 4, DECEMBRE 1967. "LARGE SCALE INTEGRATION OF MOS COMPLEX LOGIC: A LAYOUT METHOD". ARNOLD WEINBERGER, PAGES 182-190. DOCUMENT CITE DANS LE TEXTE DE LA DEMANDE EXAMINEE . * |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4964385A (cs) | 1974-06-21 |
| GB1414018A (en) | 1975-11-12 |
| FR2198267B1 (cs) | 1977-07-29 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |