FR2181552A1 - - Google Patents

Info

Publication number
FR2181552A1
FR2181552A1 FR7215210A FR7215210A FR2181552A1 FR 2181552 A1 FR2181552 A1 FR 2181552A1 FR 7215210 A FR7215210 A FR 7215210A FR 7215210 A FR7215210 A FR 7215210A FR 2181552 A1 FR2181552 A1 FR 2181552A1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7215210A
Other languages
French (fr)
Other versions
FR2181552B1 (en:Method
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Laboratoire Central de Telecommunications SA
Original Assignee
Laboratoire Central de Telecommunications SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Laboratoire Central de Telecommunications SA filed Critical Laboratoire Central de Telecommunications SA
Priority to FR7215210A priority Critical patent/FR2181552B1/fr
Publication of FR2181552A1 publication Critical patent/FR2181552A1/fr
Application granted granted Critical
Publication of FR2181552B1 publication Critical patent/FR2181552B1/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0286Programmable, customizable or modifiable circuits
    • H05K1/0287Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09609Via grid, i.e. two-dimensional array of vias or holes in a single plane
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09945Universal aspects, e.g. universal inner layers or via grid, or anisotropic interposer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0002Apparatus or processes for manufacturing printed circuits for manufacturing artworks for printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
FR7215210A 1972-04-28 1972-04-28 Expired FR2181552B1 (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7215210A FR2181552B1 (en:Method) 1972-04-28 1972-04-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7215210A FR2181552B1 (en:Method) 1972-04-28 1972-04-28

Publications (2)

Publication Number Publication Date
FR2181552A1 true FR2181552A1 (en:Method) 1973-12-07
FR2181552B1 FR2181552B1 (en:Method) 1978-12-08

Family

ID=9097710

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7215210A Expired FR2181552B1 (en:Method) 1972-04-28 1972-04-28

Country Status (1)

Country Link
FR (1) FR2181552B1 (en:Method)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3564114A (en) * 1967-09-28 1971-02-16 Loral Corp Universal multilayer printed circuit board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3564114A (en) * 1967-09-28 1971-02-16 Loral Corp Universal multilayer printed circuit board

Also Published As

Publication number Publication date
FR2181552B1 (en:Method) 1978-12-08

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Legal Events

Date Code Title Description
CL Concession to grant licenses
ST Notification of lapse