FR2178281A5 - - Google Patents

Info

Publication number
FR2178281A5
FR2178281A5 FR7209049A FR7209049A FR2178281A5 FR 2178281 A5 FR2178281 A5 FR 2178281A5 FR 7209049 A FR7209049 A FR 7209049A FR 7209049 A FR7209049 A FR 7209049A FR 2178281 A5 FR2178281 A5 FR 2178281A5
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7209049A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burroughs Corp filed Critical Burroughs Corp
Application granted granted Critical
Publication of FR2178281A5 publication Critical patent/FR2178281A5/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Complex Calculations (AREA)
  • Multi Processors (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
FR7209049A 1971-03-15 1972-03-15 Expired FR2178281A5 (OSRAM)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12441571A 1971-03-15 1971-03-15
US311275A US3919692A (en) 1971-03-15 1972-12-01 Fast inhibit gate with applications

Publications (1)

Publication Number Publication Date
FR2178281A5 true FR2178281A5 (OSRAM) 1973-11-09

Family

ID=26822566

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7209049A Expired FR2178281A5 (OSRAM) 1971-03-15 1972-03-15

Country Status (5)

Country Link
US (2) US3753014A (OSRAM)
BE (1) BE780709A (OSRAM)
DE (1) DE2212373A1 (OSRAM)
FR (1) FR2178281A5 (OSRAM)
GB (1) GB1366402A (OSRAM)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3753014A (en) * 1971-03-15 1973-08-14 Burroughs Corp Fast inhibit gate with applications
US3976949A (en) * 1975-01-13 1976-08-24 Motorola, Inc. Edge sensitive set-reset flip flop
US4130864A (en) * 1976-10-29 1978-12-19 Westinghouse Electric Corp. Priority selection circuit for multiported central functional unit with automatic priority reduction on excessive port request
JPS53146550A (en) * 1977-05-27 1978-12-20 Nippon Telegr & Teleph Corp <Ntt> Conflict circuit
US4241419A (en) * 1978-05-01 1980-12-23 Burroughs Corporation Asynchronous digital data transmission system
US4310880A (en) * 1979-09-10 1982-01-12 Nixdorf Computer Corporation High-speed synchronous computer using pipelined registers and a two-level fixed priority circuit
JPS5654535A (en) * 1979-10-08 1981-05-14 Hitachi Ltd Bus control system
US4313161A (en) * 1979-11-13 1982-01-26 International Business Machines Corporation Shared storage for multiple processor systems
US4380798A (en) * 1980-09-15 1983-04-19 Motorola, Inc. Semaphore register including ownership bits
JPS5775335A (en) * 1980-10-27 1982-05-11 Hitachi Ltd Data processor
FR2513469B1 (fr) * 1981-09-24 1987-12-11 Thomson Csf Mat Tel Dispositif de selection rapide et automatique d'un signal parmi n
US4493036A (en) * 1982-12-14 1985-01-08 Honeywell Information Systems Inc. Priority resolver having dynamically adjustable priority levels
US4594657A (en) * 1983-04-22 1986-06-10 Motorola, Inc. Semaphore for memory shared by two asynchronous microcomputers
US4627085A (en) * 1984-06-29 1986-12-02 Applied Micro Circuits Corporation Flip-flop control circuit
US4648103A (en) * 1984-10-01 1987-03-03 Motorola, Inc. Flip-flop having divide inhibit circuitry to change divide ratio
US4791552A (en) * 1986-01-29 1988-12-13 Digital Equipment Corporation Apparatus and method for addressing semiconductor arrays in a main memory unit on consecutive system clock cycles
US4941157A (en) * 1989-04-14 1990-07-10 Ncr Corporation Slow peripheral handshake interface circuit
EP0464237A1 (en) * 1990-07-03 1992-01-08 International Business Machines Corporation Bus arbitration scheme
EP0913941B1 (en) * 1997-10-29 2003-09-17 STMicroelectronics S.r.l. System for connecting peripheral devices and having a priority arbitration, particularly in a microcontroller chip emulator
WO2000018041A2 (en) * 1998-09-18 2000-03-30 Harris Corporation Distributed trunking mechanism for vhf networking
US7667500B1 (en) 2006-11-14 2010-02-23 Xilinx, Inc. Glitch-suppressor circuits and methods

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2909675A (en) * 1955-05-10 1959-10-20 Bell Telephone Labor Inc Bistable frequency divider
US3321639A (en) * 1962-12-03 1967-05-23 Gen Electric Direct coupled, current mode logic
US3543246A (en) * 1967-07-07 1970-11-24 Ibm Priority selector signalling device
NL154023B (nl) * 1969-02-01 1977-07-15 Philips Nv Prioriteitscircuit.
US3638198A (en) * 1969-07-09 1972-01-25 Burroughs Corp Priority resolution network for input/output exchange
US3609569A (en) * 1970-07-09 1971-09-28 Solid State Scient Devices Cor Logic system
US3753014A (en) * 1971-03-15 1973-08-14 Burroughs Corp Fast inhibit gate with applications

Also Published As

Publication number Publication date
DE2212373A1 (de) 1972-10-05
BE780709A (fr) 1972-07-03
GB1366402A (en) 1974-09-11
US3753014A (en) 1973-08-14
US3919692A (en) 1975-11-11

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Legal Events

Date Code Title Description
CD Change of name or company name
TP Transmission of property
ST Notification of lapse