FR2170659A5 - - Google Patents
Info
- Publication number
- FR2170659A5 FR2170659A5 FR7247121A FR7247121A FR2170659A5 FR 2170659 A5 FR2170659 A5 FR 2170659A5 FR 7247121 A FR7247121 A FR 7247121A FR 7247121 A FR7247121 A FR 7247121A FR 2170659 A5 FR2170659 A5 FR 2170659A5
- Authority
- FR
- France
- Prior art keywords
- processor
- store
- error
- program
- programs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2294—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by remote test
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
- G06F11/2736—Tester hardware, i.e. output processing circuits using a dedicated service processor for test
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Debugging And Monitoring (AREA)
Abstract
1359239 Data processing system; error detection INTERNATIONAL BUSINESS MACHINES CORP 22 Nov 1972 [30 Dec 1971] 54048/72 Heading G4A A data processing system includes a central data processing unit (not shown), a peripheral unit control processor 1 having an internal store 2 and being arranged to execute error detection programs relating to errors in its associated peripheral units 3, an interface processing unit 4 having an internal store 5, and an external store 6 connected to the interface processor and arranged to store error detection programs, the arrangement being such that the interface processor 4 transfers a selected error program from the external store 6 to its internal store 5 and the control processor 1 transfers the error program from the interface processor store 5 to its internal store 2 for execution. The arrangement allows error diagnosis of the peripherals to be performed independently of the central processing unit. During normal operation of the system the interface processor 4 is controlled by the central processor (CPU) via line 10. A special code is entered via keyboard 8 to inform the CPU that processor 4 is unavailable. A list of available error programs stored on tape 6, it being stated that a magnetic disc may be used, is read into processor 4 and displayed at 7. One of the programs is selected using the keyboard 8 and is read from store 6 into the internal store 5. The peripheral processor 1 is then informed that an error program has been selected. Processor 1, after executing each instruction originating from the CPU, checks whether an error program has been selected and, during periods when it is otherwise unoccupied, transfers the program into its internal store 2 for execution also during periods when it is otherwise unoccupied. Following execution of an error program any resulting data is transferred to processor 4 for display at 7. Further error programs may then be selected by the keyboard 8. Alternatively several error programs may be chained together, a subsequent program being selected by a program just finishing and being written into store 2 as above to replace the earlier program.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19712165589 DE2165589A1 (en) | 1971-12-30 | 1971-12-30 | ARRANGEMENT FOR PROGRAM-CONTROLLED DETERMINATION OF ERRORS IN A DATA PROCESSING SYSTEM |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2170659A5 true FR2170659A5 (en) | 1973-09-14 |
Family
ID=5829735
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7247121A Expired FR2170659A5 (en) | 1971-12-30 | 1972-12-21 |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS5215500B2 (en) |
DE (1) | DE2165589A1 (en) |
FR (1) | FR2170659A5 (en) |
GB (1) | GB1359239A (en) |
IT (1) | IT969830B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0115566A2 (en) * | 1982-12-09 | 1984-08-15 | International Business Machines Corporation | Method for testing the operation of an I/O controller in a data processing system |
EP0141744A2 (en) * | 1983-11-07 | 1985-05-15 | Digital Equipment Corporation | Method and apparatus for self-testing of floating point accelerator processors |
FR2575847A1 (en) * | 1985-01-04 | 1986-07-11 | Pragmadyne Sarl | Device and method for assistance for a computer processing unit |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5188144A (en) * | 1975-01-17 | 1976-08-02 | ||
JPS57147763A (en) * | 1981-03-07 | 1982-09-11 | Fujitsu Ltd | Evacuation restoring system of test program |
JPS57162043A (en) * | 1981-03-31 | 1982-10-05 | Fujitsu Ltd | Diagnostic system |
GB2213683B (en) * | 1987-12-11 | 1992-04-29 | Dpce Computer Services Limited | Channel tester |
JPH0287247A (en) * | 1988-09-26 | 1990-03-28 | Hitachi Ltd | Maintenance diagnosing system for input and output processor |
US4974080A (en) * | 1989-06-13 | 1990-11-27 | Magni Systems, Inc. | Signal generator with display and memory card |
-
1971
- 1971-12-30 DE DE19712165589 patent/DE2165589A1/en active Pending
-
1972
- 1972-10-24 IT IT3083672A patent/IT969830B/en active
- 1972-11-22 GB GB5404872A patent/GB1359239A/en not_active Expired
- 1972-12-15 JP JP47125407A patent/JPS5215500B2/ja not_active Expired
- 1972-12-21 FR FR7247121A patent/FR2170659A5/fr not_active Expired
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0115566A2 (en) * | 1982-12-09 | 1984-08-15 | International Business Machines Corporation | Method for testing the operation of an I/O controller in a data processing system |
EP0115566A3 (en) * | 1982-12-09 | 1987-05-13 | International Business Machines Corporation | Method for testing the operation of an i/o controller in a data processing system |
EP0141744A2 (en) * | 1983-11-07 | 1985-05-15 | Digital Equipment Corporation | Method and apparatus for self-testing of floating point accelerator processors |
EP0141744A3 (en) * | 1983-11-07 | 1988-03-16 | Digital Equipment Corporation | Method and apparatus for self-testing of floating point accelerator processors |
FR2575847A1 (en) * | 1985-01-04 | 1986-07-11 | Pragmadyne Sarl | Device and method for assistance for a computer processing unit |
Also Published As
Publication number | Publication date |
---|---|
GB1359239A (en) | 1974-07-10 |
JPS4879556A (en) | 1973-10-25 |
JPS5215500B2 (en) | 1977-04-30 |
DE2165589A1 (en) | 1973-07-19 |
IT969830B (en) | 1974-04-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |