FR2121935A5 - - Google Patents

Info

Publication number
FR2121935A5
FR2121935A5 FR7100772A FR7100772A FR2121935A5 FR 2121935 A5 FR2121935 A5 FR 2121935A5 FR 7100772 A FR7100772 A FR 7100772A FR 7100772 A FR7100772 A FR 7100772A FR 2121935 A5 FR2121935 A5 FR 2121935A5
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7100772A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Societe Europeenne de Semi Conducteurs de Microelectronique SA SESCOSEM
Original Assignee
Societe Europeenne de Semi Conducteurs de Microelectronique SA SESCOSEM
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Societe Europeenne de Semi Conducteurs de Microelectronique SA SESCOSEM filed Critical Societe Europeenne de Semi Conducteurs de Microelectronique SA SESCOSEM
Priority to FR7100772A priority Critical patent/FR2121935A5/fr
Priority to US00214002A priority patent/US3715637A/en
Application granted granted Critical
Publication of FR2121935A5 publication Critical patent/FR2121935A5/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
FR7100772A 1971-01-12 1971-01-12 Expired FR2121935A5 (enExample)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR7100772A FR2121935A5 (enExample) 1971-01-12 1971-01-12
US00214002A US3715637A (en) 1971-01-12 1971-12-30 Logic circuits employing complementary field-effect transistors in which the gate is insulated from the substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7100772A FR2121935A5 (enExample) 1971-01-12 1971-01-12

Publications (1)

Publication Number Publication Date
FR2121935A5 true FR2121935A5 (enExample) 1972-08-25

Family

ID=9070119

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7100772A Expired FR2121935A5 (enExample) 1971-01-12 1971-01-12

Country Status (2)

Country Link
US (1) US3715637A (enExample)
FR (1) FR2121935A5 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4178605A (en) * 1978-01-30 1979-12-11 Rca Corp. Complementary MOS inverter structure
US4472821A (en) * 1982-05-03 1984-09-18 General Electric Company Dynamic shift register utilizing CMOS dual gate transistors

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3409839A (en) * 1965-08-04 1968-11-05 North American Rockwell Method and apparatus for minimizing the effects of ionizing radiation on semiconductor circuits

Also Published As

Publication number Publication date
US3715637A (en) 1973-02-06

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Legal Events

Date Code Title Description
TP Transmission of property
ST Notification of lapse