FR2091964A1 - - Google Patents

Info

Publication number
FR2091964A1
FR2091964A1 FR7105250A FR7105250A FR2091964A1 FR 2091964 A1 FR2091964 A1 FR 2091964A1 FR 7105250 A FR7105250 A FR 7105250A FR 7105250 A FR7105250 A FR 7105250A FR 2091964 A1 FR2091964 A1 FR 2091964A1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7105250A
Other languages
French (fr)
Other versions
FR2091964B1 (en:Method
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Inc
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2091964A1 publication Critical patent/FR2091964A1/fr
Application granted granted Critical
Publication of FR2091964B1 publication Critical patent/FR2091964B1/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/416—Read-write [R-W] circuits 
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/013—Modifications of generator to prevent operation by noise or interference
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/10—SRAM devices comprising bipolar components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
FR7105250A 1970-02-17 1971-02-16 Expired FR2091964B1 (en:Method)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1208470A 1970-02-17 1970-02-17

Publications (2)

Publication Number Publication Date
FR2091964A1 true FR2091964A1 (en:Method) 1972-01-21
FR2091964B1 FR2091964B1 (en:Method) 1974-03-22

Family

ID=21753318

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7105250A Expired FR2091964B1 (en:Method) 1970-02-17 1971-02-16

Country Status (8)

Country Link
JP (1) JPS5245172B1 (en:Method)
BE (1) BE763002A (en:Method)
DE (1) DE2107280A1 (en:Method)
FR (1) FR2091964B1 (en:Method)
GB (1) GB1340536A (en:Method)
HK (1) HK38577A (en:Method)
NL (1) NL175474C (en:Method)
SE (1) SE374973B (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992002933A1 (en) * 1990-08-02 1992-02-20 Carlstedt Elektronik Ab Bit storage cell

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
REVUE AMERICAINE "IEEE JOURNAL OF SOLID-STATE CIRCUITS" VOL.SC-5, NO 5 OCTOBRE 1970, PAGES 186-191 ARTICLE: "MEMORY USING DIODE-COUPLED BIPOLAR TRANSISTOR CELLS" LYNES HODGES FIGURES 2A ET 3 PARAGRAPHE III" CELL-CIRCUIT DESCRIPTION AND COMPARISON" CELLULE DE MEMOIRE COMPORTANT: DEUX TRANSISTORS BIPOLAIRES DONT LES EMETTEURS SONT RELIES ENSEMBLE A UN PREMIER CONDUCTEUR D'ACHEMINEMENT D'INFORMATION WL UN ELEMENT RESISTIF RC ENTRE LE COLLECTEUR DU PREMIER TRANSISTOR ET LA BASE DU SECOND TRANSISTOR, UN DEUXIEME ELEMENT RESISTIF RC ENTRE LE COLLECTEUR DU DEUXIEME TRANSISTOR ET LA BASE DU PREMIER TRANSISTOR DEUX ELEMENTS RESISTIFS INDIVIDUELS RL RELIANT DIRECTEMENT CHAQUE COLLECTEUR A UN DEUXIEME POINT COMMUN 3,5 DEUX ELEMENTS RESISTIFS INDIVIDUELS RD RELIANT LE POINT DE JONCTION ENTRE LA BASE D'UN TRANSISTOR ET UN ELEMENT RESISTIF RC A UN COMPOSANT INDIVIDUEL A CONDUCTION ASYMETRIQUE SB QUI EST RELIE A UN CONDUCTEUR INDIVIDUEL D'ACHEMINEMENT DE L'INFORMAT *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1992002933A1 (en) * 1990-08-02 1992-02-20 Carlstedt Elektronik Ab Bit storage cell
WO1992002932A1 (en) * 1990-08-02 1992-02-20 Carlstedt Elektronik Ab Associative memory
US5239502A (en) * 1990-08-02 1993-08-24 Carlstedt Elektronik Ab Bit storage cell
US5325501A (en) * 1990-08-02 1994-06-28 Carlstedt Elektronik Ab Associative memory

Also Published As

Publication number Publication date
SE374973B (en:Method) 1975-03-24
GB1340536A (en) 1973-12-12
JPS5245172B1 (en:Method) 1977-11-14
HK38577A (en) 1977-07-29
BE763002A (fr) 1971-07-16
FR2091964B1 (en:Method) 1974-03-22
NL7102040A (en:Method) 1971-08-19
NL175474C (nl) 1984-11-01
DE2107280A1 (de) 1971-09-16
NL175474B (nl) 1984-06-01

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Legal Events

Date Code Title Description
ST Notification of lapse