FR1544612A - Digital phase lock circuit for bit timing reproduction - Google Patents

Digital phase lock circuit for bit timing reproduction

Info

Publication number
FR1544612A
FR1544612A FR128515A FR128515A FR1544612A FR 1544612 A FR1544612 A FR 1544612A FR 128515 A FR128515 A FR 128515A FR 128515 A FR128515 A FR 128515A FR 1544612 A FR1544612 A FR 1544612A
Authority
FR
France
Prior art keywords
phase lock
digital phase
lock circuit
bit timing
timing reproduction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR128515A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Comsat Corp
Original Assignee
Comsat Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Comsat Corp filed Critical Comsat Corp
Priority to FR128515A priority Critical patent/FR1544612A/en
Application granted granted Critical
Publication of FR1544612A publication Critical patent/FR1544612A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
FR128515A 1966-11-16 1967-11-16 Digital phase lock circuit for bit timing reproduction Expired FR1544612A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR128515A FR1544612A (en) 1966-11-16 1967-11-16 Digital phase lock circuit for bit timing reproduction

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US59482966A 1966-11-16 1966-11-16
FR128515A FR1544612A (en) 1966-11-16 1967-11-16 Digital phase lock circuit for bit timing reproduction

Publications (1)

Publication Number Publication Date
FR1544612A true FR1544612A (en) 1968-10-31

Family

ID=26180879

Family Applications (1)

Application Number Title Priority Date Filing Date
FR128515A Expired FR1544612A (en) 1966-11-16 1967-11-16 Digital phase lock circuit for bit timing reproduction

Country Status (1)

Country Link
FR (1) FR1544612A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2379151A1 (en) * 1977-01-28 1978-08-25 Acec Electrical contact breaker with integral armature - has release electromagnet with armature integral with moving contact
FR2479620A1 (en) * 1980-03-28 1981-10-02 Thomson Csf PACKET-TRANSMITTED DIGITAL INFORMATION SYNCHRONIZATION DEVICE AND RECEIVER HAVING SUCH A DEVICE

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2379151A1 (en) * 1977-01-28 1978-08-25 Acec Electrical contact breaker with integral armature - has release electromagnet with armature integral with moving contact
FR2479620A1 (en) * 1980-03-28 1981-10-02 Thomson Csf PACKET-TRANSMITTED DIGITAL INFORMATION SYNCHRONIZATION DEVICE AND RECEIVER HAVING SUCH A DEVICE
EP0037299A1 (en) * 1980-03-28 1981-10-07 Thomson-Csf Synchronisation arrangement for digital information transmitted in packets

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