FR1522026A - Manufacturing process of a semiconductor component - Google Patents
Manufacturing process of a semiconductor componentInfo
- Publication number
- FR1522026A FR1522026A FR105516A FR105516A FR1522026A FR 1522026 A FR1522026 A FR 1522026A FR 105516 A FR105516 A FR 105516A FR 105516 A FR105516 A FR 105516A FR 1522026 A FR1522026 A FR 1522026A
- Authority
- FR
- France
- Prior art keywords
- manufacturing process
- semiconductor component
- semiconductor
- component
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J5/00—Details relating to vessels or to leading-in conductors common to two or more basic types of discharge tubes or lamps
- H01J5/32—Seals for leading-in conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/041—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction having no base used as a mounting for the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR105516A FR1522026A (en) | 1966-05-11 | 1967-05-08 | Manufacturing process of a semiconductor component |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DES0103749 | 1966-05-11 | ||
FR105516A FR1522026A (en) | 1966-05-11 | 1967-05-08 | Manufacturing process of a semiconductor component |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1522026A true FR1522026A (en) | 1968-04-19 |
Family
ID=25998458
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR105516A Expired FR1522026A (en) | 1966-05-11 | 1967-05-08 | Manufacturing process of a semiconductor component |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR1522026A (en) |
-
1967
- 1967-05-08 FR FR105516A patent/FR1522026A/en not_active Expired
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