FR1497277A - Synchronization system - Google Patents

Synchronization system

Info

Publication number
FR1497277A
FR1497277A FR81114A FR81114A FR1497277A FR 1497277 A FR1497277 A FR 1497277A FR 81114 A FR81114 A FR 81114A FR 81114 A FR81114 A FR 81114A FR 1497277 A FR1497277 A FR 1497277A
Authority
FR
France
Prior art keywords
synchronization system
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR81114A
Other languages
French (fr)
Inventor
Jean Victor Martens
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from NL6513602A external-priority patent/NL6513602A/xx
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Priority to FR81114A priority Critical patent/FR1497277A/en
Application granted granted Critical
Publication of FR1497277A publication Critical patent/FR1497277A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
FR81114A 1965-10-21 1966-10-21 Synchronization system Expired FR1497277A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR81114A FR1497277A (en) 1965-10-21 1966-10-21 Synchronization system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL6513602A NL6513602A (en) 1965-10-21 1965-10-21
FR81114A FR1497277A (en) 1965-10-21 1966-10-21 Synchronization system

Publications (1)

Publication Number Publication Date
FR1497277A true FR1497277A (en) 1967-10-06

Family

ID=26173855

Family Applications (1)

Application Number Title Priority Date Filing Date
FR81114A Expired FR1497277A (en) 1965-10-21 1966-10-21 Synchronization system

Country Status (1)

Country Link
FR (1) FR1497277A (en)

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