FR1452656A - Electronic calculator - Google Patents
Electronic calculatorInfo
- Publication number
- FR1452656A FR1452656A FR21487A FR21487A FR1452656A FR 1452656 A FR1452656 A FR 1452656A FR 21487 A FR21487 A FR 21487A FR 21487 A FR21487 A FR 21487A FR 1452656 A FR1452656 A FR 1452656A
- Authority
- FR
- France
- Prior art keywords
- electronic calculator
- calculator
- electronic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
- G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Optimization (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR21487A FR1452656A (en) | 1964-06-19 | 1965-06-18 | Electronic calculator |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US376348A US3400259A (en) | 1964-06-19 | 1964-06-19 | Multifunction adder including multistage carry chain register with conditioning means |
FR21487A FR1452656A (en) | 1964-06-19 | 1965-06-18 | Electronic calculator |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1452656A true FR1452656A (en) | 1966-04-15 |
Family
ID=26164192
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR21487A Expired FR1452656A (en) | 1964-06-19 | 1965-06-18 | Electronic calculator |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR1452656A (en) |
-
1965
- 1965-06-18 FR FR21487A patent/FR1452656A/en not_active Expired
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