FR1345163A - Multi-layered electrical circuits and method for their manufacture - Google Patents

Multi-layered electrical circuits and method for their manufacture

Info

Publication number
FR1345163A
FR1345163A FR913696A FR913696A FR1345163A FR 1345163 A FR1345163 A FR 1345163A FR 913696 A FR913696 A FR 913696A FR 913696 A FR913696 A FR 913696A FR 1345163 A FR1345163 A FR 1345163A
Authority
FR
France
Prior art keywords
manufacture
electrical circuits
layered electrical
layered
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR913696A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intellux Inc
Original Assignee
Intellux Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intellux Inc filed Critical Intellux Inc
Priority to FR913696A priority Critical patent/FR1345163A/en
Application granted granted Critical
Publication of FR1345163A publication Critical patent/FR1345163A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09563—Metal filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0723—Electroplating, e.g. finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
FR913696A 1962-10-29 1962-10-29 Multi-layered electrical circuits and method for their manufacture Expired FR1345163A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR913696A FR1345163A (en) 1962-10-29 1962-10-29 Multi-layered electrical circuits and method for their manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR913696A FR1345163A (en) 1962-10-29 1962-10-29 Multi-layered electrical circuits and method for their manufacture

Publications (1)

Publication Number Publication Date
FR1345163A true FR1345163A (en) 1963-12-06

Family

ID=8789668

Family Applications (1)

Application Number Title Priority Date Filing Date
FR913696A Expired FR1345163A (en) 1962-10-29 1962-10-29 Multi-layered electrical circuits and method for their manufacture

Country Status (1)

Country Link
FR (1) FR1345163A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3317653A (en) * 1965-05-07 1967-05-02 Cts Corp Electrical component and method of making the same
US3352730A (en) * 1964-08-24 1967-11-14 Sanders Associates Inc Method of making multilayer circuit boards
US3366519A (en) * 1964-01-20 1968-01-30 Texas Instruments Inc Process for manufacturing multilayer film circuits
US3461347A (en) * 1959-04-08 1969-08-12 Jerome H Lemelson Electrical circuit fabrication
US3488429A (en) * 1969-02-24 1970-01-06 Gerald Boucher Multilayer printed circuits
DE3006117A1 (en) * 1980-02-19 1981-08-27 Ruwel-Werke Spezialfabrik für Leiterplatten GmbH, 4170 Geldern METHOD FOR THE PRODUCTION OF CIRCUITS WITH AT LEAST TWO CIRCUITS
EP0211180A2 (en) * 1985-08-02 1987-02-25 Shipley Company Inc. Method for manufacture of multilayer circuit board

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3461347A (en) * 1959-04-08 1969-08-12 Jerome H Lemelson Electrical circuit fabrication
US3366519A (en) * 1964-01-20 1968-01-30 Texas Instruments Inc Process for manufacturing multilayer film circuits
US3352730A (en) * 1964-08-24 1967-11-14 Sanders Associates Inc Method of making multilayer circuit boards
US3317653A (en) * 1965-05-07 1967-05-02 Cts Corp Electrical component and method of making the same
US3488429A (en) * 1969-02-24 1970-01-06 Gerald Boucher Multilayer printed circuits
DE3006117A1 (en) * 1980-02-19 1981-08-27 Ruwel-Werke Spezialfabrik für Leiterplatten GmbH, 4170 Geldern METHOD FOR THE PRODUCTION OF CIRCUITS WITH AT LEAST TWO CIRCUITS
EP0211180A2 (en) * 1985-08-02 1987-02-25 Shipley Company Inc. Method for manufacture of multilayer circuit board
EP0211180A3 (en) * 1985-08-02 1989-08-09 Shipley Company Inc. Method for manufacture of multilayer circuit board

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