FR1290172A - Frequency change autosynchronization system - Google Patents
Frequency change autosynchronization systemInfo
- Publication number
- FR1290172A FR1290172A FR850324A FR850324A FR1290172A FR 1290172 A FR1290172 A FR 1290172A FR 850324 A FR850324 A FR 850324A FR 850324 A FR850324 A FR 850324A FR 1290172 A FR1290172 A FR 1290172A
- Authority
- FR
- France
- Prior art keywords
- autosynchronization
- frequency change
- frequency
- change
- change autosynchronization
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
- G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR850324A FR1290172A (en) | 1960-04-20 | 1961-01-20 | Frequency change autosynchronization system |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US23460A US3029389A (en) | 1960-04-20 | 1960-04-20 | Frequency shifting self-synchronizing clock |
FR850324A FR1290172A (en) | 1960-04-20 | 1961-01-20 | Frequency change autosynchronization system |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1290172A true FR1290172A (en) | 1962-04-13 |
Family
ID=26189000
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR850324A Expired FR1290172A (en) | 1960-04-20 | 1961-01-20 | Frequency change autosynchronization system |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR1290172A (en) |
-
1961
- 1961-01-20 FR FR850324A patent/FR1290172A/en not_active Expired
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