FR1161017A - Additionneur-soustracteur binaire - Google Patents
Additionneur-soustracteur binaireInfo
- Publication number
- FR1161017A FR1161017A FR1161017DA FR1161017A FR 1161017 A FR1161017 A FR 1161017A FR 1161017D A FR1161017D A FR 1161017DA FR 1161017 A FR1161017 A FR 1161017A
- Authority
- FR
- France
- Prior art keywords
- subtractor
- binary adder
- adder
- binary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
- G06F7/5016—Half or full adders, i.e. basic adder cells for one denomination forming at least one of the output signals directly from the minterms of the input signals, i.e. with a minimum number of gate levels
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US479338A US2926850A (en) | 1955-01-03 | 1955-01-03 | Binary adder subtracter |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1161017A true FR1161017A (fr) | 1958-08-19 |
Family
ID=23903606
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1161017D Expired FR1161017A (fr) | 1955-01-03 | 1955-12-29 | Additionneur-soustracteur binaire |
Country Status (2)
Country | Link |
---|---|
US (1) | US2926850A (fr) |
FR (1) | FR1161017A (fr) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL236158A (fr) * | 1958-02-17 | |||
US3084861A (en) * | 1959-05-27 | 1963-04-09 | Bell Telephone Labor Inc | Logic circuitry |
US3093751A (en) * | 1959-08-14 | 1963-06-11 | Sperry Rand Corp | Logical circuits |
US3015043A (en) * | 1959-12-29 | 1961-12-26 | Ibm | Trigger with three stable states |
US3201574A (en) * | 1960-10-07 | 1965-08-17 | Rca Corp | Flexible logic circuit |
US3145293A (en) * | 1961-06-05 | 1964-08-18 | Ibm | Bi-directional binary counter |
US4319148A (en) * | 1979-12-28 | 1982-03-09 | International Business Machines Corp. | High speed 3-way exclusive OR logic circuit |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2442428A (en) * | 1943-12-27 | 1948-06-01 | Ncr Co | Calculating device |
NL75406C (fr) * | 1945-12-21 | |||
US2609143A (en) * | 1948-06-24 | 1952-09-02 | George R Stibitz | Electronic computer for addition and subtraction |
US2692727A (en) * | 1949-08-27 | 1954-10-26 | Gen Electric | Apparatus for digital computation |
US2803401A (en) * | 1950-10-10 | 1957-08-20 | Hughes Aircraft Co | Arithmetic units for digital computers |
FR1035312A (fr) * | 1951-04-11 | 1953-08-21 | Bull Sa Machines | Dispositif opérateur d'addition et de soustraction pour machine calculatrice électrique en système binaire |
FR1085895A (fr) * | 1953-06-04 | 1955-02-08 | Méthode de soustraction et ensemble soustracteur pour nombres en impulsions codées | |
US2715997A (en) * | 1953-12-28 | 1955-08-23 | Marchant Res Inc | Binary adders |
-
1955
- 1955-01-03 US US479338A patent/US2926850A/en not_active Expired - Lifetime
- 1955-12-29 FR FR1161017D patent/FR1161017A/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US2926850A (en) | 1960-03-01 |
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