FR1141870A - Circuit d'addition binaire - Google Patents

Circuit d'addition binaire

Info

Publication number
FR1141870A
FR1141870A FR1141870DA FR1141870A FR 1141870 A FR1141870 A FR 1141870A FR 1141870D A FR1141870D A FR 1141870DA FR 1141870 A FR1141870 A FR 1141870A
Authority
FR
France
Prior art keywords
addition circuit
binary addition
binary
circuit
addition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of FR1141870A publication Critical patent/FR1141870A/fr
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/501Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/502Half adders; Full adders consisting of two cascaded half adders
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • G06F7/501Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/5013Half or full adders, i.e. basic adder cells for one denomination using algebraic addition of the input signals, e.g. Kirchhoff adders
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802Special implementations
    • G06F2207/4818Threshold devices

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Algebra (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)
  • Measurement Of Current Or Voltage (AREA)
FR1141870D 1954-02-26 1955-02-22 Circuit d'addition binaire Expired FR1141870A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US412697A US2971696A (en) 1954-02-26 1954-02-26 Binary adder circuit

Publications (1)

Publication Number Publication Date
FR1141870A true FR1141870A (fr) 1957-09-11

Family

ID=23634071

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1141870D Expired FR1141870A (fr) 1954-02-26 1955-02-22 Circuit d'addition binaire

Country Status (5)

Country Link
US (1) US2971696A (fr)
DE (1) DE1026996B (fr)
FR (1) FR1141870A (fr)
GB (1) GB765326A (fr)
NL (1) NL195088A (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3047733A (en) * 1957-03-12 1962-07-31 Ibm Multiple output semiconductor logical device
US3053450A (en) * 1958-12-02 1962-09-11 Ibm Photoelectric digital adder circuit
US3093751A (en) * 1959-08-14 1963-06-11 Sperry Rand Corp Logical circuits
NL259996A (fr) * 1960-01-13
US2994852A (en) * 1960-04-14 1961-08-01 Ibm Decoding circuit
US3100838A (en) * 1960-06-22 1963-08-13 Rca Corp Binary full adder utilizing integrated unipolar transistors
US3129340A (en) * 1960-08-22 1964-04-14 Ibm Logical and memory circuits utilizing tri-level signals
NL270282A (fr) * 1960-10-17
NL272700A (fr) * 1960-12-20
US3440413A (en) * 1965-11-17 1969-04-22 Ibm Majority logic binary adder

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2568932A (en) * 1947-09-27 1951-09-25 Rca Corp Electronic cumulative adder
NL75792C (fr) * 1948-05-19
GB683882A (en) * 1948-07-26 1952-12-10 Nat Res Dev Improvements in or relating to electronic circuits for digital computing systems
NL84065C (fr) * 1948-10-13
GB705478A (en) * 1949-01-17 1954-03-17 Nat Res Dev Electronic computing circuits
US2627039A (en) * 1950-05-29 1953-01-27 Bell Telephone Labor Inc Gating circuits
US2603746A (en) * 1950-10-13 1952-07-15 Monroe Calculating Machine Switching circuit
US2629833A (en) * 1951-04-28 1953-02-24 Bell Telephone Labor Inc Transistor trigger circuits
BE515326A (fr) * 1951-11-06
US2758787A (en) * 1951-11-27 1956-08-14 Bell Telephone Labor Inc Serial binary digital multiplier
FR1086474A (fr) * 1952-07-28

Also Published As

Publication number Publication date
US2971696A (en) 1961-02-14
GB765326A (en) 1957-01-09
NL195088A (fr)
DE1026996B (de) 1958-03-27

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