FR1026931A - Improvements to totalization circuits - Google Patents

Improvements to totalization circuits

Info

Publication number
FR1026931A
FR1026931A FR1026931DA FR1026931A FR 1026931 A FR1026931 A FR 1026931A FR 1026931D A FR1026931D A FR 1026931DA FR 1026931 A FR1026931 A FR 1026931A
Authority
FR
France
Prior art keywords
totalization
circuits
totalization circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
French (fr)
Inventor
Francois-Henri Raymond
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Societe dElectronique et dAutomatisme SA
Original Assignee
Societe dElectronique et dAutomatisme SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Societe dElectronique et dAutomatisme SA filed Critical Societe dElectronique et dAutomatisme SA
Application granted granted Critical
Publication of FR1026931A publication Critical patent/FR1026931A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/498—Computations with decimal numbers radix 12 or 20. using counter-type accumulators
    • G06F7/4981—Adding; Subtracting

Landscapes

  • Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
FR1026931D 1950-10-02 1950-10-02 Improvements to totalization circuits Expired FR1026931A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1026931T 1950-10-02

Publications (1)

Publication Number Publication Date
FR1026931A true FR1026931A (en) 1953-05-05

Family

ID=9580350

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1026931D Expired FR1026931A (en) 1950-10-02 1950-10-02 Improvements to totalization circuits

Country Status (1)

Country Link
FR (1) FR1026931A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3014662A (en) * 1954-07-19 1961-12-26 Ibm Counters with serially connected delay units

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3014662A (en) * 1954-07-19 1961-12-26 Ibm Counters with serially connected delay units

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