FI946158A0 - Digital integrated circuit architecture - Google Patents

Digital integrated circuit architecture

Info

Publication number
FI946158A0
FI946158A0 FI946158A FI946158A FI946158A0 FI 946158 A0 FI946158 A0 FI 946158A0 FI 946158 A FI946158 A FI 946158A FI 946158 A FI946158 A FI 946158A FI 946158 A0 FI946158 A0 FI 946158A0
Authority
FI
Finland
Prior art keywords
integrated circuit
circuit architecture
digital integrated
architecture
digital
Prior art date
Application number
FI946158A
Other languages
Finnish (fi)
Swedish (sv)
Other versions
FI946158A (en
Inventor
Gomez Rafael Sanz
Gonzalez Jose Luis Merino
Saenz Fernando Ortiz
Serratosa Maria Del Gutierrez
Original Assignee
Alcatel Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Nv filed Critical Alcatel Nv
Publication of FI946158A0 publication Critical patent/FI946158A0/en
Publication of FI946158A publication Critical patent/FI946158A/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037Bistable circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/012Modifications of generator to improve response time or to decrease power consumption
FI946158A 1993-12-30 1994-12-29 Digital integrated circuit architecture FI946158A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ES9302723A ES2078173B1 (en) 1993-12-30 1993-12-30 DIGITAL INTEGRATED CIRCUIT ARCHITECTURE.

Publications (2)

Publication Number Publication Date
FI946158A0 true FI946158A0 (en) 1994-12-29
FI946158A FI946158A (en) 1995-07-01

Family

ID=8284071

Family Applications (1)

Application Number Title Priority Date Filing Date
FI946158A FI946158A (en) 1993-12-30 1994-12-29 Digital integrated circuit architecture

Country Status (6)

Country Link
EP (1) EP0661808A3 (en)
JP (1) JPH0823265A (en)
AU (1) AU8029994A (en)
CA (1) CA2139283A1 (en)
ES (1) ES2078173B1 (en)
FI (1) FI946158A (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6035400A (en) * 1983-08-05 1985-02-23 Sharp Corp Complementary type metal oxide film semiconductor device
DE68923573T2 (en) * 1988-03-31 1996-01-18 Sony Corp Input circuits.
US4856035A (en) * 1988-05-26 1989-08-08 Raytheon Company CMOS binary up/down counter
JPH0815252B2 (en) * 1991-03-27 1996-02-14 松下電器産業株式会社 Flip-flop circuit
JPH05199080A (en) * 1992-01-17 1993-08-06 Sony Corp Complementary logic circuit

Also Published As

Publication number Publication date
ES2078173R (en) 1997-05-16
FI946158A (en) 1995-07-01
CA2139283A1 (en) 1995-07-01
JPH0823265A (en) 1996-01-23
EP0661808A2 (en) 1995-07-05
EP0661808A3 (en) 1996-05-22
ES2078173B1 (en) 1998-01-16
AU8029994A (en) 1995-07-06
ES2078173A2 (en) 1995-12-01

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Legal Events

Date Code Title Description
FD Application lapsed