FI863224A0 - Saekerhetsarrangemang foer en klocksignal. - Google Patents

Saekerhetsarrangemang foer en klocksignal.

Info

Publication number
FI863224A0
FI863224A0 FI863224A FI863224A FI863224A0 FI 863224 A0 FI863224 A0 FI 863224A0 FI 863224 A FI863224 A FI 863224A FI 863224 A FI863224 A FI 863224A FI 863224 A0 FI863224 A0 FI 863224A0
Authority
FI
Finland
Prior art keywords
saekerhetsarrangemang
klocksignal
foer
saekerhetsarrangemang foer
Prior art date
Application number
FI863224A
Other languages
English (en)
Other versions
FI863224A (fi
Inventor
Francis Melinn
Roger Greenland
Original Assignee
Plessey Overseas
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Plessey Overseas filed Critical Plessey Overseas
Publication of FI863224A0 publication Critical patent/FI863224A0/fi
Publication of FI863224A publication Critical patent/FI863224A/fi

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
FI863224A 1985-08-09 1986-08-06 Saekerhetsarrangemang foer en klocksignal. FI863224A (fi)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB08520035A GB2178926A (en) 1985-08-09 1985-08-09 Clock signal selection and security arrangements

Publications (2)

Publication Number Publication Date
FI863224A0 true FI863224A0 (fi) 1986-08-06
FI863224A FI863224A (fi) 1987-02-10

Family

ID=10583551

Family Applications (1)

Application Number Title Priority Date Filing Date
FI863224A FI863224A (fi) 1985-08-09 1986-08-06 Saekerhetsarrangemang foer en klocksignal.

Country Status (5)

Country Link
EP (1) EP0211674A3 (fi)
JP (1) JPS62168438A (fi)
FI (1) FI863224A (fi)
GB (1) GB2178926A (fi)
ZA (1) ZA865726B (fi)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6775344B1 (en) 1999-04-02 2004-08-10 Storage Technology Corporation Dropout resistant phase-locked loop

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2080251A5 (fi) * 1970-02-27 1971-11-12 Lannionnais Electronique
IT1051350B (it) * 1975-12-09 1981-04-21 Cselt Centro Studi Lab Telecom Sistema di temporizzazione tripli to per impianti duplicati conte nenti circuiti logici
US4322580A (en) * 1980-09-02 1982-03-30 Gte Automatic Electric Labs Inc. Clock selection circuit
FR2577087B1 (fr) * 1985-02-07 1987-03-06 Thomson Csf Mat Tel Dispositif de distribution d'horloge tripliquee, chaque signal d'horloge comportant un signal de synchronisation

Also Published As

Publication number Publication date
ZA865726B (en) 1988-11-30
GB8520035D0 (en) 1985-09-18
GB2178926A (en) 1987-02-18
EP0211674A3 (en) 1989-01-18
JPS62168438A (ja) 1987-07-24
EP0211674A2 (en) 1987-02-25
FI863224A (fi) 1987-02-10

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Legal Events

Date Code Title Description
MM Patent lapsed

Owner name: PLESSEY OVERSEAS LIMITED