FI843756L - MULTIPROCESSOR-CENTRALSTYRENHET FOER ETT FOERMEDLINGSSYSTEM, SAERSKILT ETT TELEFONFOERMEDLINGSSYSTEM. - Google Patents

MULTIPROCESSOR-CENTRALSTYRENHET FOER ETT FOERMEDLINGSSYSTEM, SAERSKILT ETT TELEFONFOERMEDLINGSSYSTEM.

Info

Publication number
FI843756L
FI843756L FI843756A FI843756A FI843756L FI 843756 L FI843756 L FI 843756L FI 843756 A FI843756 A FI 843756A FI 843756 A FI843756 A FI 843756A FI 843756 L FI843756 L FI 843756L
Authority
FI
Finland
Prior art keywords
cmy
processors
bus system
ett
ioc
Prior art date
Application number
FI843756A
Other languages
Finnish (fi)
Other versions
FI87508B (en
FI843756A0 (en
FI87508C (en
Inventor
Rudolf Bitzinger
Walter Engl
Siegfried Humml
Klaus Schreier
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of FI843756A0 publication Critical patent/FI843756A0/en
Publication of FI843756L publication Critical patent/FI843756L/en
Publication of FI87508B publication Critical patent/FI87508B/en
Application granted granted Critical
Publication of FI87508C publication Critical patent/FI87508C/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/74—Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54516—Initialization, software or data downloading
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/5455—Multi-processor, parallelism, distributed systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/1305—Software aspects
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13109—Initializing, personal profile
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
    • H04Q2213/13376—Information service, downloading of information, 0800/0900 services

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Multi Processors (AREA)
  • Acyclic And Carbocyclic Compounds In Medicinal Compositions (AREA)
  • Agricultural Chemicals And Associated Chemicals (AREA)
  • Hardware Redundancy (AREA)
  • Sub-Exchange Stations And Push- Button Telephones (AREA)

Abstract

The unit has a bus system (B:CMY), to which the processors (CP, IOC), which have their own local memory (LMY), are connected, and which is allocated sequentially to different ones of the processors (e.g. CP1, CPx, IOC0), and a main memory (CMY), which is connected to the bus system (B:CMY) and to which the processors (CP, IOC) sequentially have access via the bus system (B:CMY) in accordance with the allocations of the bus system (B:CMY). In order to carry out all the switching-oriented functions relating to special connections of telephone subscribers, e.g. speech path selection, switching through, charge accounting, call progress tone control, acceptance and recoding of call number, clear-down of connecting path, etc., the local memories (LMY) of all the processors (CP, IOC) having an at least partly identical catalogue of tasks store correspondingly identical control sections, which are required frequently or, in the case of a fault, immediately as well as data which are specially required for a single connection of two arbitrary telephone subscribers in relation to the current processing step, e.g. for the purpose of speech path selection. By contrast, in addition to control sections that are seldom required the main memory (CMY) also stores local data on a large multiplicity of current connections. <IMAGE>
FI843756A 1983-09-26 1984-09-25 MULTIPROCESSOR-CENTRALSTYRENHET FOER ETT FOERMEDLINGSSYSTEM, SAERSKILT ETT TELEFONFOERMEDLINGSSYSTEM FI87508C (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19833334766 DE3334766A1 (en) 1983-09-26 1983-09-26 MULTIPROCESSOR CENTRAL CONTROL UNIT OF A SWITCHING SYSTEM, IN PARTICULAR TELEPHONE SWITCHING SYSTEM
DE3334766 1983-09-26

Publications (4)

Publication Number Publication Date
FI843756A0 FI843756A0 (en) 1984-09-25
FI843756L true FI843756L (en) 1985-03-27
FI87508B FI87508B (en) 1992-09-30
FI87508C FI87508C (en) 1993-01-11

Family

ID=6210075

Family Applications (1)

Application Number Title Priority Date Filing Date
FI843756A FI87508C (en) 1983-09-26 1984-09-25 MULTIPROCESSOR-CENTRALSTYRENHET FOER ETT FOERMEDLINGSSYSTEM, SAERSKILT ETT TELEFONFOERMEDLINGSSYSTEM

Country Status (6)

Country Link
EP (1) EP0141984B1 (en)
JP (1) JPH0828897B2 (en)
AT (1) ATE59753T1 (en)
DE (2) DE3334766A1 (en)
FI (1) FI87508C (en)
ZA (1) ZA847565B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3334766A1 (en) * 1983-09-26 1985-04-11 Siemens AG, 1000 Berlin und 8000 München MULTIPROCESSOR CENTRAL CONTROL UNIT OF A SWITCHING SYSTEM, IN PARTICULAR TELEPHONE SWITCHING SYSTEM
HU190304B (en) * 1984-05-24 1986-08-28 Tavkoezlesi Kutato Intezet,Hu Method for implementing speech detection of satellite communication systems of individual speech channel with fix or random marking-out of the carrier
DE3629399A1 (en) * 1986-08-29 1988-03-03 Siemens Ag Method for operating the central memory of a multiprocessor-type common control unit of a switching system
DE10131920A1 (en) * 2001-07-02 2003-01-23 Tenovis Gmbh & Co Kg Communication installation with distributed control, has each equipment module provided with emergency operation-control unit for switching to emergency operation mode

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4115866A (en) * 1972-02-25 1978-09-19 International Standard Electric Corporation Data processing network for communications switching system
FR2259507B1 (en) * 1974-01-24 1980-01-18 Cit Alcatel
CH584488A5 (en) * 1975-05-05 1977-01-31 Ibm
US4212057A (en) * 1976-04-22 1980-07-08 General Electric Company Shared memory multi-microprocessor computer system
US4363094A (en) * 1977-12-29 1982-12-07 M/A-COM DDC, Inc. Communications processor
CA1101971A (en) * 1978-02-28 1981-05-26 Michael C.J. Cowpland Trunk control system
DE3334766A1 (en) * 1983-09-26 1985-04-11 Siemens AG, 1000 Berlin und 8000 München MULTIPROCESSOR CENTRAL CONTROL UNIT OF A SWITCHING SYSTEM, IN PARTICULAR TELEPHONE SWITCHING SYSTEM

Also Published As

Publication number Publication date
DE3334766A1 (en) 1985-04-11
FI87508B (en) 1992-09-30
EP0141984A3 (en) 1988-02-10
JPH0828897B2 (en) 1996-03-21
ZA847565B (en) 1985-05-29
EP0141984B1 (en) 1991-01-02
JPS6091796A (en) 1985-05-23
DE3483817D1 (en) 1991-02-07
FI843756A0 (en) 1984-09-25
EP0141984A2 (en) 1985-05-22
FI87508C (en) 1993-01-11
ATE59753T1 (en) 1991-01-15

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Legal Events

Date Code Title Description
MM Patent lapsed

Owner name: SIEMENS AKTIENGESELLSCHAFT