FI75703B - Saett och anordning att fassynkronisera en foermedlingsstation i ett digitalt telekommunikationsnaet. - Google Patents

Saett och anordning att fassynkronisera en foermedlingsstation i ett digitalt telekommunikationsnaet. Download PDF

Info

Publication number
FI75703B
FI75703B FI833901A FI833901A FI75703B FI 75703 B FI75703 B FI 75703B FI 833901 A FI833901 A FI 833901A FI 833901 A FI833901 A FI 833901A FI 75703 B FI75703 B FI 75703B
Authority
FI
Finland
Prior art keywords
signal
phase
differentiated
value
station
Prior art date
Application number
FI833901A
Other languages
English (en)
Swedish (sv)
Other versions
FI75703C (fi
FI833901A (fi
FI833901A0 (fi
Inventor
Harald Emil Brandt
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of FI833901A publication Critical patent/FI833901A/fi
Publication of FI833901A0 publication Critical patent/FI833901A0/fi
Application granted granted Critical
Publication of FI75703B publication Critical patent/FI75703B/fi
Publication of FI75703C publication Critical patent/FI75703C/fi

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0676—Mutual
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0691—Synchronisation in a TDM node

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Mobile Radio Communication Systems (AREA)

Claims (2)

1. Menetelmä vaiheen tahdistamiseksi välitysasemal-le digitaalisessa teleliikenneverkossa käsittäen signaali- 5 ohjatun oskillaattorin, jonka ohjaussignaali on riippuvainen yhteenpainotetusta vaihe-erosta välitysaseman oman kellon ja muiden asemien kellon välillä, tunnettu siitä, että vaihehypyn välttämiseksi vaihe-eroa vastaavasta signaalista otetaan näytteet kutakin 10 sisääntulevaa silmukkaa varten, näytearvot differentioidaan, differentioituja arvoja verrataan raja-arvoon, jonka ylittäminen merkitsee vaihehyppyä, ylitettäessä tämä raja-arvo summataan signaali, jolla on 15 ohjaussignaalin korkein arvo, mutta vastakkainen merkki, kompensointisignaalin muodostamiseksi, kompensointisignaali summataan differentioituun arvoon, differentioitu arvo summataan vastaaviin differentioituihin arvoihin, jotka ovat peräisin vertailusta muiden silmukoi-20 den vaiheiden kanssa ja summa-arvo integroidaan resultoivan ohjaussignaalin saamiseksi.
2. Laite vaiheiden tahdistamiseksi välitysasemalla digitaalisessa teleliikenneverkossa käsittäen signaaliohja- 25 tun oskillaattorin (K1), jonka ohjaussignaali on riippuvainen yhteenpainotetusta vaihe-erosta välitysaseman oman kellon ja muiden asemien kellon välillä patenttivaatimuksen 1 mukaisesti, tunnettu siitä, että laite käsittää vaiheilmaisimen (2) vaihe-eron tunnustelemiseksi aseman os-30 killaattorin ja kunkin sisääntulevan silmukan välillä ja eroon verrannollisen signaalin kehittämiseksi, differentiointipiirin (3) mainitun signaalin differentioi-miseksi, kompensointielimen (6) riippuvaisesti siitä, että differen-35 tioitu signaali ylittää määrätyn arvon summaamaan differen- II
FI833901A 1982-03-10 1983-10-25 Saett och anordning att fassynkronisera en foermedlingsstation i ett digitalt telekommunikationsnaet. FI75703C (fi)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
SE8201494 1982-03-10
SE8201494A SE430456B (sv) 1982-03-10 1982-03-10 Sett och anordning for att fassynkronisera en formedlingstation i ett digitalt telekommunikationsnet
PCT/SE1983/000068 WO1983003175A1 (en) 1982-03-10 1983-03-01 Method and apparatus for synchronising the phase of a transit exchange in a digital telecommunication network
SE8300068 1983-03-01

Publications (4)

Publication Number Publication Date
FI833901A FI833901A (fi) 1983-10-25
FI833901A0 FI833901A0 (fi) 1983-10-25
FI75703B true FI75703B (fi) 1988-03-31
FI75703C FI75703C (fi) 1988-07-11

Family

ID=20346223

Family Applications (1)

Application Number Title Priority Date Filing Date
FI833901A FI75703C (fi) 1982-03-10 1983-10-25 Saett och anordning att fassynkronisera en foermedlingsstation i ett digitalt telekommunikationsnaet.

Country Status (17)

Country Link
US (1) US4563767A (fi)
EP (1) EP0101713B1 (fi)
JP (1) JPS59500346A (fi)
KR (1) KR870000074B1 (fi)
AU (1) AU564531B2 (fi)
CA (1) CA1191210A (fi)
DE (1) DE3363869D1 (fi)
DK (1) DK161357C (fi)
EG (1) EG15936A (fi)
ES (1) ES520431A0 (fi)
FI (1) FI75703C (fi)
IE (1) IE54138B1 (fi)
IT (1) IT1201094B (fi)
MX (1) MX153259A (fi)
SE (1) SE430456B (fi)
WO (1) WO1983003175A1 (fi)
YU (1) YU56983A (fi)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4635249A (en) * 1985-05-03 1987-01-06 At&T Information Systems Inc. Glitchless clock signal control circuit for a duplicated system
US4807254A (en) * 1985-08-09 1989-02-21 Nec Corporation Carrier wave recovery system
US4736393A (en) * 1986-04-16 1988-04-05 American Telephone And Telegraph Co., At&T Information Systems, Inc. Distributed timing control for a distributed digital communication system
US4868513A (en) * 1987-09-11 1989-09-19 Amdahl Corporation Phase-locked loop with redundant reference input
US5060227A (en) * 1988-02-29 1991-10-22 Motorola, Inc. Digital telephone switch with simultaneous dual PCM format compatibility
US4860281A (en) * 1988-02-29 1989-08-22 Motorola, Inc. Individual subchannel loopback in the PCM interfaces of a digital telephone exchange with control of the outbound path
GB2242800B (en) * 1990-04-03 1993-11-24 Sony Corp Digital phase detector arrangements
US5341405A (en) * 1991-06-11 1994-08-23 Digital Equipment Corporation Data recovery apparatus and methods
US5412691A (en) * 1991-06-28 1995-05-02 Digital Equipment Corporation Method and apparatus for equalization for transmission over a band-limited channel
JP3241079B2 (ja) * 1992-02-24 2001-12-25 株式会社日立製作所 ディジタル位相同期回路
US5408473A (en) * 1992-03-03 1995-04-18 Digital Equipment Corporation Method and apparatus for transmission of communication signals over two parallel channels
US5384550A (en) * 1992-09-18 1995-01-24 Rockwell International Corporation Loop transient response estimator for improved acquisition performance
US5450447A (en) * 1992-09-30 1995-09-12 Rockwell International Corporation Adaptive variable-gain phase and frequency locked loop for rapid carrier acquisition
US7443250B2 (en) * 2006-09-29 2008-10-28 Silicon Laboratories Inc. Programmable phase-locked loop responsive to a selected bandwidth and a selected reference clock signal frequency to adjust circuit characteristics
US7405628B2 (en) * 2006-09-29 2008-07-29 Silicon Laboratories Inc. Technique for switching between input clocks in a phase-locked loop

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3555194A (en) * 1967-11-17 1971-01-12 Nippon Electric Co Interstation synchronization apparatus
JPS4943809B1 (fi) * 1968-10-25 1974-11-25
US3862365A (en) * 1971-11-12 1975-01-21 Nippon Electric Co Synchronizing system for a plurality of signal transmitters using oscillators of high frequency stability
JPS50115715A (fi) * 1974-02-22 1975-09-10
SE398698B (sv) * 1976-04-27 1978-01-09 Ericsson Telefon Ab L M Anordning for fassynkronisering av en formedlingsstation i ett digitalt telekommunikationsnet
US4075248A (en) * 1976-09-07 1978-02-21 Domtar Limited Production of syringealdehyde from hardwood waste pulping liquors
SE7714965L (sv) * 1977-12-30 1979-07-01 Ericsson Telefon Ab L M Anordning for att uppretthalla synkronism i ett digitalt telekommunikationsnet
JPS594900B2 (ja) * 1979-09-03 1984-02-01 日本電気株式会社 クロック再生回路

Also Published As

Publication number Publication date
JPS59500346A (ja) 1984-03-01
AU564531B2 (en) 1987-08-13
FI75703C (fi) 1988-07-11
DK161357C (da) 1991-12-02
SE430456B (sv) 1983-11-14
DE3363869D1 (en) 1986-07-10
EG15936A (en) 1986-12-30
FI833901A (fi) 1983-10-25
YU56983A (en) 1986-04-30
DK513383A (da) 1983-11-09
CA1191210A (en) 1985-07-30
JPH0443480B2 (fi) 1992-07-16
IE54138B1 (en) 1989-06-21
SE8201494L (sv) 1983-09-11
KR870000074B1 (ko) 1987-02-09
KR840004633A (ko) 1984-10-22
IT8319945A0 (it) 1983-03-08
IE830423L (en) 1983-09-10
MX153259A (es) 1986-09-02
FI833901A0 (fi) 1983-10-25
EP0101713A1 (en) 1984-03-07
EP0101713B1 (en) 1986-06-04
DK513383D0 (da) 1983-11-09
DK161357B (da) 1991-06-24
WO1983003175A1 (en) 1983-09-15
ES8407275A1 (es) 1984-08-16
IT1201094B (it) 1989-01-27
AU1229683A (en) 1983-10-18
ES520431A0 (es) 1984-08-16
US4563767A (en) 1986-01-07

Similar Documents

Publication Publication Date Title
FI75703B (fi) Saett och anordning att fassynkronisera en foermedlingsstation i ett digitalt telekommunikationsnaet.
EP2728693B1 (en) Current differential protection
KR100465944B1 (ko) 디지털 보호계전장치
EP0315983B1 (en) Longitudinal differential protection system
US4131856A (en) Electrical synchronizing circuits
US4320516A (en) Circuit for ascertaining of the phase jitter of digital signals
US4206414A (en) Electrical synchronizing circuits
CN101755372B (zh) 考虑电信网络中路由切换的、用于电力网络的方法和保护设备
CN111929491B (zh) 基于特勒根似功率定理的输电线路采样同步方法及系统
CA1150792A (en) Method and apparatus for signal transmission
US4074207A (en) Interference resistant phase-locked loop
FI58405C (fi) Anordning foer maetning av smao frekvensdifferenser
EP2339763A1 (en) Current detector
JPS648821A (en) Differential relay
CN106054589B (zh) 一种导航卫星星间链路设备自适应精准时间建立方法
CN101478162B (zh) 一种三相桥式dvr的最小零序分量补偿控制方法
JPH0146831B2 (fi)
JPS58107750A (ja) 伝送路の遅延時間測定方法
JPS56126357A (en) Digital signal separating circuit
SU1363185A1 (ru) Функциональный преобразователь
Schauer External Clock Synchronization Plans for the GTD 3 EAX Digital Toll/Tandem
JPH01202114A (ja) サンプリング方式
Owens Integrity of multivariable first-order-type systems
Moxley et al. Uses and Limitations of Advanced Analog Quantities
Davies et al. The application of transputers for digital control of static VAr compensators

Legal Events

Date Code Title Description
MM Patent lapsed

Owner name: OY L M ERICSSON AB