FI122160B - Arrangement for current measurement in a frequency converter - Google Patents

Description

TECHNICAL FIELD The present invention relates to a method and apparatus for measuring the currents of a frequency converter. In particular, the invention relates to a method and apparatus for measuring the output currents of a frequency converter, but it can also be applied to an arrangement in which the input currents of a frequency converter can also be measured.

i 10 Prior Art

Traditionally, the output currents of a frequency converter for which the motor control performance is desired to be reasonably good have been measured with either two or three current converters. For control, the output currents are usually sampled in the middle of the 15 output voltage zero vectors with the smallest harmonic content of the measurement signal. A disadvantage of this method of measurement is its high cost, since current converters with auxiliary components, such as A / D converters, are required for several, up to a maximum of 3, one for each motor phase current to be measured.

US Patent 1163371 discloses an apparatus for measuring the output currents of a frequency converter using a current sensor in the DC link circuit for generating signals corresponding to the DC current of the frequency converter and a unit for converting the DC values of the DC converter to the current values. In addition, the unit 25 has a memory in which the current and previous signal values are stored, and a differential means for generating a current value corresponding to each output phase current as a difference between successive signals. However, the method has such a limitation of ___ output voltage generation that a single modulation period is | o only two pairs of switches are modulated.

isL 30 The power supply side of the drive is usually measured

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^ only when the drive network bridge is active. In accordance with the prior art, current converters are used in the same way as on the output side, £ 2 or 3 each.

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^ 35 The Sigma-delta (Σ-Δ) conversion is a known way of converting an analog 05i § signal to a digital (AD-conversion) or vice versa (DA-conversion). Such a converter is easy to implement and integrate into a single circuit, e.g. using a cost effective CMOS process. Sigma-delta converters are part of the product line of almost all known analog chip manufacturers. Sigma-! It is characteristic of a 2 delta AD conversion that its accuracy is better the longer time (= more sampling clock cycles) can be used for the conversion and that it is integrative in nature, i.e. the end result is proportional to the time integral of the entire conversion time of the analog signal to be converted.

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Frequency converter current measurement normally aims to convert information about the instantaneous values of the output currents, which are in the form of analog signals, into the digital format required by the device control unit. The Sigma-delta conversion is in itself a suitable method for this purpose, but its use is subject to a limitation that the analog signal should not change significantly during the conversion time to ensure an accurate result. Thus, it is well suited for use when the measuring sensor connected to it measures a linear, relatively slow-changing signal. For example, the rate of change of the drive output or input current is slow enough under normal circumstances so that the sigma-delta conversion can be well used when current sensors are placed in the drive output phases.

Instead, the method known from, for example, Fl 116337, cited above, which utilizes only one current sensor located in a DC intermediate circuit, produces signals that are too short and rapidly changing for 20 normal sigma-delta conversions. In such a case, some other type of high-speed AD conversion is traditionally used. Such is the case with the so-called. a direct or flash converter containing a plurality of comparators for comparing the analog signal to be measured with comparator-specific reference levels. The disadvantage of such a solution is the large number of comparators which f 25 is proportional to the desired resolution.

Sampling of the fast-changing pulse-like signal formed by the DC link current of the frequency converter also involves a known timing problem, which is due to oscillations that occur in the signal for some time after a sharp pulse edge.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a novel measuring method and apparatus for measuring the currents of a frequency converter ig which avoids the above disadvantages and enables the instantaneous measurement of both input and output currents at low cost and with sufficient accuracy only. using one current sensor and a sigma-delta converter used with it. This object is achieved by the method and apparatus of the invention, which is characterized in what is stated in the characterizing parts of the independent claims. Other preferred embodiments of the invention are claimed in the dependent claims.

It is known that the output currents of a frequency converter can be measured by a single current sensor located in the DC link, for example according to the aforementioned patent Fl 116337. In turn, as known from F119493, both the input and output currents of the drive can be measured with a single current sensor arranged in series with a DC capacitor filter capacitor.

The method and arrangement of the present invention may be embodied e.g. in connection with both of the aforementioned current measurement methods. In the arrangement, the current sensor is located in the DC link of the frequency converter and its output signal is directly fed to the sigma-delta converter according to the invention, which provides final information on the instantaneous currents values.

The sigma-delta converter of the invention has built-in memory units of analog value of the signal. There are at least as many memory units as output and input currents whose instantaneous values are determined by a current sensor and a sigma-delta converter connected thereto. The method according to the invention operates in that, when the sigma-delta conversion begins, the final value of the previous conversion of the signal whose conversion is in question is derived from the memory unit to the input of the converter. This way you do not have to start with a conversion from zero, the initial value is already close to the correct end result.

By doing this, significantly more time is available for effective conversion than would be possible without memory units.

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The method of measuring the current according to the invention is integrative in nature, whereby the timing problem due to the switching oscillations in the current signal is smaller than the known methods.

Memory storage of analog signals for a short time between conversion intervals is easy to implement, since the memory units can be integrated into the same o integrated circuit with the sigma-delta converter itself, thus keeping costs low, o <o 0

Brief Description of the Drawings! In the following, the invention will be explained in more detail by means of the examples 35 with reference to the accompanying drawings, in which: Figure 1 shows the main circuit of the drive and the current sensor inserted in its intermediate circuit,

Figure 2 shows an example of frequency converter modulation and intermediate circuit current generation in the case of Figure 1,

Figure 3 shows an example of a detailed curve shape of the drive intermediate circuit current,

Figure 4 illustrates the operation of the sigma-delta transform, and

Fig. 5 shows a block diagram of a sigma-delta converter according to the invention.

Detailed Description of the Invention

Figure 1 shows a known three-phase PWM frequency converter 10 of the main circuit of the supply network power filter choke Lac, a network bridge, consisting of diodes 10 feed the three-phase AC voltage rectifying-order direct-voltage intermediate circuit DC voltage filter capacitors Cdc, the three power semiconductors carried out consisting of the phase switches of the load bridge 11 which forms the intermediate-circuit DC voltage U DC three-phase output voltage Uu, Uv, 15 Uw and control unit 12. The phase switch consists of a top and bottom branch controllable power semiconductor switch, preferably IGBTs, and diodes connected in parallel thereto. The phase switch connects the output phase to either + UDc (top position) or -UDc (bottom position). Turning the switch, e.g. from the upper position to the lower position, is performed as shown in Fig. 3 so that first the control pulse of the IGBT 20 which is conducting the upper branch and the so called after the dead time th, the IGBT control pulse of the lower branch is initiated. The control pulses are formed by the so-called control unit. modulator.

The present invention relates to a current measurement system in which the actual current sensor is, for example, the shunt resistor Rdc shown in the figure, which may be located either in the -Udc branch or alternatively in the + Udc branch as shown in the figure.

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Figure 2 is a view showing the so-called. the principle implementation of sinusoidal modulation, which is one option for controlling the power bridge switches of a load bridge and the generation of an intermediate circuit current signal. In sinusoidal modulation, each phase voltage has its own sinusoidal reference signal (Uuref, 30 Uvref, Uwref) which is compared to a common triangular signal UA. As a result of the comparison c0, three phase switch positions U, V, and W are obtained as shown in Fig. 2, where the "1" position means that the main branch is controlled by the power branch * switch and the "0" position by the lower branch switch. the output currents seen by the current sensor in the intermediate circuit, for example g 35 in the time interval t-ι - t2, with all phase switches in the down position, the current in the intermediate circuit o 0. For example, in the interval t2 -13 with the U phase switch in phase switches in the lower position, the intermediate circuit current is the same as the phase current iu of U.Table 1 shows the dependencies between all the different switch positions and the phase currents shown in the iocf \ 5 signal (positive direction of currents is defined towards the motor):

U VW ipc U VW iDC

0 0 0 0 1 1 0 - iw 10 0 iu 0 11 - iu 0 10 iv 10 1 -iv 00 1 iw 111 0

Figure 3 shows the control of the power switches and the typical behavior of the intermediate circuit current as the phase switch position instruction turns from top to bottom. At time t 1, the position instruction of the phase switch U turns from the upper position to the lower position, whereby the control pulse of the IGBT in the leading branch is immediately stopped. In this example, the phase current iu is positive, which implies that the intermediate circuit current iDc begins to decrease at a rate determined by the IGBT power cut feature of the upstream branch. The so-called dead time tD (for example, 2με), which is intended to prevent simultaneous upstream and downstream control, is directed to the lower branch IGBT.

15 Each rotation of the phase switch causes not only a step change in the intermediate circuit current, but also typically vibration phenomena, the duration of which depends e.g. impedances of the motor circuit. This phenomenon is detrimental to known current measurement methods because a sample of the current can be taken only after the vibration suppression is insignificant, for example 5ps after the switch rotation is started 20 at time t2. f!

The remainder of the figure shows the rotation of the phase switch U from the lower position to the upper position in the above situation with a positive direction of the phase current iu. The control of the power switches proceeds in the same way as before, but it must be noted from the current signal that it does not begin to change until the upper

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25 branches after the IGBT lights up, as the downstream conducting current passes through a zero diode. Also, the quenching of the switching phenomena of the current signal is delayed g correspondingly.

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Figure 4 shows a block diagram of a sigma-delta A / D converter and the principle operation. In the figure Ain is the analog input signal to be measured, {

The pulse-like output signal generated by the Dout converter and the CLK sampling signal. Block 1 is the adder generating the sum of the analog signal to be measured and the signal generated from the output signal in the integrator block 4. The sum signal whose average converter principle is constantly maintained at zero is compared to the reference signal (normally 0) in comparator block 2. The comparator controls flip-flop 3 whose output 5 (i.e., the output Dout of the converter) changes to one (when the comparator output is 1) or zero (when the comparator output is 0) synchronized by the clock signal CLK. The pulse ratio of the output signal Dout, i.e. the ratio of 1-states to 0-states, is thus directly proportional to the input signal A! N. By counting the number of clock cycles (CLK in the figure or other internal clock of the system) during each of the two output states, which is very easy in digital signal processing, digital data from the analog input signal is generated.

The lower part of the figure shows characteristic curve shapes of the operation of the converter. As the analog input signal increases in the positive direction, the relative time proportion of the 1-state period of the output signal also increases, and vice versa.

Note that generating an output signal with a sigma-delta converter requires a finite amount of time due to clock pulse calculation, so it is advantageous for the signal to be measured to remain stable during measurement. On the other hand, for example, high frequency interference signals having an average value of 0 do not interfere with the measurement because of its integrating nature.

The example of Fig. 5 illustrates a block diagram of a sigma-delta converter according to the invention suitable for separating three output current signals from a measuring signal of a current sensor disposed in the drive circuit of Fig. 1. The blocks and markings of the pattern are otherwise the same as the pattern.

4, but there are now three integrator blocks (4.1, 4.2 and 4.3) and switches on each side of which integrators can be disconnected between adder 1 and output signal Dout. Ko. the switches are controlled by external £ 30 signals, which may be e.g. PWM signals phased in to the drive bridge of the drive but to the modulator. In this way,

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x convention where, for example, when measuring the current converter, the phase current iu (see Fig. 2) is cc | integrator 4.1 is active and other integrators are disconnected.

S Proceed as for the other steps (iv - 4.2, iw - 4.3). j 35 In accordance with the invention, the output signals of the integrators (sum f

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° integration result to maim 1) remains in memory for the time the integrator is disconnected. Thus, at the beginning of the conversion, the end result of the preceding conversion, which differs from the signal at the moment of conversion, is input to the adder input only to the extent that the output current has changed during one module 7 switching cycle. Thus, the conversion takes place rapidly since the integrator does not have to start from zero, which would be the case with the conventional converter of Figure 4.

It should be noted that the memory units of the integrators 4.1 - 4.3 continuously store the values of all three phase currents in analog form, which information can be utilized by the drive control unit when needed. According to a preferred embodiment of the invention, the integrators and memory units are located outside the sigma-delta converter.

It will be apparent to one skilled in the art that the various embodiments of the invention are not limited to the examples above, but may vary within the scope of the following claims.

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Claims (6)

A method for measuring the output and / or input currents (iu, iv, iw) of a frequency converter, wherein the frequency converter has a mains bridge (10) connected to an AC mains, a three-phase load bridge (11) connected to an AC load and a dc Cpc), wherein the load bridge (11) has semiconductor switches controlled by each step controlled by pulse width modulation, and which network bridge (10) is passive or active, having diodes or semiconductor switches controlled by pulse width modulators in each phase, 15 current measurement transducers (Rdc) in the DC link circuit, the analog current signal of which comprises samples of the output and / or input currents to be measured, characterized in that - the analog current signal (iqc) produced by the current transducer (Rdc) is converted into a digital sigma delta 20. which converter includes either internal or external memory-integrated integrators (4.1 to 4.3) which are at least as many as the output and / or input currents to be measured, and wherein the sigma-delta at the beginning of the conversion into the converter's adder (1) deriving from the memory units of the integrators the final value of the previous conversion of the current signal of which the conversion is concerned. A method according to claim 1, characterized in that the integrator blocks with memory function are separated on both sides by switches controlled by external signals, e.g. one at a time is connected between the output signal (Dout) of the sigma-delta converter and the adder (1). CD LO 5 35 Method according to claim 1 or 2, characterized in that each integrator block (4.1 to 4.3) corresponds to its own specific inverter input or output current, the value of which is stored in the integrator memory block during the time of the sample in question. current is displayed on the current transducer. ί 4. Apparatus for measuring the output and / or input currents of a frequency converter comprising a mains bridge (10) to be connected to an AC mains, a three-phase 5 load bridge (11) connected to an AC load, and a DC link with a capacitor (Cdc), ) has in each phase controllable semiconductor switches controlled by pulse width modulation, each of the network bridges (10) being passive or active, having in each phase diodes or controllable semiconductor switches controlled by pulse width modulation, and) back-transducer (Rdc), characterized in that the apparatus has a 15 sigma-delta converter which can convert the analog current signal (iDc) produced by the current transducer (Rdc) into a digital one, the converter includes either internal or external memory functions. a pair of integrated integrators (4.1 to 4.3), which are at least as many as the output and / or input currents to be measured, and 20. wherein the converter is adapted to operate upon transmitting to the converter adder (1) the conversion is the final value of the previous conversion. Apparatus according to claim 4, characterized in that the integrator blocks with memory function are separated on both sides by switches controlled by external signals, for example in the case of a load bridge pulse width modulator and / or active networks, also controlled by a network bridge pulse width modulator an integrator block at a time is coupled to an active sigma-delta between the output signal (D0ut) of the converter and the adder (1). ° X Apparatus according to claim 4 or 5, characterized in that each integrator block is represented by its own in-determined frequency of the inverter input or output current, the value of which is arranged in the integrator to be stored during the time of the sample. current is displayed on the current sensor.