ES402482A1 - Perfeccionamientos en dispositivos de demodulacion de men- sajes codificados. - Google Patents

Perfeccionamientos en dispositivos de demodulacion de men- sajes codificados.

Info

Publication number
ES402482A1
ES402482A1 ES402482A ES402482A ES402482A1 ES 402482 A1 ES402482 A1 ES 402482A1 ES 402482 A ES402482 A ES 402482A ES 402482 A ES402482 A ES 402482A ES 402482 A1 ES402482 A1 ES 402482A1
Authority
ES
Spain
Prior art keywords
fronts
time interval
translation
machine
legally binding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES402482A
Other languages
English (en)
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Compagnie Generale dAutomatisme SA
Original Assignee
Compagnie Generale dAutomatisme SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compagnie Generale dAutomatisme SA filed Critical Compagnie Generale dAutomatisme SA
Publication of ES402482A1 publication Critical patent/ES402482A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Facsimile Transmission Control (AREA)
  • Electrical Control Of Ignition Timing (AREA)
ES402482A 1971-05-07 1972-05-06 Perfeccionamientos en dispositivos de demodulacion de men- sajes codificados. Expired ES402482A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7116653A FR2136906B1 (enrdf_load_stackoverflow) 1971-05-07 1971-05-07

Publications (1)

Publication Number Publication Date
ES402482A1 true ES402482A1 (es) 1975-03-16

Family

ID=9076671

Family Applications (1)

Application Number Title Priority Date Filing Date
ES402482A Expired ES402482A1 (es) 1971-05-07 1972-05-06 Perfeccionamientos en dispositivos de demodulacion de men- sajes codificados.

Country Status (3)

Country Link
ES (1) ES402482A1 (enrdf_load_stackoverflow)
FR (1) FR2136906B1 (enrdf_load_stackoverflow)
IT (1) IT955293B (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT992697B (it) * 1972-09-07 1975-09-30 Ibm Circuito demudulatore perfezionato

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3395355A (en) * 1964-04-16 1968-07-30 Potter Instrument Co Inc Variable time discriminator for double frequency encoded information
US3401346A (en) * 1965-12-28 1968-09-10 Ibm Binary data detection system employing phase modulation techniques

Also Published As

Publication number Publication date
IT955293B (it) 1973-09-29
FR2136906A1 (enrdf_load_stackoverflow) 1972-12-29
FR2136906B1 (enrdf_load_stackoverflow) 1975-07-04

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