ES3016857T3 - Method of selecting a prover - Google Patents
Method of selecting a prover Download PDFInfo
- Publication number
- ES3016857T3 ES3016857T3 ES18202161T ES18202161T ES3016857T3 ES 3016857 T3 ES3016857 T3 ES 3016857T3 ES 18202161 T ES18202161 T ES 18202161T ES 18202161 T ES18202161 T ES 18202161T ES 3016857 T3 ES3016857 T3 ES 3016857T3
- Authority
- ES
- Spain
- Prior art keywords
- testers
- property
- design
- module
- checker
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N5/00—Computing arrangements using knowledge-based models
- G06N5/01—Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound
- G06N5/013—Automatic theorem proving
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
- G06F30/27—Design optimisation, verification or simulation using machine learning, e.g. artificial intelligence, neural networks, support vector machines [SVM] or training a model
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
- G06F30/3323—Design verification, e.g. functional simulation or model checking using formal methods, e.g. equivalence checking or property checking
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Evolutionary Computation (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Software Systems (AREA)
- Artificial Intelligence (AREA)
- Geometry (AREA)
- Data Mining & Analysis (AREA)
- Computing Systems (AREA)
- Computational Linguistics (AREA)
- Mathematical Physics (AREA)
- Computer Vision & Pattern Recognition (AREA)
- Medical Informatics (AREA)
- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| LU100491A LU100491B1 (en) | 2017-10-23 | 2017-10-23 | Method of selecting a prover |
| US15/790,339 US10733344B2 (en) | 2017-10-23 | 2017-10-23 | Method of selecting a prover |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ES3016857T3 true ES3016857T3 (en) | 2025-05-09 |
Family
ID=63862081
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES18202161T Active ES3016857T3 (en) | 2017-10-23 | 2018-10-23 | Method of selecting a prover |
Country Status (2)
| Country | Link |
|---|---|
| EP (1) | EP3474196B1 (de) |
| ES (1) | ES3016857T3 (de) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112270614B (zh) * | 2020-09-29 | 2024-05-10 | 广东工业大学 | 一种面向制造企业全系统优化设计的设计资源大数据建模方法 |
| KR102665023B1 (ko) * | 2021-12-20 | 2024-05-13 | 부산대학교 산학협력단 | 타겟 시스템을 위한 관측 변수를 결정하는 방법 및 장치 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10366330B2 (en) * | 2013-05-03 | 2019-07-30 | Synopsys, Inc. | Formal verification result prediction |
| US10387605B2 (en) * | 2015-07-23 | 2019-08-20 | Synopsys, Inc. | System and method for managing and composing verification engines |
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2018
- 2018-10-23 EP EP18202161.8A patent/EP3474196B1/de active Active
- 2018-10-23 ES ES18202161T patent/ES3016857T3/es active Active
Also Published As
| Publication number | Publication date |
|---|---|
| EP3474196A1 (de) | 2019-04-24 |
| EP3474196C0 (de) | 2025-01-08 |
| EP3474196B1 (de) | 2025-01-08 |
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