ES2965149T3 - Procedure for configuring network and terminal device and control resource set - Google Patents

Abstract

A method for configuring a set of control resources and a network device and a terminal is disclosed. The method for configuring a set of control resources comprises: configuring, for a terminal, indication information to indicate position information in the time-frequency domain about a set of data information control resources; and sending the indication information to the terminal, wherein the indication information comprises: a first indication field for indicating downlink numerical value configuration information, and a second indication field for indicating a downlink configuration codebook. set of control resources. (Automatic translation with Google Translate, without legal value)

Description

DESCRIPTION

Procedure for configuring network and terminal device and control resource set

TECHNICAL FIELD

The present disclosure relates to the field of communication technology, in particular to a procedure for configuring a set of control resources (CORESET), a network equipment and a terminal.

BACKGROUND

In a 5th generation (5G) communication system (also called new radio (NR) system), network equipment needs to transmit a synchronized signal block (SS block or SSB) to terminals for synchronization purposes, information acquisition of the system, measurement and evaluation or similar. An SS block is composed of a new synchronized radio signal (NR-SS) and a new radio physical transmission channel (NR-PBCH). The NR-SS includes a new primary radio synchronized signal (NR-PSS) and a new secondary synchronized radio signal (NR-SSS).

VIVO published document, "Views on NR-PBCH contents and payload size" (3GPP TSG-RAN WGI NR Meeting #90 Prague, Czech Republic, August 21 - 25, 2017) analyzes the content of Nr -PBCII.

Published document MEDIATEK INC: " Discussions on CORESET Configurations" (3GPP TSG RAN WG1 NRAH#2 Qingdao, China Meeting) discusses COREsET configurations and properties.

Published document LENOVO ET COL.: "Discussion on RMSI delivery" (3GPP TSG RAN WG1 Meeting #90 Prague, Czech Rep., August 21-25, 2017) provides opinions on RMSI delivery.

The published paper HUAWEI ET COL.: "On numerology determination during initial access" (3GPP TSG RAN WG1 Meeting #90 Prague, Czech Republic, August 21 - 25, 2017), discusses the determination of numerology to receive the minimum remaining information system, other system information, paging and initial random access after receiving SS and PBCH.

Published document HUAWEI ET COL.: “ NR RMSI delivery” (3GPP TSG RAN WGI Meeting #90 Prague, Czech Republic, August 21 – 25, 2017) discusses the RMSI delivery mechanism, including CORESET configuration. Published document HUAWEI ET COL.: "RMSI delivery" (3GPP TSG R{N WGI Meeting NR#3 Nagoya, Japan, September 18 -21, 2017) discusses RMSI delivery and CORESET configuration for RMSI.

SUMMARY

In a first aspect, an embodiment of the present disclosure provides a method for configuring a control resource set (CORESET) according to claim 1.

In a second aspect, an embodiment of the present disclosure further provides a network equipment according to claim 7.

In a fourth aspect, an embodiment of the present disclosure provides a method for configuring a CORESET according to claim 9.

In a sixth aspect, an embodiment of the present disclosure further provides a terminal according to claim 13.

BRIEF DESCRIPTION OF THE DRAWINGS

To better clarify the technical solutions of the embodiments of the present disclosure, the drawings used in the description of the embodiments are briefly presented below. Apparently, the described drawings merely illustrate a portion of the described embodiments. One of ordinary skill in the art can obtain other drawings based on the described drawings without any creative effort.

Figure 1 is a schematic diagram of the time-frequency domain resource of an SS block;

Figure 2 is a schematic diagram of the time-frequency domain resources of a CORESET and an SS block;

Figure 3 is a schematic flowchart of a CORESET configuration procedure applied to one side of network equipment according to an embodiment of the present disclosure;

Figures 4a to 4b are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a first scenario;

Figure 5 is a schematic diagram of the time-frequency domain resources of a CORESET and an SS block in a second scenario;

Figures 6a to 6b are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a third scenario;

Figures 7a to 7b are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a fourth scenario;

Figures 8a to 8b are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a fifth scenario;

Figures 9a to 9b are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a sixth scenario;

Figures 10a to 10b are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an Ss block in a seventh scenario;

Figures 11a to 11c are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in an eighth scenario;

Figure 12 is a schematic resource diagram in the time-frequency domain of a CORESET and an SS block in a ninth scenario;

Figures 13a to 13c are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a tenth scenario;

Figures 14a to 14c are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in an eleventh scenario;

Figures 15a to 15c are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a twelfth scenario;

Figures 16a to 16c are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a thirteenth scenario;

Figures 17a to 17d are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a fourteenth scenario;

Figures 18a to 18b are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an S<s>block in a fifteenth scenario;

Figures 19a to 19d are, respectively, schematic resource diagrams in the time-frequency domain of a CORESET and an SS block in a sixteenth scenario;

Figure 20 is a schematic module diagram of a network equipment according to an embodiment of the present disclosure;

Figure 21 is a block diagram of a network equipment according to an embodiment of the present disclosure; Figure 22 is a schematic flowchart of a configuration procedure of a CORESET applied to one side of the terminal according to an embodiment of the present disclosure;

Figure 23 is a schematic module diagram of a terminal according to an embodiment of the present disclosure; and

Figure 24 is a block diagram of a terminal according to an embodiment of the present disclosure.

DETAILED DESCRIPTION

Below, exemplary embodiments of the present disclosure are described in detail with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are illustrated in the accompanying drawings, the disclosure can, however, be embodied in many different ways and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the present disclosure is exhaustive and fully conveys the scope of the present disclosure to those skilled in the art.

The terms "first", "second" and the like in the specification and claims of this disclosure are adopted not to describe a specific sequence or order but to distinguish similar objects. It should be understood that data used in this manner may be exchanged under conditions suitable for the implementation of the embodiments of the disclosure described herein in a sequence separate from that shown or described herein. Furthermore, the terms "include" and "have" and any variants thereof are intended to cover non-exclusive inclusions. For example, a process, procedure, system, product, or equipment that includes a number of steps or units is not limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or are not clearly listed. intrinsic to the process, procedure, product or equipment. It should also be noted that the legends are consistent in all the drawings.

In a 5th generation (5G) communication system (also called new radio (NR) system), a network equipment needs to transmit a synchronized signal and a PBCH block (SS block or SSB) to terminals for purposes of synchronization, acquisition , measurement and evaluation of system information or similar. An SS block is composed of a new synchronized radio signal (NR-SS) and a new radio physical transmission channel (NR-PBCH). The NR-SS includes a new primary radio synchronized signal (NR-PSS) and a new secondary synchronized radio signal (NR-SSS). As shown in Figure 1, in an SS block that includes 4 orthogonal frequency division multiplexing (OFDM) symbols, the NR-SS and NR-PBCH are assigned in the following order: NR-PSS, NR-PBCH , NR-SSS, NR-PBCH. The NR-PSS and NR-SSS respectively occupy one OFDM symbol in the time domain and 12 resource blocks (RB) in the frequency domain. The NR-PBCH signal occupies two OFDM symbols in the time domain and 24 RBs in the frequency domain.

Furthermore, in the NR system, CORESET is introduced. A CORESET includes multiple search spaces. There are a plurality of candidate positions for transmitting the physical downlink control channel (PDCCH) in a search space. Currently, the supported CORESET duration includes 1, 2, or 3 consecutive OFDM symbols in the time domain. Every 2 or 6 resource element groups (REG) form a REG package. The network equipment allocates resources for PDCCH in a minimum unit of a REG packet. A REG is defined as an OFDM symbol in the time domain and a physical resource block (PRB) in the frequency domain. A CORESET may include a plurality of control channel elements (CCE) and a CCE includes 6 REGs. A number of CCEs included in a CORESET is called an aggregation level (AL). For example, a CORESET that occupies two symbols in the time domain and 24 RBs in the frequency domain has an AL of 8.

The NR-PBCH signal is mainly used to acquire a system master information block (MIB). The MIB carries CORESET configuration information. With the configuration information, positions in the CORESET time-frequency domain can be reported to a terminal. The terminal performs blind CORESET detection at these time-frequency domain positions, to acquire downlink control information (DCI) for scheduling the data portion, which can be used to schedule the minimum remaining system information (RMSI). , etc. In addition, the MIB also carries downlink (DL) numerological information, which is used to indicate whether the numerological information for the SS block is consistent with the numerological information for RMSI, the 2/4 message used for initial access and transmits another system information (OSI). Taking a CORESET possibly containing DCI used to schedule RMSI (RMSI CORESET for short), for example, as shown in Figure 2, a given NR-PBCH of the transmitted SS block contains configuration information of a CORESET RMSI. The configuration information indicates that the RMSI CORESET is time division multiplexed (TDM) with an SS block, located in the first two OFDM symbols of the SS block and has an AL of 8. The RMSI CORESET includes a PDCCH used to schedule RMSI , i.e. includes DCI used to program RMSI.

Multiple numerologies are supported in an NR system. For a scenario where the system bandwidth is above 6 GHz, a terminal supports subcarrier spacing of 60/120/240 kHz; and for a scenario where the system bandwidth is below 6 GHz, a terminal supports a subcarrier spacing of 15/30/60 kHz. When the subcarrier spacing is 15/30/120/240 kHz, an SS block can be transmitted. When the subcarrier spacing is 30 kHz, the SS block can be designed in two different patterns. A Pattern 1 is configured for LTE-NR coexistence, while a Pattern 2 is configured for Ultra Reliable Low Latency Communications (URLLC) service. When the subcarrier spacing is 15/30/60/120 kHz, data can be transmitted. However, the numerology of the data may be different from that of the SS block. The CORESET RMSI numerology should be kept consistent with the corresponding RMSI numerology. Due to the fact that SS block and RMSI CORESET having the same numerology or different numerologies can have many combinations, and a designed position of SS block is different when the numerology is different, setting up RMSI CORESET can be very complicated. Consequently, an indication of the RMSI CORESET configuration can occupy many bits in the MIB, thus increasing the bit overhead of the MIB.

To address the above technical problem, one embodiment of the present disclosure provides a procedure for configuring a CORESET.

The configuration procedure of a CORESET provided by the embodiment of the present disclosure is applied to the network equipment side and, as shown in Figure 3, specifically includes the following steps.

Step 31 includes: configuring, for a terminal, indication information to indicate position information in the time-frequency domain of the data information CORESET.

The indication information includes: a first indication field to indicate downlink numerology information and a second indication field to indicate a CORESET configuration. Specifically, the indication information may be carried in a MIB of the system, that is, the first indication field and the second indication field are carried in the MIB.

Step 32 includes: transmitting the indication information to the terminal.

Specifically, an SS block carrying the system MIB is transmitted to a terminal. That is, the indication information is transmitted to a terminal by broadcast information.

The first indication field includes at least one of: first indication information to indicate whether the numerological information for the CORESET is the same as the numerological information for the SS block; or second indication information to indicate the numerological information for the CORESET.

Specifically, when the numerology information for the SS block is the first numerology information, if the second indication information is a first value, the second indication information indicates that the numerology information for the CORESET is the second numerology information corresponding to the first numerology information. Specifically, numerological information includes: subcarrier spacing, cyclic prefix and the like. Taking the subcarrier spacing, for example, when the subcarrier spacing for the SS block is a first subcarrier spacing, if the second indication information is a first value, the second indication information indicates that the subcarrier spacing for the CORESET is a second subcarrier spacing corresponding to the spacing of the first subcarrier. For a specific mapping relationship between the subcarrier spacing for CORESET (e.g., RMSI CORESET) and the subcarrier spacing for the SS block, see the following Table 1:

Table 1

Taking RMSI CORESET, for example, when the subcarrier spacing for the SS block is 15 kHz, if the second indication information is one of 0 and 1, the second indication information indicates that the subcarrier spacing for the CORESET is 15 kHz, which corresponds to 15 kHz. When a subcarrier spacing for the SS block is 30 kHz, if the second indication information includes 2 bits, the second indication information may specifically indicate that the subcarrier spacing for the CORESET is 15 kHz, 30 kHz, or 60 kHz which corresponds to 30 kHz; If the second indication information includes 1 bit, it cannot indicate the subcarrier spacing for CORESET, so the terminal has to perform blind detection. When a subcarrier spacing for the SS block is 120 kHz, if the second indication information is one of 0 and 1, the second indication information indicates that the subcarrier spacing for the CORESET is 60 kHz which corresponds to the 120 kHz; if the second indication information is the other of 0 and 1, the second indication information indicates that the subcarrier spacing for the CORESET is 120 kHz which corresponds to 120 kHz.

When a subcarrier spacing for the SS block is 240 kHz, if the second indication information is one of 0 and 1, the second indication information indicates that the subcarrier spacing for the CORESET is 60 kHz which corresponds to 240 kHz; if the second indication information is the other of 0 and 1, the second indication information indicates that the subcarrier spacing for the CORESET is 120 kHz which corresponds to 240 kHz.

Additionally, when a subcarrier spacing for the SS block is 15 kHz, if the first indication information is one of 0 and 1, the first indication information indicates that the subcarrier spacing for CORESET is the same as the subcarrier spacing for the SS block. When a subcarrier spacing for the SS block is 30 kHz, if the first indication information is one of 0 and 1, the first indication information indicates that the subcarrier spacing for CORESET is the same as the subcarrier spacing for the SS block; If the first indication information is another 0 and 1, it cannot indicate the subcarrier spacing for CORESET, so the terminal has to perform blind detection. When a subcarrier spacing for the SS block is 120 kHz, if the first indication information is one of 0 and 1, the first indication information indicates that the subcarrier spacing for CORESET is the same as the subcarrier spacing for the s>S block;<if the first indication information is other than>0< and>1<, the first>indication information indicates that the subcarrier spacing for CORESET is different from the subcarrier spacing for the SS block. When a subcarrier spacing for the SS block is 240 kHz, if the first indication information is one of 0 and 1, the first indication information indicates that the subcarrier spacing for CORESET is the same as the subcarrier spacing for the SS block; If the first indication information is another 0 and 1, it cannot indicate the subcarrier spacing for CORESET, so the terminal has to perform blind detection.

Additionally, the CORESET configuration includes at least one of the following information: a position in the CORESET time domain, a duration in the CORESET time domain, a position in the CORESET frequency domain, a width in the CORESET of CORESET frequency, a CORESET AL, a CORESET distribution mode or a multiplexing pattern with SS block.

Specifically, the CORESET configuration includes: a first configuration where the numerological information of the CORESET is the same as the numerological information of an SS Block, or a second configuration where the numerological information of the CORESET is different from the numerological information of the SS Block.

The second indication field indicates, when the second indication field denotes a first value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies two first symbols in the time domain of a resource transmission of the SS block.

The second indication field indicates, when the second indication field denotes a second value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies the first three time domain symbols of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a third value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a first time domain symbol of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a fourth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET is overlaid with a frequency domain resource of the block SS and occupies another two first. symbols in the time domain of a slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a fifth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET partially overlaps with a frequency domain resource of the SS block and occupies first two. other symbols in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a sixth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a portion overlapped with a resource in the frequency domain of the block>S<s>.<and occupies another first symbol>in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a seventh value of the first configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy another two first time domain symbols of the slot where the SS block is located.

The first time domain symbol is a candidate time domain symbol used to receive the SS block, and the first other time domain symbol is a time domain symbol, other than a candidate transmission position of the SS block, an uplink (UL) control and a guard period, of the slot where the SS block is located.

Specifically, the CORESET RMSI scheme and configuration design according to the embodiment of the present disclosure are designed based on the following constraints: AL is at least 8, a minimum receiving bandwidth of the user is 10 M for bands below 6 GHz, and a minimum user receive bandwidth is 100 M for bands above 6 GHz. Additionally, the similar design concept and scheme can be used directly and expanded in circumstances with other AL, bandwidth constraints. minimum user receiving capacity or system bandwidth, and can support all types of SS block and numerology combinations allowed by system bandwidth, as shown. in the following table 2:

Table 2

For example, assuming that the numerology of the SS block is the same as the numerology of CORESET (denoted as type 1), there are 7 different CORESET schemes; Assuming that the numerology of the SS block is different from the numerology of CORESET (denoted as type 2), there are 6 different CORESET schemes, so there are 13 schemes in total. Here, if the configurations of the 13 CORESET schemes are indicated directly in the MIB, 4 bits are required. Therefore, it is considered to use numerological information from DL to jointly configure the CORESET schemes. By selecting configurations for type 1 or type 2 using DL numerology information, the overhead for configuring CORESET schemes is reduced to 3 MIB bits. The terminal performs blind detection of the SS block on carriers to determine the numerology of the SS block, for example, 15 kHz. The terminal decodes the MIB information carried in the SS block to obtain the first indication field (DL numerology information) and the second indication field (RMSI CORESET scheme configuration information). For example, the RMSI CORESET scheme configuration information is 000, and the DL numerology information indicates that the numerologies for the SS and CORESET block are the same. As a result, UE determines that the CORESET scheme employed by the base station is the first scheme among the 7 possible CORESET schemes for type 1. Since at this time the DL numerology information can indicate the subcarrier spacing for CORESET, according to The correspondence between the subcarrier spacing for the SS block and the subcarrier spacing for CORESET in the application scenario column of the above table, it can be directly determined that the CORESET scheme is a specific configuration of a certain scheme for type 1. In this way, a specific configuration of a specific scheme for type 1 can be determined according to the DL numerology information and the RMSI CORESET configuration information, and the terminal searches for CORESET according to the time-frequency positions of the specific configuration.

Alternatively, DL numerology information is used to jointly configure CORESET schemes, bit 111 is reserved to indicate that multiple SS blocks share a CORESET and by default these SS blocks are transmitted repeatedly. The shared CORESET can occupy one or more symbols in the time domain and can have multiple possible positions in the time domain. The terminal performs blind detection of the SS block on the operators to determine the numerology of the SS block. The terminal decodes MIB information carried in the SS block to obtain the DL numerology information and the RMSI CORESET scheme configuration information, for example, 111. The DL numerology information indicates that the numerologies for the SS block and CORESET are the same or different. As a result, the UE determines that the CORESET scheme is the eighth scheme reserved for type 1 or type 2 and recognizes that SS blocks configured using this CORESET scheme are transmitted repeatedly. For example, for a high frequency band above 6 GHz, a series of 8 SS blocks is repeatedly transmitted; for a low frequency band below 6 GHz, a series of 2 SS blocks is repeatedly transmitted.

Furthermore, the second indication field indicates, when the second indication field denotes a first value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a second symbol in the time domain within of an interval of first symbols in the time domain. where the SS block is located.

The second indication field indicates, when the second indication field denotes a second value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a high frequency resource or a low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a third value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies one high frequency resource and one low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a fourth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET overlaps with at least a part of a resource in the frequency domain of the SS block and occupies a second another symbol in the time domain of a slot where the CORESET is located.

The second indication field indicates, when the second indication field denotes a fifth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a first part overlapped with at least one part of a frequency. domain resource of the SS block and has at least a second part that does not overlap with at least a part of the frequency domain resource of the SS block, and occupies a second other time domain symbol of the slot where the CORESET is located .

The second indication field indicates, when the second indication field denotes a sixth value of the second configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy at least one second another time domain symbol of the slot where the CORESETs are located.

The first time domain symbol is a candidate time domain symbol used to receive the SS block, the second time domain symbol is a candidate time domain symbol used to receive the CORESET, and the other The second symbol in the time domain is a symbol in the time domain, other than a candidate transmission position of the SS block, an Uplink (UL) control and a guard period, of the slot where the CORESET is located.

Specifically, the CORESET RMSI scheme and configuration design according to the embodiment of the present disclosure are designed based on the following constraints: AL is at least 8, a minimum receiving bandwidth of the user is 10 M for bands below 6 GHz, and a minimum user receive bandwidth is 100 M for bands above 6 GHz. Furthermore, the similar design concept and scheme can be used directly and expanded in circumstances with other AL restrictions, bandwidth minimum user reception or system bandwidth, and can support all types of SS block and numerology combinations allowed by system bandwidth, as shown. in the following table 3:

Table 3

For example, assuming that the numerology of the SS block is the same as the numerology of CORESET (denoted as type 1), there are 7 different CORESET schemes; Assuming that the numerology of the SS block is different from the numerology of CORESET (denoted as type2), there are 6 different CORESET schemes, so there are 13 schemes in total. Here, if the configurations of the 13 CORESET schemes are indicated directly in the MIB, 4 bits are required. Therefore, it is considered to use numerological information from DL to jointly configure the CORESET schemes. By selecting configurations for type 1 or type 2 using DL numerology information, the overhead for configuring CORESET schemes is reduced to 3 MIB bits. The terminal performs blind detection of the SS block on carriers to determine the numerology of the SS block, for example, 120 kHz. The UE decodes MIB information carried in the SS block to obtain the DL numerology information and the CORESET RMSI scheme configuration information, for example, 000. The DL numerology information indicates that the numerologies for the SS block and CORESET are different, i.e. the numerology for CORESET is 60 kHz.

The terminal determines that the CORESET scheme used by the base station is one of the 6 possible CORESET schemes for type 2. Since at this time the DL numerology information can indicate the subcarrier spacing for CORESET, depending on the correspondence between the subcarrier spacing for SS block and subcarrier spacing for CORESET in the application scenario column of the above table, it can be directly determined that the CORESET scheme is a specific configuration of a certain scheme for type 2. In this way, A specific configuration of a specific scheme for type 2 can be determined according to the DL numerology information and the RMSI CORESET configuration information, and the terminal searches for CORESET according to the time-frequency positions of the specific configuration.

Alternatively, assuming that the numerology of the SS block is the same as the numerology of CORESET (denoted as type1), there are 7 different CORESET schemes; Assuming that the numerology of the SS block is different from the numerology of CORESET (denoted as type2), there are 6 different CORESET schemes, so there are 13 schemes in total. Here, if the configurations of the 13 CORESET schemes are indicated directly in the MIB, 4 bits are required. Therefore, it is considered to use DL numerology information to jointly configure the CORESET schemes, and the RMSI CORESET numerology can be determined from the <DL numerology information. Assuming that the numerology of the block s>S< is 240 kHz, a DL numerology information that is 1 represents that RMSI CORESET has a numerology of 120 kHz and a DL numerology information that is 0 represents that RMSI CORESET has a 60 kHz numerology. The UE selects configurations for type 1 or type 2 with the help of DL numerology information, so the overhead for configuring CORESET schemes is reduced to 3 MIB bits. The terminal performs blind detection of the SS block on carriers to determine the numerology of the SS block, for example, 240 kHz. The terminal decodes MIB information carried in the SS block to obtain the DL numerology information and the RMSI CORESET scheme configuration information, for example, 000; and the numerology information of DL is 1, that is, the numerology of CORESET is 120 kHz. The terminal determines that the CORESET scheme is the first of the 6 possible CORESET schemes for type 2. Alternatively, when using DL numerology information to configure the CORESET schemes together, one bit of the D numerology information is used <l to indicate>numerology information for RMSI CORESET and DL numerology information includes a second indication information. For example, when the subcarrier spacing (SCS) for the SS block is 240 kHz, a DL numerology information that is 0 indicates that RMSI CORESET SCS is 60 kHz, while a DL numerology information that is 1 indicates that RMSI CORESET SCS is 120 kHz. The terminal decodes the <SS block to determine that the s>C<s for the SS block is 240 kHz and obtain the numerology information of the DL.>When the numerology information of the DL is 0, it indicates that the SCS for the CORESET RMSI is 60 kHz.

Furthermore, as shown in Figures 17a to 19d, in addition to the indication information for indicating the CORESET configuration, the second indication field includes at least one of: third indication information, for indicating a transmission mode of the SS block; fourth indication information, to indicate that CORESET occupies four OFDM symbols of a time domain resource; or fifth indication information, to indicate that at least a part of the CORESET occupies an inactive resource block of the SS block.

As shown in Figures 17a to 17d, the DL numerology information is used to jointly configure CORESET schemes, and bits are reserved in the configuration information of the CORESET scheme as the fourth indication information, for example, 111, to indicate that RMSI CORESET hard. four OFDM symbols in the time domain and is frequency division multiplexed with the SS block.

As shown in Figure 18a to Figure 18b, the DL numerology information is used to jointly configure CORESET schemes, and bits are reserved in the CORESET scheme configuration information as the fifth indication information, for example, 111, to indicate that CORESET can use an idle resource block from the SS block.

As shown in Figures 19a to 19d, the DL numerology information is used to jointly configure CORESET schemes, and bits are reserved in the CORESET scheme configuration information as third indication information, for example, 111, to indicate that multiple SS blocks share. a CORESET and by default these SS blocks are transmitted repeatedly. The shared CORESET can occupy one or more symbols in the time domain and can have multiple possible positions in the time domain. The terminal <performs a blind detection of the SS block on the operators to determine the numerology of the block>S<s>. <The terminal> decodes MIB information carried in the SS block to obtain the DL numerology information and the configuration information of the RMSI CORESET scheme, for example, 111. The DL numerology information indicates that the numerologies for the SS and CORESET block are the same or different. As a result, the UE determines that the CORESET scheme is the eighth scheme reserved for type 1 or type 2 and recognizes that SS blocks configured using this CORESET scheme are transmitted repeatedly. For example, for a high frequency band above 6 GHz, a series of 8 SS blocks is repeatedly transmitted; for a low frequency band below 6 GHz, a series of 2 SS blocks is repeatedly transmitted.

According to the procedure for configuring a CORESET provided by the embodiment of the present disclosure, the network equipment transmits to the terminal a first indication field to indicate downlink numerological information and a second indication field to indicate a CORESET configuration. By indicating the time-frequency positions of the data information CORESET together with the first indication field and the second indication field, the bit overhead of the system MIB can be reduced, thereby improving resource utilization.

The above examples describe in detail the CORESET configuration procedure in different scenarios respectively. The following example describes the corresponding network equipment in more detail with reference to the drawing attached below.

As shown in Figure 20, the network equipment 2000 provided by an embodiment of the present disclosure can implement the detail of the procedure of configuring, for a terminal, indication information to indicate position information in the time-frequency domain of the CORESET of data information and transmit the indication information to the terminal in the above embodiment, and achieve the same or similar effect. The indication information includes: a first indication field to indicate downlink numerology information and a second indication field to indicate a CORESET configuration. The network equipment 2000 specifically includes the following functional modules: a configuration module 2010, configured to configure, for a terminal, indication information to indicate position information in the time-frequency domain of a set of control resources (CORESET ) for data information; wherein the indication information includes: a first indication field to indicate downlink numerological information and a second indication field to indicate a CORESET configuration; and a transmission module 2020, configured to transmit the indication information to the terminal.

The first indication field includes at least one of: first indication information to indicate whether the numerological information for the CORESET is the same as the numerological information for the SS block; or second indication information to indicate the numerological information for the CORESET.

When the numerology information for the SS block is the first numerology information, if the second indication information is a first value, the second indication information indicates that the numerology information for CORESET is the second numerology information corresponding to the first numerology information.

The CORESET configuration includes at least one of the following information: a position in the CORESET time domain, a duration in the CORESET time domain, a position in the CORESET frequency domain, a width in the frequency domain of the CORESET, a CORESET aggregation level (AL), a CORESET distribution mode or a CORESET multiplexing pattern and the SS block.

The CORESET configuration includes: a first configuration where the numerology information for CORESET is the same as the numerology information for a synchronized signal block (SS block), or a second configuration where the numerology information for CORESET is different from the numerology information for the SS block.

The second indication field indicates, when the second indication field denotes a first value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies two first symbols in the time domain of a resource transmission of the SS block.

The second indication field indicates, when the second indication field denotes a second value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies the first three time domain symbols of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a third value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a first time domain symbol of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a fourth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET is overlaid with a frequency domain resource of the block SS and occupies another two first. symbols in the time domain of a slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a fifth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET partially overlaps with a frequency domain resource of the SS block and occupies first two. other symbols in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a sixth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a portion overlapped with a resource in the frequency domain of the block>S<s>.<and occupies another first symbol>in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a seventh value of the first configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy another two first time domain symbols of the slot where the SS block is located.

The first time domain symbol is a candidate time domain symbol used to transmit the SS block, and the other first time domain symbol is a time domain symbol, other than a candidate transmission position. of the SS block, an uplink control (UL) and a guard period, of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a first value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a second symbol in the time domain within a interval of first symbols in the time domain where the SS block is located.

The second indication field indicates, when the second indication field denotes a second value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a high frequency resource or a low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a third value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies one high frequency resource and one low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a fourth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET overlaps with at least a part of a resource in the frequency domain of the Ss block. and occupies a second another time domain symbol of a slot where the CORESET is located.

The second indication field indicates, when the second indication field denotes a fifth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a first part overlapped with at least one part of a frequency. domain resource of the SS block and has at least a second part that does not overlap with at least a part of the frequency domain resource of the SS block, and occupies a second other time domain symbol of the slot where the CORESET is located .

The second indication field indicates, when the second indication field denotes a sixth value of the second configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy at least one second another time domain symbol of the slot where the CORESETs are located.

The first time domain symbol is a candidate time domain symbol used to transmit the SS block, the second time domain symbol is a candidate time domain symbol used to transmit the CORESET, and the other The second symbol in the time domain is a symbol in the time domain, other than a candidate transmission position of the SS block, an Uplink (UL) control and a guard period, of the slot where the CORESET is located.

In addition to the indication information for indicating the CORESET configuration, the second indication field includes at least one of: third indication information, for indicating a transmission mode of the SS block; fourth indication information, to indicate that CORESET occupies four OFDM symbols of a time domain resource; or fifth indication information, to indicate that at least a part of the CORESET occupies an inactive resource block of the SS block.

The indication information is carried in a master system information block (MIB), and the transmission module includes: a transmission unit, configured to transmit a synchronized signal block (SS block) that carries the system MIB to the terminal .

It should be noted that the network equipment according to the embodiment of the present disclosure transmits to the terminal a first indication field to indicate downlink numerological information and a second indication field to indicate a CORESET configuration. By indicating the time-frequency positions of the data information CORESET together with the first indication field and the second indication field, the bit overhead of the system MIB can be reduced, thereby improving resource utilization.

To better achieve the aforementioned objective, an embodiment of the present disclosure further provides a network equipment. The network equipment includes: a processor, a memory and a computer program stored in the memory and configured to be executed by the processor, where the processor is configured to execute the computer program, to implement the steps of the above procedure. An embodiment of the present disclosure further provides a computer-readable storage medium that stores thereon a computer program, wherein the computer program is configured to be executed by a processor, to implement the steps of the above methods.

Specifically, one embodiment of the present disclosure further provides network equipment. As shown in Figure 21, the network equipment 2100 includes: an antenna 211, a radio frequency (RF) device 212, and a baseband device 213. The antenna 211 is connected to the RF device 212. In a direction of uplink, RF device 212 receives information through antenna 211 and transmits the received information to baseband device 213 for processing. In a downlink direction, the baseband device 213 processes the information to be transmitted and transmits the information to the RF device 212. The RF device 212 processes the received information and transmits the processed information through the antenna 211.

The above frequency band processing device may be located on the baseband device 213. The procedure performed by the network equipment in the above embodiments may be implemented on the baseband device 213. The baseband device 213 includes a processor 214 and memory 215.

The baseband device 213 may include, for example, at least one baseband processing board. A plurality of chips are arranged on the baseband processing board. As shown in Figure 21, one of the chips is, for example, the processor 214, and the processor 214 is connected to the memory 215, to call a program in the memory 215, to perform the operations of the network equipment. as described. in the implementations of the previous procedure.

The baseband device 213 may further include a network interface 216, configured to exchange information with the RF device 212. The interface is, for example, a common public radio interface (CPRI).

Processor herein may be one processor or refer to multiple processing elements collectively. For example, the processor may be a central processing unit (CPU), or it may be an application specific integrated circuit (ASIC), or one or more integrated circuits (ICs) configured to implement the procedure performed by the network equipment, such as one or more digital signal processors (DSP), or one or more field programmable gate arrays (FPGA). The storage element may be a memory or may refer to multiple storage elements collectively.

Memory 215 may be volatile memory or non-volatile memory or may include both volatile memory and non-volatile memory. Non-volatile memory can be read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrical EPROM (EEPROM), or flash memory. Volatile memory can be random access memory (RAM) and is used as an external cache. By way of example and without limitation, various forms of RAM can be used, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM) , an Enhanced SDRAM RAM (ESDRAM), a Synchronization Link RAM (SLDRAM), and a Direct Rambus RAM (DRRAM). The memory 215 described in this application is intended to include, without limitation, these and any other suitable types of memories.

Specifically, the network equipment according to the embodiment of the present disclosure further includes: a computer program stored in the memory 215 and configured to be executed by the processor 214. The processor 214 is configured to call the computer program in the memory 215 to implement the procedure performed by several modules as shown in Figure 20.

Specifically, the processor 214 is configured to call the computer program to implement the following steps: configuring, for a terminal, indication information to indicate position information in the time-frequency domain of the data information CORESET; wherein the indication information includes: a first indication field to indicate downlink numerological information and a second indication field to indicate a CORESET configuration; and transmitting the indication information to the terminal.

The first indication field includes at least one of: first indication information to indicate whether the numerological information for the CORESET is the same as the numerological information for the SS block; or second indication information to indicate the numerological information for the CORESET.

When the numerology information for the SS block is the first numerology information, if the second indication information is a first value, the second indication information indicates that the numerology information for CORESET is the second numerology information corresponding to the first numerology information.

The CORESET configuration includes at least one of the following information: a position in the CORESET time domain, a duration in the CORESET time domain, a position in the CORESET frequency domain, a width in the frequency domain CORESET, a CORESET aggregation level (AL), a CORESET distribution mode or a CORESET multiplexing pattern and the SS block.

The CORESET configuration includes: a first configuration where the numerology information for CORESET is the same as the numerology information for a synchronized signal block (SS block), or a second configuration where the numerology information for CORESET is different from the numerology information for the SS block.

The second indication field indicates, when the second indication field denotes a first value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies two first symbols in the time domain of a resource transmission of the SS block.

The second indication field indicates, when the second indication field denotes a second value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies the first three time domain symbols of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a third value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a first time domain symbol of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a fourth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET is overlaid with a frequency domain resource of the block SS and occupies another two first. symbols in the time domain of a slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a fifth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET partially overlaps with a frequency domain resource of the SS block and occupies first two. other symbols in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a sixth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a portion overlapped with a resource in the frequency domain of the SS block and occupies another first symbol in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a seventh value of the first configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy another two first time domain symbols of the slot where the SS block is located.

The first time domain symbol is a candidate time domain symbol used to transmit the SS block, and the other first time domain symbol is a time domain symbol, other than a candidate transmission position. of the SS block, an uplink control (UL) and a guard period, of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a first value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a second symbol in the time domain within a interval of first symbols in the time domain where the SS block is located.

The second indication field indicates, when the second indication field denotes a second value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a high frequency resource or a low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a third value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies one high frequency resource and one low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a fourth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET overlaps with at least a part of a resource in the frequency domain of the block>S<s>.<and occupies a second other>symbol in the time domain of a slot where the CORESET is located.

The second indication field indicates, when the second indication field denotes a fifth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a first part overlapped with at least one part of a frequency. domain resource of the SS block and has at least a second part that does not overlap with at least a part of the frequency domain resource of the SS block, and occupies a second other time domain symbol of the slot where the CORESET is located .

The second indication field indicates, when the second indication field denotes a sixth value of the second configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy at least one second another time domain symbol of the slot where the CORESETs are located.

The first time domain symbol is a candidate time domain symbol used to transmit the SS block, the second time domain symbol is a candidate time domain symbol used to transmit the CORESET, and the other The second symbol in the time domain is a symbol in the time domain, other than a candidate transmission position of the SS block, an Uplink (UL) control and a guard period, of the slot where the CORESET is located.

In addition to the indication information for indicating the CORESET configuration, the second indication field includes at least one of: third indication information, for indicating a transmission mode of the SS block; fourth indication information, to indicate that CORESET occupies four time domain symbols of a time domain resource; or fifth indication information, to indicate that at least a part of the CORESET occupies an inactive resource block of the SS block.

The indication information is carried in a master system information block (MIB), and the processor 44 is configured to call the computer program to implement the next step: transmitting a synchronized signal block (SS block) carrying the MIB of the system. system to the terminal.

The network equipment may be a base transceiver station (BTS) in global system mobile communication (GSM) or code division multiple access (CDM), a NodeB (NB) in code division multiple access broadband code (<w>C<d>M<a>), a Node B (eNB or eNodeB) in LTE, a repeater station or access point, or a gNodeB (gNB) in a future 5G network, or similar, which are not limited herein.

The network equipment according to the embodiment of the present disclosure transmits to the terminal a first indication field to indicate downlink numerological information and a second indication field to indicate a CORESET configuration. By indicating the time-frequency positions of the data information CORESET together with the first indication field and the second indication field, the bit overhead of the system MIB can be reduced, thereby improving resource utilization.

The above examples describe, from the perspective of the network equipment, the CORESET configuration procedure provided by the present disclosure, respectively. The following example further describes, with reference to the attached drawing, a CORESET configuration procedure applied to one side of the terminal.

As shown in Figure 22, the CORESET configuration procedure applied to a terminal side provided by an embodiment of the present disclosure specifically includes: step 221: receiving indication information transmitted by the network equipment; wherein the indication information includes: a first indication field to indicate downlink numerological information and a second indication field to indicate a CORESET configuration; and step 222: determining the position information in the time-frequency domain of the data information CORESET according to the first indication field and the second indication field.

The first indication field includes at least one of: first indication information to indicate whether the numerology information for the CORESET is the same as the numerology information for the SS block; or second indication information to indicate the numerological information for the CORESET.

When the numerology information for the SS block is the first numerology information, if the second indication information is a first value, the second indication information indicates that the numerology information for CORESET is the second numerology information corresponding to the first numerology information.

The CORESET configuration includes at least one of the following information: a position in the CORESET time domain, a duration in the CORESET time domain, a position in the CORESET frequency domain, a width in the frequency domain CORESET, a CORESET aggregation level (AL), a CORESET distribution mode or a CORESET multiplexing pattern and the SS block.

The CORESET configuration includes: a first configuration where the numerology information for CORESET is the same as the numerology information for a synchronized signal block (SS block), or a second configuration where the numerology information for CORESET is different from the numerology information for the SS block.

The second indication field indicates, when the second indication field denotes a first value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies two first symbols in the time domain of a resource transmission of the SS block.

The second indication field indicates, when the second indication field denotes a second value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies the first three time domain symbols of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a third value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a first time domain symbol of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a fourth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET occupies another two first symbols in the time domain, overlapping with a resource in the frequency domain of the SS block, of a slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a fifth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET partially overlaps with a frequency domain resource of the SS block and occupies first two. other symbols in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a sixth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a portion overlapped with a resource in the frequency domain of the block>S<s>.<and occupies another first symbol>in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a seventh value of the first configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy another two first time domain symbols of the slot where the SS block is located.

The first time domain symbol is a candidate time domain symbol used to receive the SS block, and the first other time domain symbol is a time domain symbol, other than a candidate transmission position of the SS block, an uplink (UL) control and a guard period, of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a first value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a second symbol in the time domain within a interval of first symbols in the time domain where the SS block is located.

The second indication field indicates, when the second indication field denotes a second value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a high frequency resource or a low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a third value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies one high frequency resource and one low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a fourth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET overlaps with at least a part of a resource in the frequency domain of the SS block. and occupies a second another time domain symbol of a slot where the CORESET is located.

The second indication field indicates, when the second indication field denotes a fifth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a first part overlapped with at least one part of a frequency. domain resource of the SS block and has at least a second part that does not overlap with at least a part of the frequency domain resource of the SS block, and occupies a second other time domain symbol of the slot where the CORESET is located .

The second indication field indicates, when the second indication field denotes a sixth value of the second configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy at least one second another time domain symbol of the slot where the CORESETs are located.

The first time domain symbol is a candidate time domain symbol used to receive the SS block, the second time domain symbol is a candidate time domain symbol used to receive the CORESET, and the other The second symbol in the time domain is a symbol in the time domain, other than a candidate transmission position of the SS block, an Uplink (UL) control and a guard period, of the slot where the CORESET is located.

In addition to the indication information for indicating the CORESET configuration, the second indication field includes at least one of: third indication information, for indicating a transmission mode of the SS block; fourth indication information, to indicate that CORESET occupies four time domain symbols of a time domain resource; or fifth indication information, to indicate that at least a part of the CORESET occupies an inactive resource block of the SS block.

The step of receiving indication information transmitted by the network equipment includes: receiving a synchronized signal block (SS block) transmitted by the network equipment; determining a system master information block (MIB) according to the SS block; and determine the indication information according to the system MIB.

After receiving the indication information transmitted by the network equipment, the procedure further includes: performing blind detection of the CORESET according to the indication information when the position information in the CORESET time-frequency domain of the data information does not is determined according to the indication information. The position information in the time-frequency domain of the CORESET is determined according to the numerological information of the CORESET.

Assuming that the numerology of the SS block is the same as the numerology of CORESET (denoted as type 1), there are 7 different CORESET schemes; Assuming that the numerology of the SS block is different from the numerology of CORESET (denoted as type 2), there are 6 different CORESET schemes, so there are 13 schemes in total. Here, if the configurations of the 13 CORESET schemes are indicated directly in the MIB, 4 bits are required. Therefore, it is considered to use numerological information from DL to jointly configure the CORESET schemes. In case the RMSI CORESET numerology cannot be determined from the DL numerology information and assuming that the numerology of the SS block is 240 kHz, a DL numerology information that is 0 represents the SS block and that CORESET has different numerologies, and a DL numerology information being 1 represents the SS block and the CORESET have the same numerology. The UE selects configurations for type 1 or type 2 with the help of DL numerology information, so the overhead for configuring CORESET schemes is reduced to 3 MIB bits. The terminal performs blind detection of the SS block on carriers to determine the numerology of the SS block, for example, 240 kHz. The terminal decodes MIB information carried in the SS block to obtain the DL numerology information and the RMSI CORESET scheme configuration information, for example, 000; and the DL numerology information indicates that the SS block and the CORESET have different numerologies, i.e. the numerology for the CORESET is 120 kHz or 60 kHz. The UE determines that the CORESET scheme is the first scheme of the 5 possible CORESET schemes for type 2, then the UE needs to perform additional blind detection. The terminal performs a blind detection of the CORESET according to possible time-frequency positions provided by the first scheme, to determine the actual numerology of the CORESET, thus determining a CORESET scheme used by the base station.

Additionally, the DL numerology information is used to jointly configure CORESET schemes, and one bit of the DL numerology information is used to indicate numerology information for RMSI CORESE<t>. For example, when the DL numerology information is 0, it indicates that the numerologies for RMSI CORESET and the SS block are not consistent; when the numerology information of DL is 1, it indicates that the numerologies for RMSI CORESET and the SS block are consistent. Assuming SCS for an SS block is 30 kHz and SCS for a CORESET RMSI is 15 kHz. The terminal acquires, from the SS block, DL numerology information of 0, indicating that the numerologies for RMSI CORESET and the SS block are not consistent. Since SCS for RMSI CORESET can be 15 kHz or 60 kHz when SCS for SS block is 30 kHz and if the numerologies for RMSI CORESET and SS block are not consistent, UE needs to perform additional blind detection of RMSI CORESET to determine whether SCS for RMSI CORESET is 15 kHz or 60 kHz.

According to the procedure for configuring a CORESET provided by the embodiment of the present disclosure, the terminal receives a first indication field for indicating downlink numerological information and a second indication field for indicating a CORESET configuration transmitted by the network equipment. . By indicating the time-frequency positions of the data information CORESET together with the first indication field and the second indication field, the bit overhead of the system MIB can be reduced, thereby improving resource utilization.

The above examples describe the CORESET configuration procedure in different scenarios. A corresponding terminal is described in more detail with reference to the drawings attached below.

As shown in Figure 23, a terminal 2300 provided by an embodiment of the present disclosure can implement the detail of the procedure of receiving indication information transmitted by the network equipment, and determining the position information in the time-frequency domain of the data information CORESET according to the first indication field and the second indication field in the above embodiment, and achieve the same or similar effect. The indication information includes: a first indication field to indicate downlink numerology information and a second indication field to indicate a CORESET configuration. The terminal 2300 specifically includes the following functional modules: a receiving module 2310, configured to receive indication information transmitted by network equipment; wherein the indication information includes: a first indication field for indicating downlink numerology information and a second indication field for indicating a control resource set (CORESET) configuration; and a processing module 2320, configured to determine the position information in the time-frequency domain of the data information CORESET according to the first indication field and the second indication field.

The first indication field includes at least one of: first indication information to indicate whether the numerological information for the CORESET is the same as the numerological information for the SS block; or second indication information to indicate the numerological information for the CORESET.

When the numerology information for the SS block is the first numerology information, if the second indication information is a first value, the second indication information indicates that the numerology information for CORESET is the second numerology information corresponding to the first numerology information.

The CORESET configuration includes at least one of the following information: a position in the CORESET time domain, a duration in the CORESET time domain, a position in the CORESET frequency domain, a width in the frequency domain CORESET, a CORESET aggregation level (AL), a CORESET distribution mode or a CORESET multiplexing pattern and the SS block.

The CORESET configuration includes: a first configuration where the numerology information for CORESET is the same as the numerology information for a synchronized signal block (SS block), or a second configuration where the numerology information for CORESET is different from the numerology information for the SS block.

The second indication field indicates, when the second indication field denotes a first value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies two first symbols in the time domain of a resource transmission of the SS block.

The second indication field indicates, when the second indication field denotes a second value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies the first three time domain symbols of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a third value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a first time domain symbol of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a fourth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET occupies another two first symbols in the time domain, overlapping with a resource in the frequency domain of the SS block, of a slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a fifth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET partially overlaps with a frequency domain resource of the SS block and occupies first two. other symbols in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a sixth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a portion overlapped with a resource in the frequency domain of the SS block. and occupies another first symbol in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a seventh value of the first configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy another two first time domain symbols of the slot where the SS block is located.

The first time domain symbol is a candidate time domain symbol used to receive the SS block, and the first other time domain symbol is a time domain symbol, other than a candidate transmission position of the SS block, an uplink (UL) control and a guard period, of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a first value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a second symbol in the time domain within a interval of first symbols in the time domain where the SS block is located.

The second indication field indicates, when the second indication field denotes a second value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a high frequency resource or a low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a third value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies one high frequency resource and one low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a fourth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET overlaps with at least a part of a resource in the frequency domain of the block>S<s>.<and occupies a second other>symbol in the time domain of a slot where the CORESET is located.

The second indication field indicates, when the second indication field denotes a fifth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a first part overlapped with at least one part of a frequency. domain resource of the SS block and has at least a second part that does not overlap with at least a part of the frequency domain resource of the SS block, and occupies a second other time domain symbol of the slot where the CORESET is located .

The second indication field indicates, when the second indication field denotes a sixth value of the second configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy at least one second another time domain symbol of the slot where the CORESETs are located.

The first time domain symbol is a candidate time domain symbol used to receive the SS block, the second time domain symbol is a candidate time domain symbol used to receive the CORESET, and the other The second symbol in the time domain is a symbol in the time domain, other than a candidate transmission position of the SS block, an Uplink (UL) control and a guard period, of the slot where the CORESET is located.

In addition to the indication information for indicating the CORESET configuration, the second indication field includes at least one of: third indication information, for indicating a transmission mode of the SS block; fourth indication information, to indicate that CORESET occupies four time domain symbols of a time domain resource; or fifth indication information, to indicate that at least a part of the CORESET occupies an inactive resource block of the SS block.

The receiving module 2310 includes: a receiving unit, configured to receive a synchronized signal block (SS block) transmitted by the network equipment; a first determination unit, configured to determine a system master information block (MIB) according to the SS block; and a second determination unit, configured to determine the indication information according to the system MIB.

The terminal 2300 further includes: a blind detection module, configured to perform blind detection of the CORESET according to the indication information when the position information in the CORESET time-frequency domain of the data information is not determined according to the information of indication. The position information in the time-frequency domain of the CORESET is determined according to the numerological information of the CORESET.

It should be noted that the terminal provided by the embodiment of the present disclosure receives a first indication field to indicate downlink numerological information and a second indication field to indicate a CORESET configuration transmitted by the network equipment. By indicating the time-frequency positions of the data information CORESET together with the first indication field and the second indication field, the bit overhead of the system MIB can be reduced, thereby improving resource utilization.

It is understood that the modular division of network equipment and terminal is merely a division of logical functions and, in actual implementation, the modules may be fully or partially integrated into a physical entity or physically separated. These modules can be implemented completely in the form of software that can be called and executed by a processing element, or implemented completely in the form of hardware, or partially implemented in the form of software that can be called and executed by a processing element and partially implemented. in the form of hardware. For example, a determination module may be a stand-alone processing element, or be integrated into a chip of the device, or may be stored in a storage of the device in the form of program code that is configured to be called by a processing element of the device. device. to implement the function of the determination module. Other modules can be implemented in a similar way. Furthermore, the modules can be fully or partially integrated with each other or implemented separately. The described processing element may be an integrated circuit with signal processing capability. During an implementation process, the steps of the procedures or modules can be carried out in hardware form through logic circuits integrated in the processing element, or in software form through instructions.

For example, these modules may be one or more integrated circuits (ICs) configured to implement the above procedures, for example, one or more application specific integrated circuits (ASICs), one or more digital signal processors (DSPs), or one or more fields. programmable gate arrays (FPGA), etc. For another example, when a module is implemented in the form of program code configured to be called by a processing element, the processing element may be a general purpose processor, for example, a central processing unit (CPU) or other processor configured to call program code. For another example, these modules can be integrated with each other in the form of a system on a chip (SOC).

To better achieve the above objective, an embodiment of the present disclosure further provides a terminal, including a processor, a memory, and a computer program stored in the memory and executable by the processor. The processor is configured to execute the computer program, to implement steps of the previous procedure for configuring a CORESET. An embodiment of the present disclosure further provides a computer-readable storage medium that stores thereon a computer program, wherein the computer program is configured to be executed by a processor, to implement steps of the above procedure of configuring a CORESET.

Specifically, Figure 24 is a block diagram of a terminal 2400 according to another embodiment of the present disclosure. The terminal shown in Figure 24 includes at least a processor 2401, a memory 2402, a user interface 2403 and a network interface 2404. The various components in the terminal 2400 are coupled together via a bus system 2405. It will be appreciated that the bus system 2405 is configured to allow connection communication between these components. The 2405 bus system includes a power bus, a control bus, and a status signal bus in addition to a data bus. However, for clarity of description, several buses are labeled bus system 2405 in Figure 24.

The user interface 2403 may include a display or a point-and-click device (e.g., a touchpad) or a touch screen, etc.

It should be understood that memory 2402 in the embodiment of the present disclosure may be volatile or non-volatile memory, or may include both. Non-volatile memory can be read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrical EPROM (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example and without limitation, many forms of RAM can be used, such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Sd Ra M enhanced (ESDRAM), Synchlink DRAM (SLDRAM) and direct Rambus RAM (DRRAM). The memory 2402 of the systems and procedures described herein is intended to include, but is not limited to, these and any other suitable types of memories.

In some implementations, memory 2402 stores the following elements: executable modules or data structures, or a subset or extended set thereof, such as an operating system 24021 and an application program 24022.

The operating system 24021 includes various system programs, such as a framework layer program, a core library layer program, and a driver layer program, to implement various basic services and process hardware-based tasks. Application program 24022 includes various application programs, such as a media player and a browser, to implement various application services. A program that implements the procedures of this disclosure may be included in application program 24022.

In the embodiment of the present disclosure, the terminal 2400 further includes: a computer program stored in the memory 2402 and executable by the processor 2401, and specifically, the computer program may be a computer program in the application program 24022. The computer program is configured to be executed by the processor 2401, to implement the following step: receiving indication information transmitted by the network equipment; wherein the indication information includes: a first indication field to indicate downlink numerological information and a second indication field to indicate a CORESET configuration; and determining the position information in the time-frequency domain of the data information CORESET according to the first indication field and the second indication field.

The method disclosed in the embodiments of the present disclosure may be applied to processor 2401 or implemented by processor 2401. Processor 2401 may be an integrated circuit chip having a signal processing capability. During an implementation process, procedural steps may be performed in hardware form using logic circuits integrated into the processor 2401, or in software form using instructions. The processor 2401 may be a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a logic device discrete transistor or gate, a discrete hardware component, which is capable of implementing or executing the various procedures, steps and logic block diagrams disclosed in the embodiments of the present disclosure. The general purpose processor may be a microprocessor, or any conventional processor, etc. The steps of the methods disclosed with reference to the embodiments of the present disclosure may be incorporated in hardware in the form of an encoding processor, or performed by hardware in the encoding processor and software modules in combination. The software modules may reside on a storage medium well established in the art, such as a RAM register, flash memory, ROM, PROM or EEPROM. The storage medium resides in memory 2402. Processor 2401 reads information from memory 2402 and performs procedural steps with its hardware.

It is understood that the embodiments described in the present disclosure may be implemented using hardware, software, firmware, middleware, microcode, or a combination of these. For hardware implementation, the processing units may be implemented in one or more application specific integrated circuits (ASIC), digital signal processor (DSP), DSP device (DSPD), programmable logic device (PLD), programmable gate array in field (FPGA), general. purpose processor, controller, microcontroller, microprocessor, other electronic unit configured to perform the function described in this application or a combination thereof.

For software implementation, the technical solution described herein may be implemented using a module (e.g., process, function, etc.) configured to perform the function described herein. Software code can be stored in memory and executed by the processor. Memory can be implemented internal or external to the processor.

The first indication field includes at least one of: first indication information to indicate whether the numerological information for the CORESET is the same as the numerological information for the SS block; or second indication information to indicate the numerological information for the CORESET.

When the numerology information for the SS block is the first numerology information, if the second indication information is a first value, the second indication information indicates that the numerology information for CORESET is the second numerology information corresponding to the first numerology information.

The CORESET configuration includes at least one of the following information: a position in the CORESET time domain, a duration in the CORESET time domain, a position in the CORESET frequency domain, a width in the frequency domain CORESET, a CORESET aggregation level (AL), a CORESET distribution mode or a CORESET multiplexing pattern and the SS block.

The CORESET configuration includes: a first configuration where the numerology information for CORESET is the same as the numerology information for a synchronized signal block (SS block), or a second configuration where the numerology information for CORESET is different from the numerology information for the SS block.

The second indication field indicates, when the second indication field denotes a first value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies two first symbols in the time domain of a resource transmission of the SS block.

The second indication field indicates, when the second indication field denotes a second value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies the first three time domain symbols of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a third value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a first time domain symbol of the transmission resource of the SS block.

The second indication field indicates, when the second indication field denotes a fourth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET occupies another two first symbols in the time domain, overlapping with a resource in the frequency domain of the SS block, of a slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a fifth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET partially overlaps with a frequency domain resource of the SS block and occupies first two. other symbols in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a sixth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a portion overlapped with a resource in the frequency domain of the block>S<s>.<and occupies another first symbol>in the time domain of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a seventh value of the first configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy another two first time domain symbols of the slot where the SS block is located.

The first time domain symbol is a candidate time domain symbol used to receive the SS block, and the first other time domain symbol is a time domain symbol, other than a candidate transmission position of the SS block, an uplink (UL) control and a guard period, of the slot where the SS block is located.

The second indication field indicates, when the second indication field denotes a first value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a second symbol in the time domain within a interval of first symbols in the time domain where the SS block is located.

The second indication field indicates, when the second indication field denotes a second value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a high frequency resource or a low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a third value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies one high frequency resource and one low frequency resource into two second time domain symbols within the interval of the first time domain symbols where the SS block is located.

The second indication field indicates, when the second indication field denotes a fourth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET overlaps with at least a part of a resource in the frequency domain of the SS block. and occupies a second another time domain symbol of a slot where the CORESET is located.

The second indication field indicates, when the second indication field denotes a fifth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a first part overlapped with at least one part of a frequency. domain resource of the SS block and has at least a second part that does not overlap with at least a part of the frequency domain resource of the SS block, and occupies a second other time domain symbol of the slot where the CORESET is located .

The second indication field indicates, when the second indication field denotes a sixth value of the second configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain. resource of the SS block and occupy at least one second another time domain symbol of the slot where the CORESETs are located.

The first time domain symbol is a candidate time domain symbol used to receive the SS block, the second time domain symbol is a candidate time domain symbol used to receive the CORESET, and the other The second symbol in the time domain is a symbol in the time domain, other than a candidate transmission position of the SS block, an Uplink (UL) control and a guard period, of the slot where the CORESET is located.

In addition to the indication information for indicating the CORESET configuration, the second indication field includes at least one of: third indication information, for indicating a transmission mode of the SS block; fourth indication information, to indicate that CORESET occupies four time domain symbols of a time domain resource; or fifth indication information, to indicate that at least a part of the CORESET occupies an inactive resource block of the SS block.

Specifically, the processor 2401 is configured to execute the computer program to implement the following steps: receiving a synchronized signal block (SS block) transmitted by the network equipment; determining a system master information block (MIB) according to the SS block; and determine the indication information according to the system MIB.

Specifically, the processor 2401 is configured to execute the computer program to implement the following step: performing blind detection of the CORESET according to the indication information when the position information in the CORESET time-frequency domain of the data information is not determined according to the indication information. The position information in the time-frequency domain of the CORESET is determined according to the numerological information of the CORESET.

The terminal may be a wireless terminal or a wired terminal. Wireless terminal may refer to a device that provides voice connectivity and/or other data services to the user, a portable device that has a wireless connection function, or another processing device connected to a wireless modem. The wireless terminal may communicate with one or more core networks through a radio access network (RAN), and the wireless terminal may be a mobile terminal, such as a mobile phone (or so-called "cellular" phone) and a computer. having a mobile terminal, for example, a portable, pocket-sized, handheld, computer-integrated or in-vehicle mobile device that exchanges voice and/or data with the radio access network. For example, it may be a personal communication service (PCS) telephone, a cordless telephone, a session initiation protocol (SIP) telephone, a wireless local loop station (WLL), a personal digital assistant (PDA), or Similar. The wireless terminal may also be called a system, subscriber unit, subscriber station, mobile station, mobile, remote station, remote terminal, access terminal, user terminal, user agent, user device. or user's equipment, and is not limited herein.

The terminal provided by the embodiment of the present disclosure receives a first indication field to indicate downlink numerological information and a second indication field to indicate a CORESET configuration transmitted by the network equipment. By indicating the time-frequency positions of the data information CORESET together with the first indication field and the second indication field, the bit overhead of the system MIB can be reduced, thereby improving resource utilization.

A person skilled in the art may be aware that the exemplary units and algorithm steps described in connection with the embodiments described herein may be implemented by electronic hardware or a combination of computer software and electronic hardware. Whether functions are realized by hardware or software depends on particular applications and design constraint conditions of technical solutions. One skilled in the art may use different procedures to implement the described functions for each particular application, but the implementation should not be considered to go beyond the scope of the disclosure.

One skilled in the art can clearly understand that, for ease of description and conciseness, for a detailed work process of the above system, apparatus and unit, reference may be made to a corresponding process in embodiments of the above method. and the details are not described here again.

In the embodiments provided in the present application, it should be understood that the disclosed device and method may be implemented in other ways. For example, the embodiment of the device described is merely exemplary. For example, unit division is merely a division of logical functions and may be another division in the actual implementation. For example, a plurality of units or components may be combined or integrated into another system, or some features may be ignored or not realized. Furthermore, the mutual couplings or direct couplings or communication connections shown or discussed may be implemented through some interfaces. Indirect couplings or communication connections between devices or units may be implemented in electrical, mechanical or other forms.

Units described as separate parts may or may not be physically separate, and parts shown as units may or may not be physical units, that is, they may be located in one location or may be distributed over a plurality of network drives. A part or all of the units can be selected according to the actual needs to achieve the objectives of the solutions of the embodiments.

Furthermore, the functional units in embodiments of the present disclosure may be integrated into a processing unit, or each of the units may physically exist alone, or two or more units may be integrated into one unit.

If a function is implemented in the form of a functional unit of software and sold or used as a stand-alone product, it may be stored on a computer-readable storage medium. Based on such understanding, the essential part or the prior art contributing part of the technical solutions of the present disclosure, or a part of the technical solutions, may be implemented in the form of a software product. The software product is stored on a storage medium and includes various instructions for instructing a computing device (which may be a personal computer, a server or network equipment) to perform all or part of the steps of the procedures described in the achievements. of disclosure. The above storage medium includes any medium that can store program code, such as a universal serial bus (USB) flash drive, a mobile hard disk, a ROM, a RAM, a magnetic disk or an optical disk.

Furthermore, it should be noted that it appears that the components or steps of the apparatus and method of the present disclosure can be subdivided and/or recombined. These subdivisions and/or recombinations should be considered equivalent solutions to the present disclosure. Furthermore, the stages of the above series of processes can naturally be performed in a chronological order where the stages are described; However, the stages are not necessarily carried out in chronological order. On the other hand, some stages can be carried out simultaneously or independently of each other. A person of ordinary skill in the art will appreciate that all or any steps or components of the method and apparatus of the present disclosure can be implemented in the form of hardware, firmware, software or a combination thereof in any computing device (including a processor, media storage or similar) or a network of computing devices, which can be carried out by a person with ordinary skill in the art, after having read the description of the present disclosure, using basic programming knowledge.

Therefore, the objective of the present disclosure can be further achieved by executing a program or a group of programs on any computing device. The computing device may be a well-known general purpose device. Therefore, the objective of the present disclosure can be further achieved by providing a program product that includes program codes configured to implement the method or apparatus. In other words, said program product constitutes the present disclosure, and a storage medium that stores said program product also constitutes the present disclosure. Obviously, the storage medium can be any known storage medium or any storage medium that is developed in the future. It is also noted that, apparently, the components or steps of the apparatus and method of the present disclosure can be subdivided and/or recombined. Furthermore, the stages of the above series of processes can naturally be performed in a chronological order where the stages are described; However, the stages are not necessarily carried out in chronological order. On the other hand, some stages can be carried out simultaneously or independently of each other.

The foregoing descriptions merely describe optional implementations of the present disclosure.

Claims (15)

1. A procedure to configure a set of control resources, CORESET, carried out on one side of the network equipment, the procedure being characterized because it comprises: configuring (31), for a terminal, indication information to indicate position information in the time-frequency domain of the data information CORESET; wherein the indication information comprises: a first indication field for indicating downlink numerology information and a second indication field for indicating a CORESET configuration, and the first indication field comprises at least one of: first indication information for indicate whether the numerology information for CORESET is the same as the numerology information for a synchronized signal block, SS; or second indication information to indicate the numerological information for the CORESET; where, the numerological information comprises: subcarrier spacing, the CORESET configuration comprises: a first configuration where the numerological information for the CORESET is the same as the numerological information for the synchronized signal, SS, block, or a second configuration where the numerological information for the CORESET it is different from the numerological information of the SS block; and transmit (32) the indication information to the terminal through a system master information block, MIB, carried by an SS block. 2. The method according to claim 1, wherein when the numerology information for the SS block is the first numerology information, if the second indication information is a first value, the second indication information indicates that the numerology information for the CORESET is the second numerology information corresponding to the first numerology information. 3. The method according to claim 1 or claim 2, wherein the CORESET configuration comprises at least one of the following information: a position in the CORESET time domain, a duration in the CORESET time domain, a position in the CORESET frequency domain, a width in the CORESET frequency domain, an aggregation level, AL, of the CORESET or a multiplexing pattern with SS block. 4. The method according to claim 1, where, the second indication field indicates, when the second indication field denotes a first value of the first<configuration, that the CORESET is frequency division multiplexed with the block>S<s>,<and the CORESET occupies>two first symbols in the time domain of an SS block transmission resource; the second indication field indicates, when the second indication field denotes a second value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies the first three time domain symbols of the transmission resource from the SS block; the second indication field indicates, when the second indication field denotes a third value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a first time domain symbol of the transmission resource from the SS block; the second indication field indicates, when the second indication field denotes a fourth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET is overlaid with a frequency domain resource of the block SS and occupies another two first. symbols in the time domain of a slot where the SS block is located; the second indication field indicates, when the second indication field denotes a fifth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET partially overlaps with a frequency domain resource of the SS block and occupies the first two other symbols in the time domain of the slot where the SS block is located; the second indication field indicates, when the second indication field denotes a sixth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a portion overlapped with a domain resource frequency of the SS block and occupies another first symbol in the time domain of the slot where the SS block is located; either the second indication field indicates, when the second indication field denotes a seventh value of the first configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain resource of the SS block and occupy another two first time domain symbols of the slot where the SS block is located; where, the first time domain symbol is a candidate time domain symbol used to transmit the SS block, and the first other time domain symbol is a time domain symbol, other than a position of candidate transmission of the SS block, an uplink control, UL, and a guard period, of the slot where the SS block is located. 5. The method according to claim 1, where, The second indication field indicates, when the second indication field denotes a first value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a second symbol in the time domain within a interval of first symbols in the time domain where the SS block is located; the second indication field indicates, when the second indication field denotes a second value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a high frequency resource or a low frequency resource in two second time domain symbols within the interval of the first time domain symbols where the SS block is located; the second indication field indicates, when the second indication field denotes a third value of the second configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a high frequency resource and a low frequency resource in two second time domain symbols within the interval of the first time domain symbols where the SS block is located; the second indication field indicates, when the second indication field denotes a fourth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET overlaps with at least a part of a resource in the frequency domain of the SS block. and occupies another second symbol in the time domain of a slot where the CORESET is located; The second indication field indicates, when the second indication field denotes a fifth value of the second configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least a first part overlapped with at least one part of a frequency domain resource of the SS block and has at least a second part that does not overlap with at least one part of the frequency domain resource of the SS block, and occupies a second other time domain symbol of the slot where CORESET is located; the second indication field indicates, when the second indication field denotes a sixth value of the second configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain resource of the SS block and occupy at least one second another time domain symbol of the slot where the CORESETs are located; either where, the first time domain symbol is a candidate time domain symbol used to transmit the SS block, the second time domain symbol is a candidate time domain symbol used to transmit the CORESET, and the other second time domain symbol is a time domain symbol, other than a candidate transmission position of the SS block, an uplink, UL, control and a guard period, of the slot where the CORESET is located . 6. The method according to any of claims 1 to 5, wherein, in addition to the indication information for indicating the CORESET configuration, the second indication field comprises at least one of: third indication information, to indicate a transmission mode of the SS block; fourth indication information, to indicate that CORESET occupies four time domain symbols of a time domain resource; either fifth indication information, to indicate that at least a part of the CORESET occupies an inactive resource block of the SS block. 7. A network equipment (2000), characterized in that it comprises: a configuration module (2010), configured to configure, for a terminal, indication information to indicate position information in the time-frequency domain of a control resource set, CORESET, for data information; wherein the indication information comprises: a first indication field for indicating downlink numerology information and a second indication field for indicating a CORESET configuration, and the first indication field comprises at least one of: first indication information for indicate whether the numerology information for CORESET is the same as the numerology information for the SS block; or second indication information to indicate the numerological information for the CORESET; where, the numerological information comprises: subcarrier spacing, the CORESET configuration comprises: a first configuration where the numerological information for the CORESET is the same as the numerological information for a synchronized signal, SS, block, or a second configuration where the numerological information for the CORESET it is different from the numerological information of the SS block; and a transmission module (2020), configured to transmit the indication information to the terminal through a system master information block, MIB, carried by an SS block. 8. A procedure to configure a set of control resources, CORESET, carried out on one side of the terminal, the procedure being characterized in that it comprises: receiving (221) indication information transmitted by network equipment; wherein the indication information comprises: a first indication field for indicating downlink numerology information and a second indication field for indicating a CORESET configuration, and the first indication field comprises at least one of: first indication information for indicate whether the numerology information for CORESET is the same as the numerology information for the SS block; or second indication information to indicate the numerological information for the CORESET; where, the numerological information comprises: subcarrier spacing, the CORESET configuration comprises: a first configuration where the numerological information for the CORESET is the same as the numerological information for a synchronized signal, SS, block, or a second configuration where the numerological information for the CORESET it is different from the numerological information of the SS block; and determining (222) position information in the time-frequency domain of the data information CORESET according to the first indication field and the second indication field. 9. The method according to claim 8, wherein receiving the indication information transmitted by the network equipment comprises: receiving a synchronized signal, SS, block, transmitted by the network equipment; determining a system master information block, MIB, according to the SS block; and determine the indication information according to the system MIB. 10. The method according to claim 8 or claim 9, wherein the CORESET configuration comprises at least one of the following information: a position in the CORESET time domain, a duration in the CORESET time domain, a position in the CORESET frequency domain, a width in the CORESET frequency domain, an aggregation level, AL, of the CORESET or a multiplexing pattern with SS block. 11. The method according to claim 8, where, the second indication field indicates, when the second indication field denotes a first value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies two first symbols in the time domain of a resource SS block transmission; the second indication field indicates, when the second indication field denotes a second value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies the first three time domain symbols of the transmission resource from the SS block; the second indication field indicates, when the second indication field denotes a third value of the first configuration, that the CORESET is frequency division multiplexed with the SS block and the CORESET occupies a first time domain symbol of the transmission resource from the SS block; the second indication field indicates, when the second indication field denotes a fourth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET occupies another first two symbols in the time domain, overlapping with a frequency domain resource of the SS block, of a slot where the SS block is located; the second indication field indicates, when the second indication field denotes a fifth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET partially overlaps with a frequency domain resource of the SS block and occupies the first two other symbols in the time domain of the slot where the SS block is located; the second indication field indicates, when the second indication field denotes a sixth value of the first configuration, that the CORESET is time division multiplexed with the SS block, and the CORESET has at least an overlapping part with a resource in the frequency domain of the block>S<s>.<and occupies another first symbol>in the time domain of the slot where the SS block is located; either the second indication field indicates, when the second indication field denotes a seventh value of the first configuration, that at least two CORESETs are time division multiplexed with the SS block, and the at least two CORESETs have at least one overlapping part with a frequency domain resource of the SS block and occupy another two first time domain symbols of the slot where the SS block is located; where, the first time domain symbol is a candidate time domain symbol used to receive the SS block, and the first other time domain symbol is a time domain symbol, other than a candidate transmission position of the block SS, an uplink control, UL, and a guard period, of the slot where the SS block is located. 12. The method according to any of claims 8 to 11, wherein, in addition to the indication information for indicating the CORESET configuration, the second indication field comprises at least one of: third indication information, for indicating a transmission mode from the SS block; fourth indication information, to indicate that CORESET occupies four OFDM symbols of a time domain resource; either fifth indication information, to indicate that at least a part of the CORESET occupies an inactive resource block of the SS block. 13. A terminal (2300), characterized in that it comprises: a receiving module (2310), configured to receive indication information transmitted by the network equipment; wherein the indication information comprises: a first indication field for indicating downlink numerological information and a second indication field for indicating a set of control resources, CORESET, configuration, and the first indication field comprises at least one of: first indication information to indicate whether numerological information for CORESET is the same as the numerological information for the SS block; or second indication information to indicate the numerological information for the CORESET; where, the numerological information comprises: subcarrier spacing, the CORESET configuration comprises: a first configuration where the numerological information for the CORESET is the same as the numerological information for a synchronized signal, SS, block, or a second configuration where the numerological information for the CORESET it is different from the numerological information of the SS block; and a processing module (2320), configured to determine position information in the time-frequency domain of the data information CORESET according to the first indication field and the second indication field. 14. The terminal (2300) according to claim 13, wherein the reception module (2310) comprises: a reception unit, configured to receive a block of synchronized signal, SS, transmitted by the network equipment; a first determination unit, configured to determine a system master information block, MIB, according to the SS block; and a second determination unit, configured to determine the indication information according to the system MIB. 15. The terminal (2300) according to claim 13 or 14, wherein the terminal (2300) further comprises: a blind detection module, configured to perform blind detection of the CORESET according to the indication information when the position information in the domain CORESET time-frequency of data information is not determined according to the indication information.