ES2773295T3 - Controller for a power converter and its method of operation - Google Patents

Abstract

Controller (116) for a converter (102) that receives an input power and that provides an output power through a switching operation, the controller (116) comprising: - an input (118) for receiving a signal (114) from feedback depending on the output power of the converter; and - an output (120) for providing a control signal (122) to the converter (102) to thereby control the switching operation of the converter (102), the control signal (122) corresponding to a switching pattern that is updated in response to the feedback signal (114); - the control signal (122) that includes a harmonic compensation signal (123) to reduce the highest harmonics in the output power, the highest harmonics originating from a delay time (406) between the power supply feedback signal (114) and the update of the switching pattern; - the controller (116) further including - a modulation signal generator (716) for providing a modulation signal (604); characterized by - a compensation generator (718) for generating a harmonic compensation component (720) based on said time delay (406); and - the controller (116) being configured to provide the control signal (122) in dependence on the modulation signal (604) and the harmonic compensation component (720).

Description

DESCRIPTION

Controller for a power converter and method of operation of the same

Field of the invention

The present invention relates to the field of power converters.

Background of the invention

Within closed-loop control systems that use sampled feedback data, there is a finite delay between sampling the feedback variable and changing the actuator in response to these feedback signals. For example, in the case of a three-phase voltage source converter, the feedback variables are the three-phase currents and the actuator is, in effect, the pulse width modulation (PWM) bridge that changes the three-phase voltage amplitude and phase to control three-phase currents.

Typically in fixed switching frequency PWM schemes, the current is sampled many times over a full PWM period (PWM period = 1 / (switching frequency)) and the average taken from these multiple samples becomes the current feedback variable used by a controller. Using this method, good attenuation of the harmonic currents related to the PWM switching frequency is achieved. However, a finite phase delay is introduced into the control loop, due to the delay between sampling the current, doing the necessary mathematical calculations, and changing the voltage. Therefore, the PWM voltage actually changes in response to this sampled current with a certain delay. It is desirable from the point of view of the stability of the control system, particularly when considering series of PWM bridges connected to the network, that these phase delays are minimized.

An article by MATIAVELLI P ET AL: "Dynamic improvement in UPS by means of control delay minimization", INDUSTRY APPLICATIONS CONFERENCE, 2004. 39TH IAS ANNUAL MEETING. CONFERENCE RECORD OF THE 2004 IEEE SEATTLE, WA, USA 3-7 OCT. 2004, PISCATAWAY, NJ, USA, IEEE, vol. 2, October 3, 2004 (10-03-2004), pages 843-849, XP010735114, DOI: 10.1109 / IAS.2004.1348511, ISBN: 978-0-7803-8486-6, refers to a dynamic improvement in a uninterruptible power supply (UPS) by minimizing control delay. Other prior art documents of the present application are DE 10032447 A1, US 6756702 B1 and US 6472775 B1.

In view of the situation described above, there is a need for an improved technique that allows to provide a converter controller with improved characteristics, while substantially avoiding or at least reducing one or more of the problems identified above.

Summary of the invention

This need can be met by subject matter according to the independent claims. Advantageous embodiments of the subject matter disclosed herein are described in the dependent claims.

According to a first aspect of the invention, a controller for a converter is provided, the converter receiving an input power and providing an output power by a switching operation, the controller comprising: an input for receiving a feedback signal depending the output power of the converter; and an output for providing a control signal to the converter to thereby control the switching operation of the converter, the control signal corresponding to a switching pattern that is updated in response to the feedback signal; the control signal having a harmonic compensation signal that reduces the highest harmonics in the output power, the highest harmonics originating from a delay time between the taking of the feedback signal and the updating of the switching pattern.

This aspect of the invention is based on the idea that a delay between taking the feedback signal and updating the switching pattern can be reduced while keeping unwanted harmonics at an acceptable level while compensating for these harmonics. at least one harmonic compensation signal in the control signal to the converter.

According to one embodiment, the converter is a power converter, for example, a power converter of a wind turbine device.

According to one embodiment, the output power has at least two phases, for example three phases (three-phase power). For example, in one embodiment, the output power is provided on two or more electrical conductors. (one for each phase) that carry alternating currents with a defined time deviation (phase difference) between the voltage waves in each conductor. In other embodiments, the power output is single phase. According to one embodiment, the controller further comprises a modulation signal generator for providing a modulation signal; a compensation generator for generating a harmonic compensation component; wherein the controller is configured to provide the control signal depending on the modulation signal and the harmonic compensation component.

According to one embodiment, the harmonic compensation component includes one or more harmonic components of phase and magnitude suitable for compensating for unwanted harmonics in the PWM voltage. Generally, herein, the harmonic compensation component includes only one such harmonic component or, in another embodiment, a plurality of such harmonic components (of suitable phase and magnitude).

According to a further embodiment, the controller further comprises an adder for adding the modulation signal and the harmonic compensation component to thereby generate a summing signal. For example, according to one embodiment, the harmonic compensation component is the harmonic component that is added directly to the modulation signal. In such a case, the summing signal is the control signal.

According to another embodiment, the controller further comprises a signal processing unit for processing the summing signal, thereby generating the control signal. For example, the summing signal can be compared with a reference signal, for example a triangular carrier signal, in order to obtain the times where the switching has to occur.

According to a further embodiment, the controller further comprises a look-up table having stored therein a plurality of compensation indicators, each compensation indicator corresponding to a respective harmonic compensation component; and the compensation generator being configured to generate the harmonic compensation component based on a selected compensation indicator. Also, according to one embodiment, the compensation generator is configured to receive at least one of a modulation depth, a modulation angle, and the delay time; and providing the harmonic compensation component in response thereto.

For example, in one embodiment, the look-up table has offset indicators for a plurality of different modulation depths, modulation angles, and delay times stored in it. The compensation generator is then configured to receive an actual modulation depth, modulation angle and delay time, and to select the corresponding compensation flag in response thereto. The compensation generator generates the harmonic compensation component based on the selected compensation indicator.

According to a further embodiment, the output power has at least two phases and the updating of the switching pattern is performed at a time where the voltage levels of the at least two phases are different. For example, without a harmonic compensation signal, an update of the switching pattern would be performed at a midpoint of a zero vector, where the zero vector corresponds to the time interval where the voltage level is identical for all of the at least two phases. By having the harmonic compensation signal according to the embodiments of the subject matter disclosed herein, the switching pattern update can be performed at any time, regardless of the midpoint of the zero vector, that is, in particular at times where the voltage levels of the at least two phases are different. An alternative for a "time where the voltage levels of the at least two phases are different" is a time where the control signal components for each of the at least two phases are different.

According to a further embodiment, the delay time is determined by a calculation time necessary to determine the control signal. For example, in one embodiment, the delay time is not artificially lengthened, but is only determined by the computation time required. In this sense, such a delay time is a minimum delay time that is due to the controller configuration.

In accordance with a second aspect of subject matter disclosed herein, a converter device is provided, the converter device comprising a controller according to the first aspect or in an embodiment thereof; and the converter referred to in the first aspect, the converter having an input for receiving the input power and an output for providing the output power by the switching operation.

In accordance with a third aspect of the subject matter disclosed herein, a method of operating a controller for a converter is provided, the converter receiving an input power and providing an output power by a switching operation, comprising the receive method a feedback signal depending on the output power of the converter; and providing a control signal to the converter to thereby control the switching operation of the converter, the control signal corresponding to a switching pattern that is updated in response to the feedback signal; the control signal having a harmonic compensation signal that reduces the highest harmonics in the output power, the highest harmonics originating from a delay time between the taking of the feedback signal and the updating of the switching pattern.

According to an embodiment of the third aspect, the power output has at least two phases.

According to an embodiment of the third aspect, the method further comprises providing a modulation signal; generate a harmonic compensation component; and providing the control signal depending on the modulation signal and the harmonic compensation component.

According to yet another embodiment, the method further comprises adding the modulation signal and the harmonic compensation component to thereby generate a summing signal.

According to yet another embodiment, the method further comprises providing a look-up table having a plurality of compensation indicators stored therein, each compensation indicator corresponding to a respective harmonic compensation component (or, in another embodiment, to a signal harmonic compensation); selecting one of the plurality of compensation indicators; and generating the harmonic compensation component based on the selected compensation indicator.

According to a further embodiment of the third aspect, the output power has at least two phases and the switching pattern update is performed at a time where the voltage levels of the at least two phases are different.

Generally herein, the respective embodiments of the third aspect of the method may include one or more features and / or functions as described with respect to the first aspect of the device. In such cases, the features of the device described with respect to the first aspect should not be construed as limiting the claim of the method. Instead, at least by referring to the disclosed features with respect to a device, it is noted that such device disclosure implicitly discloses the respective function or the respective method features independently of the device features.

Accordingly, in an embodiment of the third aspect, the method is configured in accordance with or in an embodiment of the first aspect.

According to a fourth aspect of the subject matter disclosed herein, a computer program is provided, the computer program being adapted to, when executed on a processor device, control the method as set forth in the third aspect or in a realization of this.

As used herein, reference to a computer program is intended to be equivalent to a reference to a program item and / or computer-readable medium that contains instructions for controlling a computer system to coordinate the functionalities of the method described above. or realizations of it.

The computer program can be implemented as computer-readable instruction code using any suitable programming language, such as, for example, JAVA, C +, and can be stored on a computer-readable medium (removable disk, volatile memory, or non-volatile, an integrated memory or processor, etc.). The instruction code can be operated to program a computer or any other programmable device to carry out the intended functions. The computer program may be available from a network, such as the World Wide Web, from which it can be downloaded.

The invention can be achieved by means of a computer program, respectively software. However, the invention can also be achieved by means of one or more specific electronic circuits, respectively hardware. On the other hand, the invention can also be achieved in a hybrid form, that is, in a combination of software modules and hardware modules.

Exemplary embodiments of the subject matter disclosed herein have been described above, and will now be described with reference to a controller of a converter device, a converter device, and a method of operation of such a controller. It should be noted that, of course, any combination of features related to different aspects of the subject matter disclosed herein is also possible. In particular, some embodiments are apparatus-type embodiments, while other embodiments are method-type embodiments. However, an expert in the field will conclude, based on what is described above and below, that, unless otherwise notified, in addition to any combination of features belonging to one aspect, also any combination between features related to different aspects or embodiments, for example, even between features of apparatus-type embodiments and features of method-type embodiments, is considered disclosed with this application.

The aspects and embodiments defined above and other aspects and embodiments of the present invention are apparent from the examples to be described hereinafter and explained with reference to the drawings, but to which it is not limited. the invention.

Brief description of the drawings

Figure 1 shows a converter device in accordance with embodiments of subject matter disclosed herein.

Figure 2 illustrates current sampling over a PWM period where an average of samples over a previous PWM period is used as current feedback.

Figure 3 illustrates current sampling at a midpoint of the zero vector where a current sample point is at a midpoint of the PWM period.

Figure 4 shows the update of the switching pattern at a time other than the posterior midpoint of the zero vector.

Figure 5 shows the magnitude of the harmonic current (z-axis) over the harmonic order (x-axis) and an update deviation tc of the switching pattern (y-axis).

Figure 6 illustrates for a single phase the determination of a PWM switching pattern from an exemplary modulation waveform and a triangular carrier.

Figure 7 shows a controller in accordance with embodiments of subject matter disclosed herein.

Detailed description

The illustration in the drawings is schematic. It is noted that, in different figures, similar or identical elements are provided with the same reference signs and the description of these elements is not repeated when these elements appear again.

Figure 1 shows a converter device 100 in accordance with embodiments of the subject matter disclosed herein. According to one embodiment, the converter device 100 comprises a converter, indicated generally by 102. The converter 102 has an input 104 for receiving an input voltage, for example a DC voltage, and an output 106 for providing a output power by the switching operation of converter 102. In one embodiment, the output power is a three-phase power. Consequently, the output 106 comprises three output lines 108a, 108b, 108c corresponding to the three phases. According to one embodiment, the converter comprises a pulse width modulation bridge having two switching elements 110 per phase. The switching elements 110 are insulated gate bipolar transistors (IGBTs) having a free-running diode connected in parallel as shown in Figure 1.

Also, the converter device 100 has a feedback line 112 coupled to each output line 108a, 108b, 108c to detect the output current of each phase. Also, an analog / digital converter 113 (A / D converter) is provided for each phase to provide each phase with a respective feedback signal 114 in response to the sensed current.

The converter device further comprises a controller 116 configured in accordance with embodiments of subject matter disclosed herein. The controller 116 has an input 118 for receiving the feedback signals 114 that depend on the output power of the converter 102. Also, the controller comprises an output 120 for providing a control signal 122 to the converter 102 to thereby control the output. switching operation of the converter 102. For example, in one embodiment, the switching signals 122 are IGBT gate signals provided to the IGBT gates.

In one embodiment, the controller 116 includes a processor device 121 configured to run a computer program that provides at least one function of the controller 116.

According to one embodiment, the control signal 102 corresponds to a switching pattern that is updated in response to the feedback signals 114. Likewise, the control signal 122 includes a harmonic compensation signal 123 that reduces the highest harmonics in the output power, originating the highest harmonics from a delay time between the feedback signal being taken and the update. switching pattern.

Also shown in FIG. 1 are the windings 124 of a reactor / inductor and a filter capacitor 126. However, these elements perform their normal function and are not described further in this document. Hereinafter, possible operating schemes of a converter device are described to further illustrate the advantages of aspects and embodiments of the subject matter disclosed herein. Figure 2 illustrates current sampling over a PWM period where an average of N samples over a previous PWM period is used as current feedback. In FIG. 2 the control signal components 122a, 122b, 122c corresponding to the phases on lines 108a, 108b, 108c in FIG. 1 during time t are shown. Furthermore, the PWM period 128 corresponding to a fixed switching frequency is shown in FIG. 2. The period of PWM is defined as the period of PWM = 1 / (switching frequency).

Typically, the current is sampled many times over a full 128 PWM period, the sample being indicated by the number 130. The average of these multiple samples (for example, N) is used as the current feedback variable, which leads to an updated switching pattern at a time indicated by the number 132. While the described method provides a method of good attenuation of harmonic currents related to the PWM switching frequency, it also introduces a finite phase delay due to time delay between sampling the current during intervals 1a and 1b, doing the necessary mathematical calculations during 2a and respectively changing the voltage of ^p W ^m at the output of the bridge. It is desirable from the point of view of the stability of the control system, particularly when considering series of wind turbines, or arrays of PWM bridges connected to the network, that these phase delays are minimized. With a scheme such as the one shown in figure 2, the effective delay is 500 microseconds (| js) (assuming a PWM period of 400 js, which is typical, for example, for wind turbines).

Figure 3 illustrates "synchronous" current sampling at a zero vector midpoint 302 where a current sampling point is at a midpoint of the PWM period. The switching pattern is updated at the next midpoint of the zero vector, indicated at 304. Arrows 306 indicate the delay time between taking the feedback signal and updating the switching pattern.

When the IGBTs are switched so that all upper devices are ON or all lower devices are ON, this is known as a zero vector and is equivalent to the upper and lower peaks in a sinusoidal triangular comparison method for generating PWM pulses. . As mentioned, the current is sampled at the midpoint of the zero vector (for example, in the middle of the PWM period) as shown in Figure 3. The midpoint of the zero vector is indicated by the vertical lines in figure 3. The currents are sampled at this point, that is, at a midpoint of a zero vector, as the favorable cancellation of the switching frequency harmonics is the result of this. Using the synchronous sampling technique of the three-phase current feedbacks and updating the PWM pattern at the midpoint of the zero vectors (asymmetric PWM), as shown in Figure 3, results in an effective delay between the displays current and voltages appearing at the bridge output for a 3/4 period PWM period. Assuming a PWM period of 400 js this equates to a delay of 300 js.

However, the restriction of updating the PWM switching pattern only at the midpoints of the zero vectors introduces a 1/2 period PWM delay. While this may be suitable for microprocessor systems by allowing enough time to perform the control calculation, it does not offer optimal behavior from a control loop stability point of view, as the delay introduced is not at its minimum. absolute.

Since control calculations are performed every 1/2 PWM period, this results in an effective delay of 100ps. In an ideal consideration where A / D conversion times are zero, and the microprocessor's CPU resource is infinite, then this 100ps would be the minimum possible delay.

The experience of wind farm collector systems to date has shown that due to resonances in the wind farm collector system, it is highly desirable for the controller to introduce the minimum phase delay (phase delay). Resonances are generally caused, for example, by medium voltage (MV) and / or high voltage (HV) cables, or potentially capacitor banks for VAr compensation, or AC filters. The minimal phase delay enables a robust current control arrangement to be achieved, both at the level of an individual network bridge (or turbine) and across the entire series of network bridges (or turbines).

This minimal phase delay reduces the likelihood of the current driver interacting with the resonances of the AC system.

However, the current sampling and PWM switching pattern update methods as described with respect to Figure 2 and Figure 3 seem suitable for motor drive converter devices.

On the contrary, the connection of high power voltage source inverters connected to the grid, which is an application of the subject matter disclosed in this document, has different requirements. The fact that converters in such applications are connected, for example, within collector systems of wind farms containing resonances, imposes new and demanding requirements regarding the stability of the current loop, which are more demanding than the applications motor control standard.

However, updates of the switching pattern within the PWM period anywhere other than the midpoint of the zero vector is not an easy task, as updating the PWM modulation waveform (it is a discrete signal) in Elsewhere within the PWM period results in an increase in the low order harmonic content of the PWM voltage.

However, low-order harmonics are desirably minimized and therefore updating the switching pattern (or, in embodiments, updating the PWM modulation waveform) elsewhere than at the midpoint of the zero vector. does not seem adequate without the concepts provided by aspects and embodiments of subject matter disclosed herein.

However, it should be noted that in traditional "analog" type PWM schemes where the sinusoidal triangle comparison is performed, the sine or modulation waveform is a continuous (unsampled) waveform.

Advantageously, the aspects and embodiments of the subject matter disclosed herein allow the switching pattern to be updated at a time other than the posterior midpoint of the zero vector.

For example, in order to try to reduce the delay between sampling the current and updating the voltage of the PWM bridge, a scheme such as the one presented in figure 4 is proposed. it is sampled at the midpoint 302 of the zero vector. This has the advantage of minimizing the harmonic content within the sampled current feedback signal. However, according to one embodiment, Figure 4 shows the update of the switching pattern at a time 404 other than the back midpoint of the zero vector, a delay (tc) 406 after the current sample is taken. In one embodiment, delay 406 is the time it takes for the microprocessor to perform the necessary calculations, and these calculations can now be minimized to reduce the effective delay introduced by the controller.

For illustrative purposes, delay 406 is assumed to be tc = 50 | js. With the scheme proposed in figure 4, the delay introduced by the controller can now be reduced to 1/4 of PWM 50 js. Therefore, based on a PWM period of 400 js, the current is sampled twice per PWM period, that is, every 200 js. Updating the 50 js PWM pattern after current sampling, this results in an effective delay of 150 js. An advantage of this is that the point where the open loop phase of the driver response drops to -180 ° is now 0.5 / 150 js = 3333 Hertz (Hz).

Similar considerations for the above scheme shown in figure 3, which has an effective delay of 300 js (3/4 PWM period), show that a phase of -180 ° is obtained at about 0.5 / 300 js = 1666 Hz.

Likewise, similar considerations for the previous scheme shown in figure 2, which has an effective delay of 500 js, show that the phase drops to 0.5 / 500 js = 1 kHz.

If in a control system the gain of an open loop system is greater than unity at any frequency above which the phase drops to an angle less than or equal to (<=) -180 °, then the loop system corresponding closed is unstable. Actually, the AC series resonances result in a gain greater than unity.

So in principle, a consequence of the exemplary minimized delay scheme suggested above is that the closed loop system is now immune to resonances that are at frequencies less than or equal to 3333 Hz, whereas the schemes shown in the Figure 2 and Figure 3 are immune only to resonances that are at frequencies lower than 1000 Hz in the case of Figure 2, or lower than 1666 Hz in the case of Figure 3. In practice, resonances are likely to exist that are at frequencies lower (<) than 3 kHz, so that these schemes do not offer the possibility of being completely immune to resonances of the AC system. However, having a driver that is immune to resonances down to 3333 Hz before the phase drops can be considered a significant improvement.

However, the consequence of not updating the PWM pattern at the midpoint of the zero vector is an increase in the low-order harmonic voltage content of the PWM output voltage.

Figure 5 shows the magnitude of the harmonic current (z-axis) over the harmonic order (x-axis) and an update deviation tc of the switching pattern (y-axis).

The first harmonic (fundamental component) corresponds to the desired signal. Higher harmonics (displayed up to about the order of 20) appear if the switching pattern updates elsewhere than at the midpoint of the zero vector. As can be seen in figure 5, in the zero vectors, effectively 0 | js and 200 | js on the Y axis, the low-order harmonic current is approximately zero, although at intermediate points this is not the case, apart from of a minimum of 100 js.

Likewise, Figure 5 shows a strong increase in the 5th harmonic current (although not only in the 5th harmonic) for the switching pattern that is updated at points other than the midpoint of the zero vector. For the purposes of this analysis, the spectra shown in Figure 5 can be considered harmonic stress spectra.

However, the simulation result shown in figure 5 was obtained without a harmonic compensation signal that reduces the higher harmonics in the output power.

Hereinafter, embodiments related to harmonic compensation signals are further discussed below.

According to one embodiment, the harmonic compensation signal is obtained by introducing a compensation waveform to the PWM modulation waveform, the compensation waveform compensating for the harmonic voltages introduced by updating the switching pattern in points other than the midpoint of the zero vectors.

Figure 6 illustrates for a single stage the determination of a PWM switching pattern 602 from an exemplary modulation waveform 604 and a triangular carrier 606 (in arbitrary units). The PWM switching pattern 602 (where uc is the voltage across capacitor 126 in FIG. 1), modulation waveform 604, and triangular carrier 606 are plotted over time t in seconds t (s). A modulation waveform such as that shown for a single phase in Figure 6, can be derived by several different means, usually a third harmonic voltage component or a series of triple-n harmonic voltages is added. (n) to the fundamental to maximize the resulting output voltage. The space vector PWM achieves a similar output voltage harmonic spectrum by mathematical calculation of the switching times of the IGBTs. Times where modulation waveform 604 crosses triangular carrier 606 indicate a switching event, as illustrated by way of example by lines 610.

If a series of appropriate magnitude and phase harmonic components are added to the modulation waveform 604 of Figure 6, to compensate for the harmonic voltages present in the PWM voltage spectrum of Figure 5, then the resulting PWM voltage it will not contain low order harmonic voltage components or the low order harmonic components are at least reduced.

Figure 7 shows a controller 116 in accordance with embodiments of subject matter disclosed herein.

In an exemplary embodiment, controller 116 comprises a vector control unit 702 and a modulation calculator 704 that receives a q-axis component 706 (Vq), a d-axis component 708 (Vd), as well as an angle 710 phase indicative of the position of the rotating reference frame defining the q axis and the d axis of the vector control. In response to values received from vector control unit 702, modulation calculator 704 calculates a modulation depth 712 and a modulation angle 714. Also, a modulation signal generator 716 is provided, the modulation signal generator 716 being configured to provide a modulation signal, for example, in the form of a modulation waveform 604.

Also, in accordance with one embodiment, a compensation generator 718 is provided, the compensation generator 718 being configured to generate a harmonic compensation component 720 in response to input parameters. In one embodiment, the input parameters are modulation depth 712, modulation angle 714, and the delay time tc between sampling the current and the update of the corresponding switching pattern. In one embodiment, the harmonic compensation component 720 is a function of these variables, modulation depth 712, modulation angle 714, and delay time tc 406. However, according to embodiments, such a function may be defined in the offset generator 718 using a look-up table. Also, according to one embodiment, controller 116 is configured to provide control signal 122 in dependence on modulation signal 604 and harmonic compensation component 720.

In one embodiment, modulation signal generator 716 uses a triple-n weighted sine wave reference waveform, or look-up table, or does an online calculation to obtain the amplitude, that is, the waveform 604 modulation. According to one embodiment, the additional harmonic compensation component 720 is added to the modulation waveform 604 by an adder 724, to thereby generate an adder signal 726.

According to one embodiment, the controller further comprises a signal processing unit 728 for processing the summing signal 726, thereby generating the control signal 122. For example, in one embodiment, modulation waveform 604 is compared to triangular carrier waveform 722 by signal processing unit 728 to produce individual control signals 122 that compensate for the phase delay, i.e., harmonics that originate from a delay time between taking the feedback signal and updating the switching pattern.

Dead time compensation or other linearization features of the bridge are not shown in this figure and are not specifically compensated for with this technique. Alternative techniques are believed to exist to achieve this.

According to one embodiment, the harmonic compensation component 720 contains a series of normalized harmonic voltages as a function of modulation depth, angle, and delay time "tc" between current sampling and switching pattern update.

In accordance with one embodiment, a look-up table is provided in order to provide the harmonic compensation component 720 based on one or more defining parameters, such as a modulation depth, a modulation angle, and the delay time. According to one embodiment, the look-up table has a plurality of compensation indicators stored therein, each compensation indicator corresponding to a respective harmonic compensation component. The compensation generator is configured to generate the harmonic compensation component based on a selected compensation indicator. Typically, the look-up table (compensation table) is calculated offline based on a desired "tc" 406 such that the resulting PWM voltage does not contain any of the harmonic voltages from Figure 5 through the entire modulation depth operating range.

The described technique allows a significant and technically advantageous reduction in the phase shift introduced by the digital current controller over a frequency range that is related to AC collector systems in wind farms, and should not suffer from low harmonic voltages. undesirable order in the output PWM waveform.

In accordance with embodiments of the invention, any suitable entities (eg, controllers, components, drives, and devices) disclosed herein are provided at least in part in the form of respective computer programs that allow a processor device to provide the functionality of the respective entities as disclosed in this document. In accordance with other embodiments, any suitable entity disclosed herein may be provided in hardware. According to other (hybrid) embodiments, some entities may be provided in software while other entities are provided in hardware.

It should be noted that any entities disclosed herein (eg, controllers, components, drives, and devices) are not limited to a specialized entity as described in some embodiments. Instead, the subject matter disclosed herein can be implemented in various ways and with varying granularity at the device level or at the software module level while providing the desired functionality. Also, it should be noted that, in accordance with the embodiments, a separate entity (eg, a software module, a hardware module, or a hybrid module) may be provided for each of the functions disclosed herein. According to other embodiments, an entity (eg, a software module, a hardware module, or a hybrid module (combined software / hardware module) is configured to provide two or more functions as disclosed herein. According to one embodiment, the controller comprises a processor device that includes at least two processors to carry out at least one computer program corresponding to a respective software module.

It should be noted that the term "comprising" does not exclude other elements or steps and that "a" or "one" does not exclude a plurality. Elements described in association with different embodiments can also be combined. It should also be noted that the reference signs in the claims should not be construed as limiting the scope of the claims.

In order to recapitulate the above-described embodiments of the present invention, it may be provided that: A controller for a converter and a respective method of operation of such controller is provided. The converter receives an input power and provides an output power through a switching operation wherein, in one embodiment, the output power has at least two phases. According to embodiments, the controller comprises an input for receiving a feedback signal depending on the output power of the converter; and an output for providing a control signal to the converter to thereby control the switching operation of the converter, the control signal corresponding to a switching pattern that is updated in response to the feedback signal; The control signal includes a harmonic compensation signal that reduces the highest harmonics in the output power, the highest harmonics originating from a delay time between the feedback signal being taken and the switching pattern update.

Embodiments of subject matter disclosed herein include one or more of the following advantages, as readily recognized by one of ordinary skill in the art:

1. A significant and advantageous reduction in the phase shift / delay time introduced by the current controller can be achieved, with respect to the current loop stability and the overall current loop stability of the wind farm. The ability to significantly increase the effective phase margin means that a robust current controller can be implemented that is at least to some extent immune to the electrical system to which the current controller is connected. The ability to do this means that a "one size fits all" approach can be taken to the electrical connection of turbines, as it will be less likely, or not necessary, that individual studies will be required to determine the margin of stability of a particular arrangement of a wind farm. In general, from one wind farm to the next, the collector system will have a range of resonance frequencies associated with it, since it will have medium-voltage and / or high-voltage cables or lines in height (and / or equipment for correction of locally connected power factor or tuned filters).

2. The ability to achieve the above mentioned point 1 and not compromise the harmonic emissions of the turbine due to the harmonic voltages in the resulting PWM is achieved by adding the harmonic compensation table inside the modulation waveform generator of PWM.

3. The embodiments allow updating the PWM modulation waveform at a point other than the midpoint of the zero vectors.

4. An advantage of the embodiments of the subject matter disclosed herein is that power filters do not have to be adapted to stabilize specific collector systems of wind farms, since improvements in control result in a margin of sufficient phase, rather than having to resort to a powerful hardware solution, which would imply a significant cost.

Claims (13)

1. Controller (116) for a converter (102) receiving input power and providing output power through a switching operation, the controller (116) comprising: - an input (118) for receiving a feedback signal (114) depending on the output power of the converter; and - an output (120) for providing a control signal (122) to the converter (102) to thereby control the switching operation of the converter (102), the control signal (122) corresponding to a switching pattern that is updates in response to the feedback signal (114); - the control signal (122) that includes a harmonic compensation signal (123) to reduce the highest harmonics in the output power, the highest harmonics originating from a delay time (406) between the taking of the feedback signal (114) and the update of the switching pattern; - also including the controller (116) - a modulation signal generator (716) for providing a modulation signal (604); characterized by - a compensation generator (718) for generating a harmonic compensation component (720) based on said time delay (406); and - the controller (116) being configured to provide the control signal (122) depending on the modulation signal (604) and the harmonic compensation component (720). Controller according to claim 1, the controller (116) further comprising - an adder (724) for adding the modulation signal (604) and the harmonic compensation component (720) to thereby generate a summing signal (726). Controller according to claim 2, the controller (116) further comprising: - a signal processing unit (728) for processing the summing signal (726), thereby generating the control signal (122). Controller according to one of claims 1 to 3, further comprising - a look-up table having stored therein a plurality of compensation indicators, each compensation indicator corresponding to a respective harmonic compensation component (720); and - the compensation generator (718) being configured to generate the harmonic compensation component (720) based on a selected compensation indicator. Controller according to one of claims 1 to 4, wherein the compensation generator is configured to - receiving at least one of a modulation depth (712) and a modulation angle (714) and - providing in response to this the harmonic compensation component (720). Controller according to one of claims 1 to 5, wherein the output power comprises at least two phases and the switching pattern update is carried out at a point (404) at the moment where the voltage levels of the at least two phases are different. Controller according to one of claims 1 to 6, wherein the delay time (406) is determined by a calculation time necessary to determine the control signal (122). 8. Device (100) converter comprising: - a controller (116) according to one of claims 1 to 7; and - the converter (102) having an input (104) to receive the input power and an output (106) to provide the output power by the switching operation. 9. A method of operation of a controller (116) for a converter (102) receiving input power and providing output power by a switching operation, the method comprising: - receiving a feedback signal (114) depending on the output power of the converter (102); and - providing a control signal (122) to the converter (102) to thereby control the switching operation of the converter (102), the control signal (122) corresponding to a switching pattern that is updated in response to the feedback signal (114); - the control signal (122) including a harmonic compensation signal (123) to reduce higher harmonics in the output power; the higher harmonics originating from a delay time (406) between the taking of the feedback signal (114) and the updating of the switching pattern; - providing a modulation signal (604); characterized by - generating a harmonic compensation component (720) based on said delay time (406); and - providing the control signal (122) depending on the modulation signal (604) and the harmonic compensation component (720). 10. Method according to claim 9, further comprising - adding the modulation signal (604) and the harmonic compensation component (720) to thereby generate a summing signal (726). Method according to one of claims 9 or 10, further comprising - providing a look-up table having a plurality of compensation indicators stored therein, each compensation indicator corresponding to a respective harmonic compensation component (720); - selecting one of the plurality of compensation indicators; and - generating the component (720) of harmonic compensation on the basis of the selected compensation indicator. 12. Method according to one of claims 9 to 11, wherein the output power has at least two phases and the switching pattern update is performed at a time (404) where the voltage levels of the at least two phases are different. A computer program, the computer program being adapted to, when run by the controller of claim 1, executing the method steps set forth in any one of claims 9 to 12.