ES2454141B1 - Circuito de autotest integrado de TSVs. - Google Patents

Circuito de autotest integrado de TSVs. Download PDF

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Publication number
ES2454141B1
ES2454141B1 ES201231554A ES201231554A ES2454141B1 ES 2454141 B1 ES2454141 B1 ES 2454141B1 ES 201231554 A ES201231554 A ES 201231554A ES 201231554 A ES201231554 A ES 201231554A ES 2454141 B1 ES2454141 B1 ES 2454141B1
Authority
ES
Spain
Prior art keywords
tsvs
test circuit
integrated self
self
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
ES201231554A
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English (en)
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ES2454141A1 (es
Inventor
Delgado Daniel Arumi
Montanes Rosa Rodriguez
P Mies Joan Figueras
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universitat Politecnica de Catalunya UPC
Original Assignee
Universitat Politecnica de Catalunya UPC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Universitat Politecnica de Catalunya UPC filed Critical Universitat Politecnica de Catalunya UPC
Priority to ES201231554A priority Critical patent/ES2454141B1/es
Publication of ES2454141A1 publication Critical patent/ES2454141A1/es
Application granted granted Critical
Publication of ES2454141B1 publication Critical patent/ES2454141B1/es
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
ES201231554A 2012-10-09 2012-10-09 Circuito de autotest integrado de TSVs. Active ES2454141B1 (es)

Priority Applications (1)

Application Number Priority Date Filing Date Title
ES201231554A ES2454141B1 (es) 2012-10-09 2012-10-09 Circuito de autotest integrado de TSVs.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ES201231554A ES2454141B1 (es) 2012-10-09 2012-10-09 Circuito de autotest integrado de TSVs.

Publications (2)

Publication Number Publication Date
ES2454141A1 ES2454141A1 (es) 2014-04-09
ES2454141B1 true ES2454141B1 (es) 2015-03-12

Family

ID=50431439

Family Applications (1)

Application Number Title Priority Date Filing Date
ES201231554A Active ES2454141B1 (es) 2012-10-09 2012-10-09 Circuito de autotest integrado de TSVs.

Country Status (1)

Country Link
ES (1) ES2454141B1 (es)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8384417B2 (en) * 2008-09-10 2013-02-26 Qualcomm Incorporated Systems and methods utilizing redundancy in semiconductor chip interconnects
KR101201860B1 (ko) * 2010-10-29 2012-11-15 에스케이하이닉스 주식회사 반도체 장치와 그 테스트 방법 및 제조방법
KR101242614B1 (ko) * 2010-12-17 2013-03-19 에스케이하이닉스 주식회사 반도체 집적회로

Also Published As

Publication number Publication date
ES2454141A1 (es) 2014-04-09

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