ES2377310A1 - Method of selective correction of inefficiencies in electrical installations and apparatus for its application. (Machine-translation by Google Translate, not legally binding) - Google Patents

Abstract

Method of selective correction of inefficiencies in electrical installations, which includes the incorporation of an inverter circuit (1) constituted by a three-phase bridge of transistors or another device that allows performing a similar function that is connected in parallel with the loads (11) whose inefficiencies it is desired to correct, so that compensated inefficiencies will not appear upstream of the connection point of the corrective system; in which, starting from a dc voltage bus, vdc, the inverter is responsible for generating a set of currents ifa, ifb and ifc that compensates for the inefficiencies identified in the ila, ilb and ilc currents that they are consumed downstream by the loads, counting on a basic current control loop (4) that generates certain work cycles d α β to regulate the current components of the fap at the fundamental frequency and direct sequence. (Machine-translation by Google Translate, not legally binding)

Description

 SELECTIVE CORRECTION METHOD OF INEFFICIENCIES IN ELECTRICAL INSTALLATIONS AND APPLIANCE FOR APPLICATION

OBJECT OF THE INVENTION

The invention, as expressed in the statement of the present specification, refers to a method of selective correction of inefficiencies in electrical installations and a device for application, contributing to this function several advantages and innovative features that will be described in detail below, which are a remarkable improvement compared to the systems currently known for The same end.

FIELD OF APPLICATION OF THE INVENTION

He

countryside from application from the Present

invention

be framing inside of the sector technical

relating to electrical installations.

BACKGROUND OF THE INVENTION

As is known, an active filter (FA) it consists of a power inverter that works at from a voltage source or a source of direct current, equipped with a connection filter network to reduce curling at the frequency of switching in the currents injected into the network of supply.

To reduce the size and weight of

magnetic elements, the tendency is to use filters high order network connection (for example, LCL filters), distinguished by presenting phenomena of resonance at certain frequencies.

In its version connected in parallel with the loads (FAP), the function of an active filter is correct one or more of the inefficiencies that reduce The quality of electricity consumption.

These inefficiencies are:

I. Current harmonics, generated by non-load linear of an electrical installation.

II. Offset between voltages and currents phase, due to inductive and capacitive loads.

III. In the three-phase case, current imbalances Between the phases

As a consequence, if the compensation of inefficiencies were perfect, the supply network only the fundamental component of direct sequence (in the three-phase case) of currents absorbed by the charges.

Generally, the FAP operates with control mode inverter circuit current so that the currents delivered by this, follow a stream of reference.

The generation of reference currents It is based on the identification of inefficiencies from of the measurement of the current absorbed by the load, and of network tensions. From such measures, can calculate the reference currents according to

different methods that constitute the state of the

Current technique

The best known and widespread methods are the following:

one.

 Synchronous Reference Method (SRF, Synchronous Reference Frame).

2.

 Modified synchronous reference method.

3.

 Instant active and reactive power method (pq-method).

Four.

 Instant active and reactive power method modified (modified pq-method).

5.

 Methods based on spectrum identification harmonic of the currents consumed by the loads, among which the calculation of the Transformed stands out Fast Fourier or FFT (Fast Fourier Transform).

Methods 1 to 4 require a capacity to moderate calculation and allow to correct both harmonics of current generated by non-linear loads such as offset offset between voltages and currents of the same phase.

They do not allow selective correction of harmonics, so its application to investors equipped with order network connection filters high (for example, LCL filters) can cause it to amplify harmonic components to the frequency Resonance of the filter. The methods grouped in the point 5 require a high calculation capacity and allow selective correction of harmonics, but not

allow to compensate imbalances.

All the above methods have in common that the reference currents of the active filter they constitute the setpoint signals for the ties of FAP current.

EXPLANATION OF THE INVENTION

Specifically, the correction method selective inefficiencies in electrical installations that the present invention proposes are configured as a remarkable novelty within its field of application, since, according to its implementation and thanks to using a connected power inverter in parallel with the loads whose inefficiencies are desired compensate upstream of the supply network, It has the following advantages:

-

allows to identify and correct the current harmonics generated by the charges;

-

allows to prevent the power inverter try to correct harmonic components at the frequency of resonance of the network filters, in case of use of high order filters (for example, LCL), or at other frequencies than the user's system want to avoid;

-

allows to identify and correct the reverse sequence component of the currents consumed by loads, component associated with imbalance according to Stokvis's theorem. In Consequently, consumption can be balanced in each one of the upstream phases of the connection of the inefficiency correction system;

-

 allows to identify and correct the offset between voltages and currents of the same phase, both inductive as capacitive;

-

 requires a moderate calculation capacity, so in its digital implementation it is not done necessary to use digital signal processors high performance for its application;

-

 it can be implemented both digitally and analogically

He

method from correction selective from

inefficiencies

in installations electric that be

advocate

It represents, well, a innovation from

technical, structural and constitutive characteristics unknown so far for that purpose, reasons that together with its practical utility, endow it with foundation enough to get the privilege of exclusivity that is requested.

DESCRIPTION OF THE DRAWINGS

To complement the description that is being performing and in order to help a better understanding of the features of the invention, it accompanies the present specification, as part member of it, of a set of planes, in the that with an illustrative and non-limiting nature represented the following:

Figure number 1.- Shows a diagram of blocks in which a circuit with a conventional active filter system in its version in

parallel with loads (FAP).

Figure number 2.- Shows a diagram of the scheme of the method of selective correction of inefficiencies in electrical installations subject to invention.

Figure number 3.- Shows an example of preferred embodiment of a system according to the method of the invention.

PREFERRED EMBODIMENT OF THE INVENTION

Thus, according to figure 1, in which has represented a representative scheme of the technique current, you can see how it has been referenced with

(one)

 the inverter circuit, with (10) the connection to the mains supply, with (11) loads, with (4) the current control, with (5) the control circuit of the voltage on the inverter's continuous bus and with

(12)

 the generation of reference currents.

As this figure shows, and remembering what previously noted, generally, the FAP operates with control current mode of the inverter circuit so that the currents delivered by this one, iF, follow about reference currents, iF *.

The generation of reference currents It is based on the identification of inefficiencies from of the measurement of the current absorbed by the load, iL, and of the network tensions, vred. From such measures the iF * can be calculated according to different methods that constitute the current state of the art.

Figure 2 shows the principle scheme

of the proposed invention, being able to appreciate in it as the inverter circuit (1) is constituted by a three-phase bridge of transistors IGBT or other device that allows to perform a similar function.

Said circuit is connected in parallel with the loads (11) whose inefficiencies you want to correct, of so that compensated inefficiencies will not appear upstream of the system connection point concealer

It should be mentioned that in said figure 2, it has also been referenced with (2) the block corresponding to the Modulator, Vector or SVPWM or another type of modulation that performs the same function, with (3) the block corresponding to the coordinate transformation dg aa� ejw1t, with (4) to the current control, with (5) to the voltage control circuit on the inverter's DC bus, with (6) to the signal integrators, with (7) to the corresponding block to the calculation element of the iLdqDC signals, with (8) to the set of generated currents, with (9) to the block corresponding to the MRFPLL control, and with (10) to the connection to the supply network.

Thus, starting from a continuous voltage bus, VDC, the investor is responsible for generating a set of currents iFa, iFb and iFc that compensates for inefficiencies identified in the currents iLa, iLb and iLc that are consumed downstream by the charges. Compensated inefficiencies do not appear in the network of supply, upstream of the connection point of system.

Unlike conventional methods,

in which the filter reference currents active constitute the setpoint signals for FAP current loops, the proposed method employs a basic current control loop (4) that generates

certain work cycles damage

 to regulate the

components

from stream of the FAP to the frequency

fundamental and direct sequence.

Additionally, the proposed technique calculates certain work cycles of H, from the signal processing from the harmonics of the load currents to be corrected, as well as from the components of the load current at the fundamental sequence frequency inverse, which correspond to current imbalances between phases.

To generate the signals of H, the recommended method employs the decomposition of the load current signals in multiple synchronous reference frames, one of them tuned to the frequency of the inverse sequence fundamental, c1i = -c1, and the rest with the frequency of harmonics of order k that you want to compensate, ck = kc1.

The frequency and phase of the fundamental and of The harmonics are calculated by the MRFPLL block (9).

The operations that allow the decomposition in multiple frames of reference synchronous are based on the so-called transformation from Park.

Once the current signals are processed in each of the synchronous reference frames, said signals are integrated and converted back to a single stationary reference frame, resulting in H.

The method also allows correcting the

reactive power from direct sequence to frequency fundamental, incorporating into the control block of basic current (4) signals iLdqDC calculated by the calculation element (7).

Additionally, the power inverter can operate as active rectifier with low harmonic distortion and regeneration capacity of energy, keeping the control blocks of the voltage on the continuous bus and the control block basic current mode.

According to Figure 3, the scheme of a practical embodiment example for the application of the method proposed by the invention can be observed. In said example, elements 1 to 9 shown in Figure 2, that is, the inverter circuit (1), the modulation block, SVPWM vector (2), the coordinate transformation block dg aa� (3), the current control block (4), the voltage control circuit in the inverter's DC bus (5), the signal integrators (6), the calculation element (7), the generated currents (8) and The MRFPll control block (9) is programmed into a control card (13) based on a digital signal processor (DSP) of the TMS320XX family or any other of similar computational features, which in addition to the processor

digital

It includes circuits conventional from

conditioning

from signs,  converters AD

(analog to digital), protections, etc.

Said control card (13) interacts with a user panel (14) for local control and various conventional communication devices for the remote control of the device.

The control card (13) receives the signals

from intensity sensors (15) and voltage (16).

After processing these signals following the proposed method, shown in figure 2, the card control (13) generates the signals for the control of the inverter circuit IGBT transistors (1) three-phase, which are properly amplified via circuits (17) Gate Driver type conventional.

In short, it allows to identify and correct selectively the harmonics of the currents of load, the direct sequence reactive power to the fundamental frequency and current imbalance

between

phases, being totally compatible with he

functioning

of the investor how rectify dor

regenerative

In summary, and given the foregoing, it notes that the method proposed by the invention is concrete and distinguishes itself in that:

Calculate the frequency (and phase) of the direct sequence fundamental of the supply network voltages, c1, that of the inverse sequence fundamental, c1i = -c1, and that corresponding to the harmonics of order k, ck = kc1. The block that performs this function is MRFPLL, indicated as (9) in the Figure

2.

In addition, it breaks down both the load currents, iLa, iLb and iLc, as well as the inverter output currents, iFa, iFb and iFc, into a synchronous direct sequence reference frame, whose frequency is c1

calculated by the MRFPLL block, by applying the so-called Park transform, aligning the d axis with the fundamental direct sequence component of The supply voltages.

The result is the currents iLdq and iFdq, respectively.

On the other hand, it uses low-pass filters to obtain the continuous components of the iLdq currents. The result is the currents iLdqDC calculated

The method allows to obtain the high frequency components of the iLdq currents. After applying the so-called inverse Park transform to the frequency c1, the result is the currents iLa H.

The method calculates the error between the iLa H signals calculated by the calculation element

(7) and the iFa� signals that result after applying the so-called Clarke transform to the inverter output currents. The result is the error signals ea.

The method breaks down the error signals ea into multiple synchronous reference frames, by applying the so-called Park transform at frequencies c1i = -c1 (for the fundamental of inverse sequence) and ck (for each of the harmonics of order k ).

The method uses multiple integrators of signal (6), of integral gain Ki1 (for the fundamental reverse sequence) and Kik (for each of harmonics of order k). Only harmonics

considered whose Ki is non-zero will be corrected The correction of imbalances (fundamental reverse sequence) is only performed if Ki1 is nonzero.

The method calculates the inefficiency work cycles, gives H, by applying the so-called inverse Park transformation to each of the output signals of the integrators described above.

To understand the meaning of the above expression cycles of inefficiency work, It should be noted that the concept is as follows: the method calculates control signals for the inverter of power that are characterized by having two components. The first allows the investor to operate as active rectifier with low current distortion and with energy regeneration capacity; in the text this component appears as “work cycles basic ”, which are“ basic control signals ”. The second component is what allows to compensate inefficiencies in the electricity grid and that is why it has called "inefficiency work cycles", constituting the component of the control signals which allows to correct inefficiencies.

The method maintains the voltage on the bus Continuous power inverter, vDC, next to a setpoint value, vDCref, by means of the circuit control (5). Logically, any technique or circuit control, either analog or digital, either linear or Nonlinear, you can perform this function.

The method uses a control loop (4) of basic current, which acts from the error

between the signals corresponding to the currents of inverter output in a synchronous reference frame of direct sequence, iFdq, and certain signals of setpoint for said current mode control loop basic. It is understood that any technique or control circuit, either analog or digital, either linear or non-linear, you can perform this function.

The method uses as slogans of the loop of basic current mode control, described above, the following: for component d, the setpoint is the voltage controller output or control circuit (5); for the component q, the setpoint is the signal iLqDC if you want to correct the gap between voltages and currents of the same phase, being zero in case contrary.

The method calculates the basic work cycles for the power inverter, in the stationary reference frame a, by applying the so-called inverse Park transform at the frequency c1 (3). The result is the signals gives.

The method adds the basic work cycles described above with the duty cycles of inefficiency The result is the work cycles totals that are used to generate the tensions of inverter output by width modulation of pulse (PWM), pulse width modulation in the vector space (SVPWM) or other assimilable techniques to perform this function.

In addition, it is compatible with the operation of the power inverter as a rectifier regenerative

Describe sufficiently the nature of the

The present invention, as well as the way of putting it into practice, does not consider it necessary to extend its explanation so that any expert in the field understands its scope and the advantages derived from it, stating that, within its essentiality, it may be implemented in other embodiments that differ in detail from that indicated by way of example, and which will also achieve the protection that is sought as long as it is not altered, changed or modified its fundamental principle.

Claims (3)

 R E I V I N D I C A C I O N E S 1.-SELECTIVE CORRECTION METHOD OF INEFFICIENCIES IN ELECTRICAL INSTALLATIONS, intended for that compensated inefficiencies do not appear waters above the connection point, which comprising a inverter circuit (1) consisting of a bridge three-phase transistors or other device that allow to perform a similar function, characterized by the fact that, incorporating said inverter circuit (1) connected in parallel with the loads (11) whose inefficiencies you want to correct, starting from a DC voltage bus, VDC, whose inverter generates currents iFa, iFb and iFc that compensate for the inefficiencies identified in said currents iLa, iLb and iLc , and using a basic current control loop (4) that generates certain certain duty cycles to regulate the current components of the FAP at the fundamental and direct sequence frequency, said correction method:

-

calculates certain work cycles of H, from the signal processing from the harmonics of the load currents to be corrected, as well as from the components of the load current at the fundamental frequency of the inverse sequence, which correspond to current imbalances between phases;

-

it uses the decomposition of the load current signals in multiple synchronous reference frames to generate said signals from H, one of them tuned to the frequency of the inverse sequence fundamental, c1i = -c1, and the rest with the frequency of the harmonics of order k that you want to compensate, ck = kc1,

-calculate the frequency and phase of fundamental and harmonics by a block MRFPLL (9); -based on the operations that allow decomposition in multiple frames of reference synchronous in the so-called Park transformation;

-

 because, once the current signals are processed in each of the synchronous reference frames, said signals are integrated and converted back to a single stationary reference frame, resulting in H;

-

 incorporates the iLdqDC signals calculated by a calculation element (7), to correct the power direct sequence reactive to frequency fundamental, to the current control block (4) basic;

-

 and why, so that the power inverter operate as an active rectifier with low distortion harmonic and energy regeneration capacity, keeps the voltage control blocks on the bus of continuous and the control block in current mode basic.

2.- APPLIANCE FOR THE APPLICATION OF A SELECTIVE CORRECTION METHOD OF INEFFICIENCIES IN ELECTRICAL INSTALLATIONS, according to the method described in claim 1, characterized by comprising a control card (13) in which an inverter circuit is programmed ( 1), a modulation block, SVPWM vector (2), a coordinate transformation block dg aa� (3), a current control block (4), a voltage control circuit in the DC bus inverter (5), signal integrators (6), a calculation element (7), generated currents (8) and MRFPLL control block (9); said control card (13) being based on a digital signal processor (DSP) of the TMS320XX family or any other of similar benefits computational, which in addition to the digital processor includes conventional signal conditioning circuits, AD converters (analog to digital), protections, etc., being able to interact with a user panel (14) for local control and various devices conventional communication for remote control; in which said inverter circuit (1) is incorporated connected in parallel with the loads (11), it has a direct voltage bus, VDC, whose The inverter generates currents iFa, iFb and iFc that compensate for the inefficiencies identified in said currents iLa, iLb and iLc, and employs a basic current control loop (4) that generates certain certain work cycles. SPANISH OFFICE OF THE PATENTS AND BRAND Application no .: 200900173 SPAIN Date of submission of the application: 22.01.2009 Priority Date: REPORT ON THE STATE OF THE TECHNIQUE 51 Int. Cl.: H02J3 / 01 (2006.01) H02J3 / 18 (2006.01) RELEVANT DOCUMENTS

Category

56 Documents cited Claims Affected

X

DE 10118505 A1 (ABB RESEARCH LTD) 17.10.2002, the whole document. 1.2

X

US 2002136036 A1 (HUGGET COLIN et al.) 26.09.2002, description; figures. 1.2

TO

JP 9171414 A (HITACHI LTD) 06.30.1997, summary; figures. 1.2

TO

US 5648894 A (DEDONCKER RIK WIVINA ANNA ADEL et al.) 15.07.1997, figures. 1.2

Category of the documents cited X: of particular relevance Y: of particular relevance combined with other / s of the same category A: reflects the state of the art O: refers to unwritten disclosure P: published between the priority date and the date of priority submission of the application E: previous document, but published after the date of submission of the application

This report has been prepared • for all claims • for claims no:

Date of realization of the report 09.03.2012

Examiner M. P. López Sábater Page 1/4

REPORT OF THE STATE OF THE TECHNIQUE Application number: 200900173 Minimum documentation searched (classification system followed by classification symbols) H02J Electronic databases consulted during the search (name of the database and, if possible, terms of search used) INVENES, EPODOC, XPI3E State of the Art Report Page 2/4  WRITTEN OPINION Application number: 200900173 Date of Written Opinion: 09.03.2012 Statement

Novelty (Art. 6.1 LP 11/1986)

Claims Claims 1.2 IF NOT

Inventive activity (Art. 8.1 LP11 / 1986)

Claims Claims 1.2 IF NOT

The application is considered to comply with the industrial application requirement. This requirement was evaluated during the formal and technical examination phase of the application (Article 31.2 Law 11/1986).  Opinion Base.- This opinion has been made on the basis of the patent application as published. State of the Art Report Page 3/4  WRITTEN OPINION Application number: 200900173 1. Documents considered.- The documents belonging to the state of the art taken into consideration for the realization of this opinion are listed below.

Document

Publication or Identification Number publication date

D01

DE 10118505 A1 (ABB RESEARCH LTD) 17.10.2002

2. Statement motivated according to articles 29.6 and 29.7 of the Regulations for the execution of Law 11/1986, of March 20, on Patents on novelty and inventive activity; quotes and explanations in support of this statement Claim 1: The prior art document D01 is the closest to this first claim, since it discloses a method of selective correction of inefficiencies in electrical installations so that the compensated inefficiencies do not appear upstream of the connection point comprising an inverter circuit (30) consisting of a three-phase transistor bridge or other device that allows a similar function to be performed. Said inverter circuit (30) is connected in parallel with the loads (22) whose inefficiencies it is desired to correct starting from a DC bus. Said inverter generates currents that compensate for the inefficiencies identified in the currents of the line that go to the loads using a basic current control loop that generates certain work cycles to regulate, among others, the current components of the active filter in parallel at the fundamental frequency and direct sequence. This correction method: - calculates certain work cycles from the signal processing from the harmonics of the load currents to be corrected, as well as from the components of the load current at the fundamental frequency of the reverse sequence, which correspond to current imbalances between phases (figures 5 to 12); - it uses the decomposition of the load current signals in multiple synchronous reference frames to generate said signals, one of them tuned to the frequency of the inverse sequence fundamental and the rest with the frequency of the harmonics of order n that are to be compensated ; -calculate the frequency and phase of the fundamental and harmonics; -based on the operations that allow the decomposition into multiple synchronous frames of reference in the so-called Park transformation; - once the current signals are processed in each of the synchronous reference frames, said signals are integrated and converted back to a single stationary reference frame; -incorporates the iLdqDC signals calculated by the corresponding calculation elements to correct the direct sequence reactive power at the fundamental frequency to the basic current control block (Figures 5 to 9, 11 and 12); - Keeps the voltage control blocks on the DC bus and the control block in basic current mode. Unlike the method of this claim, in D01 the decomposition of the inverter current in its harmonics is also used to calculate the values of the control currents and voltages. Furthermore, it is not limited to supplying the iLdqDC signals at the fundamental frequency to the current control block, but also at the harmonic frequencies (figures (7), (9) and (12)). The calculations made in the method of D01 comprise, and therefore anticipate, the calculations made by the method of the base document. Therefore, this first claim lacks inventive activity within the meaning of article 8 of Patent Law 11/86. Claim 2: In paragraph [0045] of the description of D01, as well as in other passages of the document, it is established that the elements of the apparatus with which the method of the preceding claim can be carried out are the same ones that are to be protected in this independent claim. In the apparatus of the base document it is specified that an MRFPLL control block and SVPWM vector control system must be programmed on the control card. However, as the applicants already clarify on page 13 of the description of lines 23 to 30, this control system is one of several control systems that can be found in the state of the art and that allow the realization of the method. The same can be said of the MRFPLL control block. Therefore, that these blocks or other equivalents are programmed on the card is nothing more than a choice of the applicants that does not provide inventive activity to the claimed device. The same reasoning can be made about the control card being based on a digital signal processor (DSP) of the TMS320XXX family or based on another of similar benefits. Thus, this claim also has no inventive activity. State of the Art Report Page 4/4