ES2161273T3 - Protocolo transaccional y sistema para ejecutar este protocolo. - Google Patents

Protocolo transaccional y sistema para ejecutar este protocolo.

Info

Publication number
ES2161273T3
ES2161273T3 ES95402590T ES95402590T ES2161273T3 ES 2161273 T3 ES2161273 T3 ES 2161273T3 ES 95402590 T ES95402590 T ES 95402590T ES 95402590 T ES95402590 T ES 95402590T ES 2161273 T3 ES2161273 T3 ES 2161273T3
Authority
ES
Spain
Prior art keywords
memory
protocol
data
time
transactions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95402590T
Other languages
English (en)
Inventor
Dubois Taine Benoit Paul
Louis Bouveret
Souheil Marine
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel CIT SA
Alcatel Lucent SAS
Original Assignee
Alcatel CIT SA
Alcatel SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA, Alcatel SA filed Critical Alcatel CIT SA
Application granted granted Critical
Publication of ES2161273T3 publication Critical patent/ES2161273T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526Mutual exclusion algorithms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/466Transaction processing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Debugging And Monitoring (AREA)
  • Communication Control (AREA)

Abstract

ESTE PROTOCOLO CONSAISTE PARTICULARMENTE EN ATRIBUIR A UNA TRANSACCION QUE MODIFICA DATOS ALMACENADOS EN UNA MEMORIA, PESTILLOS DE INTENCION DE ESCRITURA EN EL MOMENTO DEL ACCESO. ESTOS PESTILLOS NO IMPIDEN LA ATRIBUCION DE PESTILLO DE LECTURA A OTRAS TRANSACCIONES. LAS OTRAS TRANSACCIONES PUEDEN POR LO TANTO LEER LOS ANTIGUOS C VALRES DE LAS VARIABLES MIENTRAS LOS NUEVOS VALORES NO ESTEN INSCRITOS EN LA MEMORIA (M) SIENDO HECHA ESTA INSCRIPCION EN EL MOMENTO DEL CIERRE DE LA TRANSACCION. EL TIEMPO DE EXCLUSION DE LOS LECTORES SOBRE DATOS EN TRATMAIENTO DE MODIFICACION, SE LIMITA A LA DURACION DE LA ESCRITURA DE LOS NUEVOS VALORES EN LA MEMORIA. ESTE PROPTOCOLO ES PARTICULARMENTE VENTAJOSO EN EL CASO DE QUE LA MEMORIA (M) SEA VOLATIL Y DE QUE LOS DATOS MODIFICADOS SEAN SALVAGUARDADOS EN OTRA MEMORIA NO VOLATIL (D). EN ESTE CASO, EL PROTOCOLO COSISTE EADEMAS EN TENER AL DIA UNA TABLA (T) MEMORIZADA E LA MEMORIA NO VOLATIL (D), Y QUE CONTIENE LAS IDENTIDADES DE LAS TRANSACCIONES EN CURSO. ESTA TABLA PERMITE ASEGURAR LA COHERENCIA DE LOS DATOS TRAS UN FALLO DE LA MEMORIA VOLATIL (M), A LA VEZ QUE CONTRIBUYE A MANTENER UN TIEMPO MINIMO DE EXCLUSION DE LOS LECTORES SOBRE LOS DATOS EN CURSO DE MODIFICACIOBN. APLICACION EN LOS SISTEMAS DE CONTROL DE RED DE TELECOMUNICACION.
ES95402590T 1994-11-21 1995-11-17 Protocolo transaccional y sistema para ejecutar este protocolo. Expired - Lifetime ES2161273T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9413900A FR2727222B1 (fr) 1994-11-21 1994-11-21 Protocole transactionnel, et systeme pour la mise en oeuvre de ce protocole

Publications (1)

Publication Number Publication Date
ES2161273T3 true ES2161273T3 (es) 2001-12-01

Family

ID=9468982

Family Applications (1)

Application Number Title Priority Date Filing Date
ES95402590T Expired - Lifetime ES2161273T3 (es) 1994-11-21 1995-11-17 Protocolo transaccional y sistema para ejecutar este protocolo.

Country Status (7)

Country Link
US (1) US5657474A (es)
EP (1) EP0713179B1 (es)
AT (1) ATE206538T1 (es)
CA (1) CA2163293A1 (es)
DE (1) DE69523015T2 (es)
ES (1) ES2161273T3 (es)
FR (1) FR2727222B1 (es)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5909682A (en) * 1996-12-30 1999-06-01 Mci Worldcom, Inc. Real-time device data management for managing access to data in a telecommunication system
FR2762418B1 (fr) * 1997-04-17 1999-06-11 Alsthom Cge Alcatel Procede de gestion d'une memoire partagee
US5926835A (en) * 1997-06-19 1999-07-20 Alcatel Alsthom Compagnie Generale D'electricite Method of isolating a memory location containing an obsolete value
US6978462B1 (en) 1999-01-28 2005-12-20 Ati International Srl Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled
US7275246B1 (en) 1999-01-28 2007-09-25 Ati International Srl Executing programs for a first computer architecture on a computer of a second architecture
US8074055B1 (en) 1999-01-28 2011-12-06 Ati Technologies Ulc Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code
US7013456B1 (en) 1999-01-28 2006-03-14 Ati International Srl Profiling execution of computer programs
US7065633B1 (en) 1999-01-28 2006-06-20 Ati International Srl System for delivering exception raised in first architecture to operating system coded in second architecture in dual architecture CPU
US7941647B2 (en) 1999-01-28 2011-05-10 Ati Technologies Ulc Computer for executing two instruction sets and adds a macroinstruction end marker for performing iterations after loop termination
US8127121B2 (en) 1999-01-28 2012-02-28 Ati Technologies Ulc Apparatus for executing programs for a first computer architechture on a computer of a second architechture
US7111290B1 (en) 1999-01-28 2006-09-19 Ati International Srl Profiling program execution to identify frequently-executed portions and to assist binary translation
US6826748B1 (en) 1999-01-28 2004-11-30 Ati International Srl Profiling program execution into registers of a computer
US8065504B2 (en) * 1999-01-28 2011-11-22 Ati International Srl Using on-chip and off-chip look-up tables indexed by instruction address to control instruction execution in a processor
US6954923B1 (en) 1999-01-28 2005-10-11 Ati International Srl Recording classification of instructions executed by a computer
US6779107B1 (en) 1999-05-28 2004-08-17 Ati International Srl Computer execution by opportunistic adaptation
US7254806B1 (en) 1999-08-30 2007-08-07 Ati International Srl Detecting reordered side-effects
US6553466B1 (en) * 1999-10-01 2003-04-22 Infraworks Corporation Shared memory blocking method and system
US6934832B1 (en) 2000-01-18 2005-08-23 Ati International Srl Exception mechanism for a computer
CA2369621C (en) * 2002-01-25 2009-06-09 Ibm Canada Limited-Ibm Canada Limitee Method and apparatus for handling resource transaction requests
US6925928B2 (en) * 2003-09-18 2005-08-09 Anthony Fox Trash compactor for fast food restaurant waste
US8074030B1 (en) * 2004-07-20 2011-12-06 Oracle America, Inc. Using transactional memory with early release to implement non-blocking dynamic-sized data structure
US7703098B1 (en) 2004-07-20 2010-04-20 Sun Microsystems, Inc. Technique to allow a first transaction to wait on condition that affects its working set
TW201039131A (en) * 2009-04-24 2010-11-01 Silicon Motion Inc Apparatus for controlling at least one electronic device and related method thereof
US9524219B2 (en) * 2013-09-27 2016-12-20 Intel Corporation Atomic transactions to non-volatile memory
US9817693B2 (en) 2014-03-14 2017-11-14 International Business Machines Corporation Coherence protocol augmentation to indicate transaction status
US10459909B2 (en) * 2016-01-13 2019-10-29 Walmart Apollo, Llc System for providing a time-limited mutual exclusivity lock and method therefor

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5220657A (en) * 1987-12-02 1993-06-15 Xerox Corporation Updating local copy of shared data in a collaborative system
US5247672A (en) * 1990-02-15 1993-09-21 International Business Machines Corporation Transaction processing system and method with reduced locking
EP0595453B1 (en) * 1992-10-24 1998-11-11 International Computers Limited Distributed data processing system
US5596754A (en) * 1992-10-29 1997-01-21 Digital Equipment Corporation Method for performing private lock management
GB2276737A (en) * 1993-03-30 1994-10-05 Ibm Fault-tolerant transaction-oriented data processing

Also Published As

Publication number Publication date
EP0713179B1 (fr) 2001-10-04
FR2727222B1 (fr) 1996-12-27
EP0713179A1 (fr) 1996-05-22
US5657474A (en) 1997-08-12
CA2163293A1 (fr) 1996-05-22
DE69523015T2 (de) 2002-05-29
FR2727222A1 (fr) 1996-05-24
ATE206538T1 (de) 2001-10-15
DE69523015D1 (de) 2001-11-08

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