ES2129012B1 - CIRCUIT AND PROCEDURE FOR THE RECOVERY OF SYMBOL TIMING. - Google Patents
CIRCUIT AND PROCEDURE FOR THE RECOVERY OF SYMBOL TIMING.Info
- Publication number
- ES2129012B1 ES2129012B1 ES9750004A ES9750004A ES2129012B1 ES 2129012 B1 ES2129012 B1 ES 2129012B1 ES 9750004 A ES9750004 A ES 9750004A ES 9750004 A ES9750004 A ES 9750004A ES 2129012 B1 ES2129012 B1 ES 2129012B1
- Authority
- ES
- Spain
- Prior art keywords
- signal
- segment
- procedure
- circuit
- recovery
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Synchronisation In Digital Transmission Systems (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
Circuito y procedimiento para la recuperación de temporización de símbolos. Se describe un circuito y un procedimiento para la recuperación de temporización de símbolos de una televisión digital que incluye: un convertidor analógico-digital (10) para el muestreo de una señal analógica recibida por un reloj de símbolos que se debe convertir en datos digitales; un demodulador (20) para la recuperación de una onda portadora, demodulando los datos digitales en una señal de banda de base y generando una señal de segmento; un detector de señal de sincronismo de segmento (40) para la detección de una señal de sincronismo de segmento a partir de la señal de segmento; un detector de error de fase (50) activado mediante la señal de sincronismo de segmento, para la recepción de la señal de segmento y para detectar un error de fase de símbolos de sincronismo de la señal de sincronismo de segmento; y un ajustador de fase del reloj de símbolos (60) para el ajuste de la fase del reloj de símbolos de acuerdo con el error de fase de los símbolos de sincronismo que se deben suministrar al convertidor analógico-digital como el reloj de símbolos.Circuit and procedure for symbol timing recovery. A circuit and a procedure for recovering the symbol timing of a digital television is described, including: an analog-to-digital converter (10) for sampling an analog signal received by a symbol clock to be converted into digital data; a demodulator (20) for recovery of a carrier wave, demodulating the digital data into a baseband signal and generating a segment signal; a segment sync signal detector (40) for detecting a segment sync signal from the segment signal; a phase error detector (50) activated by the segment sync signal, for receiving the segment signal and for detecting a phase error of sync symbols of the segment sync signal; and a symbol clock phase adjuster (60) for adjusting the phase of the symbol clock in accordance with the phase error of the sync symbols to be supplied to the analog-digital converter as the symbol clock.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| ES9750004A ES2129012B1 (en) | 1996-06-05 | 1996-06-05 | CIRCUIT AND PROCEDURE FOR THE RECOVERY OF SYMBOL TIMING. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| ES9750004A ES2129012B1 (en) | 1996-06-05 | 1996-06-05 | CIRCUIT AND PROCEDURE FOR THE RECOVERY OF SYMBOL TIMING. |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| ES2129012A1 ES2129012A1 (en) | 1999-05-16 |
| ES2129012B1 true ES2129012B1 (en) | 2000-02-16 |
Family
ID=8302298
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| ES9750004A Expired - Fee Related ES2129012B1 (en) | 1996-06-05 | 1996-06-05 | CIRCUIT AND PROCEDURE FOR THE RECOVERY OF SYMBOL TIMING. |
Country Status (1)
| Country | Link |
|---|---|
| ES (1) | ES2129012B1 (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB9013151D0 (en) * | 1990-06-13 | 1990-08-01 | Questech Ltd | Digital signal processing system |
| JPH04306975A (en) * | 1991-04-04 | 1992-10-29 | Matsushita Electric Ind Co Ltd | Jitter correcting circuit |
| US5388127A (en) * | 1993-02-09 | 1995-02-07 | Hitachi America, Ltd. | Digital timing recovery circuit |
-
1996
- 1996-06-05 ES ES9750004A patent/ES2129012B1/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| ES2129012A1 (en) | 1999-05-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EC2A | Search report published |
Date of ref document: 19990516 Kind code of ref document: A1 Effective date: 19990516 |
|
| FD2A | Announcement of lapse in spain |
Effective date: 20180807 |