EP4699220A1 - Fully controllable, power semiconductor switching assembly, power semiconductor device, snubber-less power converter and method for manufacturing - Google Patents

Abstract

The present disclosure relates to a fully controllable, power semiconductor switching assembly (40), comprising a first unit (51, 61, 71) comprising a latching power semiconductor switching device (41) controlled by a first gate terminal (44), a second unit (52, 62, 72) comprising a non-latching power semiconductor switching device (42) controlled by a second gate terminal (45), and a power semiconductor diode (43). The latching power semiconductor switching device (41) and the non-latching power semiconductor switching device (42) are connected in a parallel configuration with respect to a current switched by the switching assembly (40 ). The power semiconductor diode (43) is connected in an antiparallel configuration with respect to the current switched by the switching assembly (40). The present disclosure further provides a power semiconductor device (100), a snubber-less power converter and a method for its manufacture.

Description

P2023,0260 WO E / P220263WO01 April 19, 2023 - 1 - Description FULLY CONTROLLABLE, POWER SEMICONDUCTOR SWITCHING ASSEMBLY, POWER SEMICONDUCTOR DEVICE, SNUBBER-LESS POWER CONVERTER AND METHOD FOR MANUFACTURING The present disclosure relates to a fully controllable, power semiconductor switching assembly comprising a latching power semiconductor switching device, a non-latching power semiconductor switching device and a power semiconductor diode. The present disclosure further relates to a power semiconductor device comprising an insulated housing package, a non-latching power semiconductor switching device and a power semiconductor diode. The present invention further relates to a snubber-less power converter and a method for manufacturing a power converter. In the field of power semiconductor devices, turn-off power semiconductor devices such as gate turn-off (GTO) thyristors, in particular integrated gate-commutated thyristors (IGCT), are known. Such power semiconductor devices are useful for various applications, in particular for power converters, such as inverters used, for example, in power transmission networks or electric vehicles. Figure 1 shows a simplified circuit diagram for a first switching circuit 10 for switching high voltages and/or high currents. The circuit 10 shown in Figure 1 is based on two switching elements 11, such as a pair of GTO thyristors, connected to a common, central node 12 to form two halves of a switching bridge. The switching elements 11 of Figure 1 become conductive on application of an appropriate switch-on, typically positive, gate control signal. They remain P2023,0260 WO E / P220263WO01 April 19, 2023 - 2 - conductive as long as sufficient current flows through the GTO thyristors 11 or an appropriate switch-off, typically negative, gate control signal is provided. Turning off of the switching circuit 10 shown in Figure 1 requires the provision of one or more snubber circuits 13 to reduce a rate of a voltage change dv/dt at the switching elements 11 as shown. For example, resistor-capacitor-diode (RCD) dv/dt snubber circuits may be used. In addition, the switching circuit 10 comprises a choke circuit 14 (or di/dt snubber circuit) for limiting a current change di/dt during switch on, and a clamp circuit 15 for clamping an inductive over-voltage created by the choke circuit 14. Its function is to clamp the inductive over- voltage created by the choke circuit 14 to a level that is safe for all components in the switching circuit 10. The choke circuit 14 may comprise, for example, an inductor 16. The clamp circuit 15 may comprise, for example, a diode 17, a resistor 18 and a capacitor 19 as shown. Attention is drawn to the fact that in a typical insulated gate bipolar transistor (IGBT) based switching circuit, no choke circuit and hence no clamp circuit is necessary. Figure 2 shows an improved second switching circuit 20 for switching high voltages and/or high currents. In contrast to the circuit shown in Figure 1, the circuit shown in Figure 2 is based on a pair of two IGCTs 21, which can be turned off without a snubber to reduce the voltage change dv/dt. Two freewheeling diodes 22 are connected in an antiparallel configuration with respect to the corresponding IGCTs 21. When the current across the two IGCTs 21 is switched on, the voltage across the IGCTs 21 collapses in a non-controllable way. In order not to overstress the two freewheeling diodes P2023,0260 WO E / P220263WO01 April 19, 2023 - 3 - 22, a choke circuit 14 is used to limit the rate of rise of the anode current di/dt as described with respect to the first switching circuit 10 of Figure 1. In each case, the inductors 16 provided in the choke circuits 14 are relatively large devices, which in practice determine the overall volume of switching circuits 10 and 20 shown in Figures 1 and 2. Document WO 2021/197774 A1 discloses a power semiconductor device comprising a thyristor and a bipolar junction transistor (BJT) which can avoid some of the disadvantages of known IGCTs and/or switching circuits. In particular, it provides a power semiconductor device with reduced system losses and a reduced need for protective circuits, such as the above-described snubber circuits. Among others, it is an object of the present disclosure to provide components suitable for implementing improved power semiconductor devices that can be integrated with one another and packaged in order to provide simple, yet effective fully controllable, power semiconductor switching assemblies. According to an aspect of the disclosure, a fully controllable, power semiconductor switching assembly is provided. The assembly comprises a first unit, comprising a latching power semiconductor switching device controlled by a first gate terminal, a second unit, comprising a non-latching power semiconductor switching device controlled by a second gate terminal, and a power semiconductor diode. The latching power semiconductor switching device and the non-latching power semiconductor switching device are connected in a parallel configuration with respect to a current switched by P2023,0260 WO E / P220263WO01 April 19, 2023 - 4 - the switching assembly, and the power semiconductor diode is connected in an antiparallel configuration with respect to the current switched by the switching assembly. The disclosed assembly allows the control of a switch-on and switch-off operation of a power semiconductor-based switching circuit wherein a voltage change during switch-on and a current change during switch-off can be controlled by corresponding gate control signals. This enables, among others, a completely snubber-less operation of the fully controllable, power semiconductor switching assembly. To avoid any integration issues, at least at a packaging level, the latching power semiconductor switching device and the non-latching power semiconductor switching device are integrated into two separate units, and each has its own gate terminal. Accordingly, standard packaging and integration techniques for semiconductor power devices having only a single control terminal can be employed. According to different implementations, the power semiconductor diode may be integrated into the first unit, the second unit or a further, third unit. This degree of freedom is based on the insight, that the power semiconductor diode does not need to be controlled by a corresponding gate terminal. If, for example, the power semiconductor diode is integrated into one of the first or second units, no further housing and/or control terminal is required in the overall assembly, which aids integration. According to at least one implementation, a diode structure of the semiconductor diode is integrated into a common housing, for example a housing of the non-latching power semiconductor switching device. P2023,0260 WO E / P220263WO01 April 19, 2023 - 5 - According to at least one implementation, the first unit and/or the second unit may further comprise a gate unit for the latching power semiconductor switching device and/or the non-latching power semiconductor switching device, respectively. For example, the power semiconductor switching devices and the corresponding gate unit may be arranged on a common printed circuit board (PCB). According to at least one implementation, the size of the first unit corresponds to the size of the second unit, and/or the latching power semiconductor switching device is integrated into a first housing, in particular a housing of a first press pack device, the non-latching power semiconductor switching device is integrated into a second housing, in particular a housing of a second press pack device, and the size of the first housing corresponds to the size of the second housing. Using first and second units and/or power semiconductor devices of essentially the same sizes enables integration of different functional units into the larger switching assembly. In particular in the case that the semiconductor power diode is integrated with the non-latching power semiconductor switching device into a common housing, a power density of the first and second unit may become comparable, thus resulting in a symmetric thermal load of both units and power semiconductor devices comprised therein. According to a further aspect of the disclosure, a power semiconductor device is provided, in particular for the switching assembly described above. The power semiconductor device comprises an sealed housing having a first power terminal, a second power terminal and a gate terminal, a non- latching power semiconductor switching device arranged within P2023,0260 WO E / P220263WO01 April 19, 2023 - 6 - the sealed housing and configured to selectively switch a current from the first power terminal to the second power terminal based on a control signal provided via the gate terminal, and a power semiconductor diode arranged within the sealed housing and configured to conduct a current from the second power terminal to the first power terminal. Such a power semiconductor device integrating a non-latching power semiconductor switching device and a power semiconductor diode into a single, sealed housing with a single gate terminal and two power terminals is particularly useful for implementing the non-latching power semiconductor switching device of the second unit of the above assembly. However, it does not integrate the functionality of the latching power semiconductor switching device into the same housing, therefore alleviating the need for a second gate terminal at the same housing. In at least one implementation, the non-latching power semiconductor switching device and the power semiconductor diode are formed as semiconductor structures on or within a common semiconductor substrate. Such a substrate or wafer- level integration of two functional semiconductor structures further aids device integration. In at least one implementation, the power semiconductor device is a press pack device, and the sealed housing comprises a conductive first housing part forming the first power terminal, a conductive second housing part forming the second power terminal, an insulating sidewall separating the first metal housing part and the second metal part, and a bushing arranged at or within the insulating sidewall and configured for providing the control signal to the gate P2023,0260 WO E / P220263WO01 April 19, 2023 - 7 - terminal. Such press pack devices with a bushing configured for providing a single control signal for a single gate terminal can be easily integrated with existing power electronic components. In different implementations, the latching power semiconductor switching device may comprise at least one integrated gate-commutated thyristor (IGCT) structure. Such IGCT structures are particularly useful for switching and holding high currents and/or voltages. Such a structures can be used to control a dv/dt voltage change while switching off the latching power semiconductor switching device. The non-latching power semiconductor switching device power semiconductor device may comprise at least one bipolar junction transistor (BJT) structure or a non-latching thyristor structure. Such structures can be used to control a di/dt current change while switching on the latching power semiconductor switching device. According to a further aspect of the present disclosure, a snubber-less power converter, in particular a power inverter, comprising a fully controllable, power semiconductor switching assembly as detailed above, is provided. The advantages of the provided power converter correspond to those detailed above with regard to the switching assembly and power semiconductor device, respectively. In particular, such a power converter does not need an internal or external snubber circuit, thus alleviating the need to provide a relatively bulky additional circuit component, such as an inductor or other throttle component. P2023,0260 WO E / P220263WO01 April 19, 2023 - 8 - In at least one implementation, the power converter further comprises a control circuit configured to provide at least one control signal for controlling the non-latching power semiconductor switching device and/or the latching power semiconductor switching device. By also providing a corresponding control circuit, a fully integrated switching device and/or power converter may be realized. According to different implementations, the control circuit may be connected directly or indirectly to the first unit and the second unit and configured to provide a first control signal to the first gate terminal and a second control signal to the second terminal. In particular, in the case of an indirect connection, a master control unit forming a part of one of the two units may be used to indirectly provide a control signal to the respective other unit, for example to a slave control unit of the respective other unit. In at least one implementation, the controller may be specifically configured to impress a positive gate current between a gate terminal and a cathode terminal of the non- latching power semiconductor switching device when the switching assembly is switched on. Moreover, it may trigger a gate of the latching power semiconductor switching device and reduce the positive gate current between the gate terminal and the cathode terminal of the non-latching power semiconductor switching device to zero after a voltage between an anode and a gate terminal of the latching power semiconductor switching device has collapsed. Moreover, it may impress a negative gate current on the gate terminal of the latching power semiconductor switching device and, optionally, on the gate terminal of the non-latching power P2023,0260 WO E / P220263WO01 April 19, 2023 - 9 - semiconductor switching device when the switching assembly is switched off. The above operations enforce a safe activation or switching- on and deactivation or switching-off of the switching assembly and therefore allow a snubber-less operation of the power converter. According to a further aspect of the present disclosure, a method for manufacturing a power converter is provided. The manufacturing method comprises the steps of: - providing a first unit, comprising a latching power semiconductor switching device controlled by a first gate terminal; - providing a second unit, comprising a non-latching power semiconductor switching device controlled by a second gate terminal; - providing, within the first unit, the second unit or within a separate third unit, a power semiconductor diode; - connecting the latching power semiconductor switching device and the non-latching power semiconductor switching device in a parallel configuration with respect to a current switched by the power converter; and - connecting the power semiconductor diode in an antiparallel configuration with respect to the current switched by the power converter. The above steps essentially enable manufacturing of a power converter as detailed above. P2023,0260 WO E / P220263WO01 April 19, 2023 - 10 - The present disclosure provides several aspects of a power semiconductor switching assembly. Every feature described with respect to one of the aspects is also disclosed herein with respect to the other aspect, even if the respective feature is not explicitly mentioned in the context of the specific aspect. The accompanying figures are included to provide a further understanding of the disclosed devices, systems and methods. In the figures, elements of the same structure and/or functionality may be referenced by the same reference signs. It is to be understood that the embodiments shown in the figures are illustrative representations and are not necessarily drawn to scale. Figures 1 and 2 show two different semiconductor switching circuits, each comprising a snubber circuit. Figure 3 shows a snubber-less semiconductor switching circuit. Figure 4 shows a switching assembly comprising three power semiconductor structures and corresponding devices. Figures 5 to 7 show different implementations of the switching assembly according to Figure 4 based on three and two semiconductor devices functional units, respectively. Figures 8 to 11 show different embodiments of inverter circuits comprising an inverter controller and a power semiconductor switching assembly. P2023,0260 WO E / P220263WO01 April 19, 2023 - 11 - Figure 12 shows a perspective view of a unit comprising a power semiconductor switching device and a corresponding gate unit. Figure 13 shows a cross-section through a power semiconductor switching device. Figure 14 shows a comparison of substrate areas of two different power semiconductor switching devices. Figure 15 shows steps of a method for manufacturing a power converter. Figure 3 shows a third switching circuit 30, which can be safely switched on and off without the provision of a snubber circuit. This is enabled by the use of two improved power semiconductor switching elements 31, that can be switched on and off in a controlled manner, similar to an insulated gate bipolar transistor (IGBT). The power semiconductor switching element 31 comprises a fully controllable integrated gate controlled thyristor (FCGCT) 32, and a freewheeling diode 22. A FCGCT 32 may be realized by integrating two functional structures, such as an IGCT structure, and non-latching switching structure, such as a BJT structure, on a common substrate forming a single power semiconductor device. Optionally, a diode structure for the freewheeling diode 22 may also be formed on the common substrate. During switch-on, the current change di/dt of the switching element 31 can be controlled by a driving a gate of the BJT structure of the FCGCT 32. Similarly, during switch-off the voltage change dv/dt of the switching element 31 can also be controlled by driving a gate of the IGCT structure of the P2023,0260 WO E / P220263WO01 April 19, 2023 - 12 - FCGCT 32. While such an FCGCT based switching element 31 may be desirable for the reasons indicated above with regard to its switching behaviour, the provision of two separate gate terminals results in a relatively complicated housing, once the FCGCT 32 is installed in a larger assembly, such as a converter or similar power switching circuit. According to different embodiments of the present disclosure, this and other issues are addressed by packaging at least some of the structures for implementing an FCGCT 32 not into a single chip or device, but into two or three separate chips or devices, wherein each device or chip only has a single control terminal. Figure 4 shows a general switching assembly 40 according to the present disclosure, which implements a functionality corresponding to that of the improved power semiconductor switching element 31. The switching assembly 40 comprises an IGCT structure 46, a BJT structure 47 and a diode structure 48. In contrast to an improved power semiconductor switching element 31 based on an integrated FCGCT 32, each of the IGCT structure 46, the BJT structure 47 and the diode structure 48 may be integrated into a separate power semiconductor device. As shown in Figure 4, these three devices are referred to as “thyristor device” or latching power semiconductor switching device 41, as “transistor device” or non-latching power semiconductor switching device 42 and power semiconductor diode 43 in the context of the present disclosure. Each of the two switching devices 41 and 42 has its own gate terminal 44 and 45, respectively. In general, such a switching assembly 40 may be integrated into two or three units, as further detailed below with P2023,0260 WO E / P220263WO01 April 19, 2023 - 13 - respect to Figures 5 to 7. Therein, the term “unit” may refer to a physically separate unit, such as a complete integrated circuit chip or device, or a number of circuit chips or devices arranged on a common carrier substrate, such as a PCB, and/or integrated into a common housing. The term “device”, in particular “semiconductor switching device”, may refer to the unit itself, or one of its components. For example, a first unit may refer to a first PCB and the latching power semiconductor switching device may be a first press-pack device arranged on or permanently connected to the first PCB. Similarly, a second unit may refer to a second PCB and the non-latching power semiconductor switching device may be a second press-pack device arranged on or permanently connected to the second PCB. In contrast, the term “structure”, in particular, the terms “IGCT structure”, “thyristor structure”, “BJT structure”, “transistor structure” and “diode structure” typically refer to an internal part of a larger device or unit. For example, an IGCT structure and a diode structure may be integrally formed within or on top of a substrate of a first semiconductor power device, such as the first press-pack. Similarly, a BJT structure and a diode structure may be integrally formed within or on top of a substrate of a second semiconductor power device, such as the second press-pack device. In the configuration shown in Figure 5, a total of three units 51 to 53 are provided. The first unit 51 comprises the latching power semiconductor switching device 41 and a corresponding first gate control unit 54. The second unit 52 comprises the non-latching power semiconductor switching device 42 and a corresponding second gate unit 55. The third unit 53 comprises the power semiconductor diode 43. P2023,0260 WO E / P220263WO01 April 19, 2023 - 14 - As can be seen in Figure 5, each one of the power semiconductor devices 41 to 43 comprises a first power terminal 56 and a second power terminal 57. In the described embodiment, the latching power semiconductor switching device 41 is implemented by an IGCT structure 46. In this case, the first power terminal 56 corresponds to the anode and the second power terminal 57 corresponds to the cathode of the thyristor structure contained therein. The non-latching power semiconductor switching device 42 may be implemented in the form of a BJT structure 47 or a non- latching thyristor structure. For example, the non-latching power semiconductor switching device 42 may comprise a quenched or not self-sustaining thyristor structure, which turns-off automatically when a reasonable gate current through its gate electrode is turned off. In other words, the non-latching thyristor structure may have such a low product of the current gains that it does not latch in normal operation. In particular, the thyristor structure is designed such that it is not self-sustaining, e.g. it turns-off automatically when the gate current through the assigned gate electrode is turned off. In the case of a BJT structure 47, the first power terminal 56 corresponds to a collector of the BJT or an anode of the non-latching thyristor structure. The second power terminal 57 corresponds to an emitter of the BJT structure 47 or a cathode of the non-latching thyristor structure. That is to say, the first, latching power semiconductor switching device 41 and the second, non-latching power semiconductor switching device 42 are configured in a parallel configuration with regard to a current switched by the switching assembly 40. P2023,0260 WO E / P220263WO01 April 19, 2023 - 15 - In contrast an anode of the power semiconductor diode 43 or diode structure 48 contained therein is connected to the second power terminal 57 and its cathode is connected to the first power terminal 56. That is to say, the power semiconductor diode 43 is configured in an antiparallel configuration with respect to the power semiconductor switching devices 41 and 42. Thus, in operation, the power semiconductor diode 43 acts as a freewheeling diode. The first and second gate units 54 and 55 are connected to the first gate terminal 44 of the latching power semiconductor switching device 41 and the second gate terminal 45 of the non-latching power semiconductor switching device 42. They are provided to provide the appropriate control signals to the respective gate terminals for safely switching off, in the case of the first gate unit 54, and switching on, in the case of the second gate unit 55 of the switching assembly 40. In particular, the switching assembly 40 is operated as described below. At turn-on, a gate current is impressed between the second gate terminal 45 and the second power terminal 57 of the non-latching power semiconductor switching device 42. The current change di/dt of the current, in particular the anode current in the case that a thyristor structure is used as a non-latching power semiconductor switching device 41, is controlled by the current change di/dt of the impressed gate current. In case of a BJT structure, the operation is principally the same. However, a higher gate current is used to drive a BJT structure. At this stage, the second gate terminal 44 of the latching switching device 41 is kept in the off-state. P2023,0260 WO E / P220263WO01 April 19, 2023 - 16 - As soon as the anode/cathode voltage across the latching power semiconductor switching device 41 has collapsed, for example typically to 25% of a DC link voltage switch by the switching assembly 40, the gate of the latching power semiconductor switching device 41 is triggered by a corresponding gate current provided to the first gate terminal 44 from the first gate unit 54. The gate current of the non-latching power semiconductor switching device 42 is ramped down to zero again. Accordingly, the current flowing through the switching assembly 40 commutates from the non- latching power semiconductor switching device 42 into the latching power semiconductor switching device 41. Once the current flows through the latching power semiconductor switching device 41, the gate current of the latching power semiconductor switching device 41 may also be deactivated. When the switching assembly 40 should be turned off, a negative gate current is impressed in the gate IGCT structure 46 of the latching power semiconductor switching device 41 by means of the first gate unit 54 and the first gate contact 44. Optionally, a negative gate current may also be impressed in the non-latching semiconductor switching device 42 by means of the second control unit 55 and the second gate terminal 45. Figure 6 shows an alternative implementation of the switching assembly 40 in accordance with an embodiment of the disclosure. Contrary to the configuration detailed above with regard to Figure 5, only two units 61 and 62 are provided in the configuration shown Figure 6. Each one of the units 61 and 62 comprises a single power semiconductor switching device, i.e. a latching power semiconductor switching device 41, and a non-latching power semiconductor switching device P2023,0260 WO E / P220263WO01 April 19, 2023 - 17 - 42. In addition, the first unit 61 further comprises a diode 48 structure, which is integrated directly into the latching power semiconductor switching device 41. In other words, the semiconductor switching device 41 of the first unit 61 comprises the IGCT structure 46 and the diode structure 48. The non-latching power semiconductor switching device 42 only comprises a transistor structure, such as a BJT structure 47 or a quenched IGCT, as detailed above with respect to the second unit 52. The various terminals and their interconnections correspond to the configuration shown in Figure 5 and are not described again for the sake of brevity. Attention is drawn to the fact that, despite the integration of the diode structure 48 into the first power semiconductor switching device 41, only a single gate terminal 44 needs to be provided with respect to the latching power semiconductor switching device 41. Accordingly, each one of the first and second power semiconductor switching devices 41 and 42 can be integrated into a conventional housing, such as a housing of a press pack device with a single control gate terminal. Figure 7 shows a further configuration of a switching assembly 40 which is similar to the configuration shown in Figure 6 in that it also comprises only two units, i.e. a first unit 71 and a second unit 72. Contrary to the configuration shown with regard to Figure 6, a diode structure 48 is integrated into the non-latching power semiconductor switching device 42. In contrast, the non- latching power semiconductor switching device 41 only comprises an IGCT structure 46. Other aspects of the switching assembly 40 of Figure 7 correspond to those of corresponding aspects of Figures 5 and 6 and are not described again for the sake of brevity. P2023,0260 WO E / P220263WO01 April 19, 2023 - 18 - As detailed above, the integration of the diode structure 48 into the non-latching power semiconductor switching device 42 does not require the provision of an additional gate terminal. Accordingly, the non-latching power semiconductor switching device 42 also comprises only a single gate terminal 45. Moreover, as detailed with regard to Figure 14 below, this particular configuration has the advantage that it enables a thermal balancing of the two power semiconductor switching devices 41 and 42. Figures 8 to 11 show different implementations of parts of a converter circuit 80, in particular a part of an inverter. In the embodiments shown in Figures 8 to 11, a switching assembly 40 comprising three separate power semiconductor devices 41 to 43 are shown. However, the control signals described with respect to Figures 8 to 11 may equally be applied in one of the two unit configurations of the switching assemblies 40 shown in Figures 6 and 7. In particular, in the converter circuit 80 shown in Figure 8, an inverter control circuit 81 provides two different control signals directly to the first gate unit 54 and the second gate unit 55, respectively. In contrast, in the configuration shown in Figure 9, the inverter controller 81 only provides a single control signal directly to the first gate unit 54. The gate unit 54 is configured as a master controller and generates a corresponding second control signal for the second gate unit 55, which is configured as a slave controller. Figure 10 shows a complementary configuration, wherein the controller 81 directly provides a control signal to the second gate unit 55. The second gate unit 55 is configured as a master controller and provides a P2023,0260 WO E / P220263WO01 April 19, 2023 - 19 - corresponding control signal to the first gate unit 54 configured as a slave controller. In the configuration of Figure 11, only a single combined gate unit 82 is provided and controlled directly by the control circuit 81. The combined gate unit 82 provides a first control signal to the first gate terminal 44 of the latching power semiconductor switching device 41 and a second control signal to the second gate terminal 45 of the non- latching power semiconductor switching device 42. The combined gate unit 82 may be part, for example, of the first unit 51, 61 or 71 or the second unit 52, 62 or 72. Alternatively, the combined gate unit 82 may be part of a separate entity, e.g. a PCB with the inverter controller 81. Figure 12 shows one switching unit 90 of at least two units of a switching assembly 40. In particular, the switching unit 90 shown in Figure 12 may correspond to the second unit 72 shown in Figure 7. As shown in Figure 12, the switching unit 90 comprises a printed circuit board (PCB) 91, a first housing 92 covering a part of the PCB 91, and a press-pack device 94 placed on the PCB 91 and having a second housing 93. The first housing 92 may be, for example, an open metal housing, and the second housing 93 may be, for example, a sealed high-voltage proofed housing, as further detailed below. In the described embodiment, the press-pack device 94 corresponds to the non-latching power semiconductor switching device 42 above. The first and second power terminals 56 and 57 of the non-latching power semiconductor switching device 42 are formed on the upper and lower side of the press pack P2023,0260 WO E / P220263WO01 April 19, 2023 - 20 - device 94. The gate terminal 45 as well as an auxiliary contact connected to the second power terminal 57 of the non- latching power semiconductor switching device 42 (both not visible in Figure 12) are electrically connected to respective control terminals of the PCB 91. Circuitry for implementing the second gate unit 55 is arranged within the first housing 92. Optionally, all or parts of the circuitry required to implement the inverter controller 81 or the first gate unit 54 may also be arranged on the PCB 91. Figure 13 shows a cross-section through a power semiconductor device 100. In the described embodiment, the power semiconductor device 100 implements a non-latching power semiconductor switching device 42 with an integrated semiconductor power diode 43. Figure 13 specifically shows the internal setup of a press pack device, such as the press- pack device 94 of Figure 12. As can be seen in the cross-section of Figure 13, a housing of the power semiconductor device 100 comprises a first, in Figure 13 lower, housing part 101, a second, in Figure 13 upper, housing part 102 as well as one or more insulating sidewalls 103. A part of the second housing part 102 forms an auxiliary cathode contact 108. The first and second housing parts 101 and 102 are formed from a material with good conductive properties, such as copper or another suitable metal, and form external parts of power terminals 56 and 57 of both the power semiconductor switching device 42 and the integrated semiconductor power diode 43. They are spaced apart by the insulating sidewalls 103. For example, the insulating sidewall 103 may take the form of a hollow cylinder made from a ceramic or other insulating material. As also shown in Figure 13, the outer surface of the insulating P2023,0260 WO E / P220263WO01 April 19, 2023 - 21 - sidewall 103 may have an integrated shed structure 104 to increase the creep distance between the first and second housing parts 101 and 102. The insulating sidewall 103 further comprises a bushing 105 for passage of a gate lead 106. Together the housing parts 101 to 103 and 105 form a hermetically sealed cavity 107 for one or more electronic components of the press-pack device. In the depicted embodiment, the electronic components take the form of semiconductor structures formed within a semiconductor substrate 110, such as a semiconductor wafer. The substrate 110 is held in place by a wafer edge insulation part 111. The wafer edge insulation part 111 may be made of, for example, silicon. As can be seen in the cross-section of Figure 13, the semiconductor substrate 110 has different functional areas associated with the different semiconductor structures formed therein. Starting from the centre and going outwards, the semiconductor substrate 110 comprises a thyristor gate contact region 112, a turn-on thyristor part 113 and a diode part 114. The lower main surface of the turn- on thyristor part 113 corresponding to the anode of a non- latching thyristor structure and the diode part 114 corresponding to the cathode of the diode structure are in direct contact with a first internal part 116 of the first power terminal 56, which may be formed from molybdenum. The upper surface of the turn-on thyristor part 113 corresponding to the cathode of the non-latching thyristor structure and the upper surface of the diode part 114 corresponding the anode of a diode structure are in direct contact with a second internal part 117 of the second power terminal 57 formed, for example, from molybdenum. The thyristor gate contact region 112 is isolated from the two internal parts 116 and 117 and is connected to the gate lead 106. P2023,0260 WO E / P220263WO01 April 19, 2023 - 22 - The left-hand side of Figure 14 shows a schematic top view of the semiconductor substrate 110 of Figure 13. The thyristor gate contact region 112 and the turn-on thyristor part 113 of the semiconductor substrate 110 are used to implement a not self-sustaining thyristor structure 118 of the non-latching power semiconductor switching device 42. Although a not self- sustaining thyristor structure 118 is indicated in Figures 13 and 14, a corresponding BJT structure 47 may be implemented as detailed above with respect to Figures 4 to 11. The outer part of the semiconductor substrate 110 is used to implement a diode structure 48 of the non-latching power semiconductor switching device 42. The right-hand part of Figure 14 shows another semiconductor substrate 120, which is used to implement the latching power semiconductor switching device 41 comprising an IGCT structure 46. It comprises a central thyristor gate contact region 121 and a hold thyristor part 122 surrounding it. By comparing the top views of Figure 14, it becomes clear that more surface area is available for implementing the self- sustaining IGCT structure 46 of latching power semiconductor switching device 41 than the not self-sustaining thyristor structure of the of non-latching power semiconductor switching device 42. This is advantageous for thermal or load balancing, as, on average, IGCT structure 46 will carry a larger part of the current switched by a corresponding semiconductor power switching assembly 30. Accordingly, a thermal balancing between the two devices 41 and 42 can be achieved, if the same housing type or at least a housing type with a similar size is used for encapsulating the first and second semiconductor switching devices 41 and 42. P2023,0260 WO E / P220263WO01 April 19, 2023 - 23 - Further details on suitable IGCT structures, BJT structures, and diode structures and their manufacturing and integration may be found in WO 2021/197774 A1, which is incorporated by reference herein. Further details on suitable self-sustaining thyristor structures, not self-sustaining thyristor structure, and diode structures and their manufacturing and integration may also be found in European Patent Application 21212227.9, which is incorporated by reference herein. Figure 15 shows, in a schematic flowchart, steps S1 to S5 used to manufacture a power converter, such as the converter circuit 80. In step S1, a first unit having a first gate terminal is provided. As detailed with regard to the various embodiments above, the first unit comprises at least a latching power semiconductor switching device, and may also comprise further components, such as a diode structure or device and/or a first gate unit. In step S2, a second unit having a second gate terminal is provided. As detailed with regard to the various embodiments above, the second unit comprises at least a non-latching power semiconductor switching device and may comprise further components, such as a diode structure or device and/or a second gate unit. In particular, in the case that the first unit does not comprise a diode structure or device, the second unit may comprise the diode structure or device. In a step S3, a power semiconductor diode provided. As detailed above, this may be a diode structure or device forming part of the first unit or the second unit. P2023,0260 WO E / P220263WO01 April 19, 2023 - 24 - Alternatively, a separate third unit may be provided in step S3 which comprises a diode structure or device. In a step S4, the latching power semiconductor switching device comprised in the first unit and the non-latching power semiconductor switching device comprised in the second unit are connected in a parallel configuration with respect to a current switched by the power converter. For example, this may be achieved by placing corresponding conductive housing parts of corresponding press pack devices between common bus bars. In a step S5, the power semiconductor diode is connected in an antiparallel configuration with respect to the current switched by the power converter. In the case that the power semiconductor diode is formed in a separate unit, such as the third unit, this may be achieved by placing the third unit in the opposite direction with regard to the first and second units. In the case that the power semiconductor device is formed as an integrated part of either the first or the second unit, this will typically be achieved at a design stage, by arranging an anode contact of a diode structure on the same surface of a semiconductor substrate as the cathode part of a corresponding thyristor structure or an emitter of a corresponding transistor structure. Equally, the cathode of the diode structure may be formed on the same surface as the anode part of a thyristor structure or collector of a corresponding transistor structure. The embodiments shown in Figures 1 to 15 as stated represent exemplary embodiments of improved power semiconductor switching arrangements, power semiconductor devices, converter circuits and methods for their manufacturing. P2023,0260 WO E / P220263WO01 April 19, 2023 - 25 - Therefore, they do not constitute a complete list of all embodiments according to the improved devices, systems and methods. Actual devices, arrangements and methods may vary from the embodiments shown in terms of their relative arrangements, specific components and signals provided for their control, for example.

P2023,0260 WO E / P220263WO01 April 19, 2023 - 26 - Reference Signs 10 (first) switching circuit 11 switching element 12 central node 13 snubber circuit 14 choke circuit 15 clamp circuit 16 inductor17 diode 18 resistor 19 capacitor 20 (second) switching circuit 21 integrated gate-commutated thyristor (IGCT) 22 freewheeling diode 30 (third) switching circuit 31 power semiconductor switching element 32 fully controllable, gate-commutated thyristor (FCGCT) 40 switching assembly 41 (latching) power semiconductor switching device 42 (non-latching) power semiconductor switching device 43 power semiconductor diode 44 first gate terminal 45 second gate terminal 46 IGCT structure 47 BJT structure 48 diode structure 51 first unit 52 second unit 53 third unit 54 first gate unit 55 second gate unit 56 first power terminal 57 second power terminal 61 first unit 62 second unit 71 first unit 72 second unit 80 converter circuit 81 control circuit 82 combined gate unit 90 switching unit 91 printed circuit board (PCB) P2023,0260 WO E / P220263WO01 April 19, 2023 - 27 - 92 first housing 93 second housing 94 press-pack device 100 power semiconductor device 101 first housing part 102 second housing part 103 insulating sidewall 104 shed structure 105 bushing 106 gate lead 107 cavity 108 auxiliary cathode contact 110 semiconductor substrate 111 wafer edge insulation part 112 thyristor gate contact region 113 turn-on thyristor part 114 diode part 116 first internal part (of first power terminal) 117 second internal part (of second power terminal) 118 not self-sustaining thyristor structure 120 (further) semiconductor substrate 121 thyristor gate contact region 122 hold thyristor part

Claims

P2023,0260 WO E / P220263WO01 April 19, 2023 - 28 - Claims 1. A fully controllable, power semiconductor switching assembly (40), comprising: - a first unit (51, 61, 71) , comprising a latching power semiconductor switching device (41) controlled by a first gate terminal (44); - a second unit (52, 62, 72), comprising a non-latching power semiconductor switching device (42) controlled by a second gate terminal (45); and - a power semiconductor diode (43); - wherein the latching power semiconductor switching device (41) and the non-latching power semiconductor switching device (42) are connected in a parallel configuration with respect to a current switched by the switching assembly (40), and the power semiconductor diode (43) is connected in an antiparallel configuration with respect to the current switched by the switching assembly (40). 2. The switching assembly (40) of claim 1, wherein the semiconductor diode (43) is integrated into the second unit (72), in particular as a diode structure (48) integrated into a housing of the non-latching power semiconductor switching device (42). 3. The switching assembly (40) of claim 1, wherein - the semiconductor diode (43) is integrated into the first unit (61), in particular as a diode structure (48) integrated into a housing for the latching power semiconductor switching device (41); or - the switch assembly further comprises a third unit (53) comprising the power semiconductor diode (43), in P2023,0260 WO E / P220263WO01 April 19, 2023 - 29 - particular as a diode structure (48) integrated into a separate housing. 4. The switching assembly (40) of any one of claims 1 to 3, wherein - the first unit (51, 61, 71) further comprises a combined gate unit (82) for the latching power semiconductor switching device (41) and the non-latching power semiconductor switching device (42); - the second unit (52, 62, 72) further comprises a combined gate unit (82) for the latching power semiconductor switching device (41) and the non-latching power semiconductor switching device (42); or - the first unit (51, 61, 71) further comprises a first gate unit (54) for the latching power semiconductor switching device (41) and the second unit (52, 62, 72) further comprises a second gate unit (55) for the non- latching power semiconductor switching device (42). 5. The switching assembly (40) of any one of claims 1 to 4, wherein - a size of the first unit (51, 61, 71) corresponds to a size of the second unit (52, 62, 72); and/or - the latching power semiconductor switching device (41) is integrated into a first housing, in particular a housing of a first press pack device, the non-latching power semiconductor switching device (42) is integrated into a second housing (93), in particular a housing (103) of a second press pack device (94), and the size of the first housing corresponds to the size of the second housing (93). P2023,0260 WO E / P220263WO01 April 19, 2023 - 30 - 6. The switching assembly (40) of any one of claims 1 to 5, wherein the latching power semiconductor switching device (41) comprises at least one integrated gate-commutated thyristor, IGCT, structure (46). 7. A power semiconductor device (100), in particular for a switching assembly (40) according to any one of claims 1 to 6, the power semiconductor device (100) comprising: - a sealed housing (93) having a first power terminal (56), a second power terminal (57) and a gate terminal (45); - a non-latching power semiconductor switching device (42) arranged within the sealed housing (93) and configured to selective switch a current from the first power terminal (56) to the second power terminal (57) based on a control signal provided via the gate terminal (45); and - a power semiconductor diode (43) arranged within the sealed housing (93) and configured to conduct a current from the second power terminal (57) to the first power terminal (56). 8. The power semiconductor device (100) of claim 7, wherein the non-latching power semiconductor switching device (42) and the power semiconductor diode (43) are formed as semiconductor structures (47, 48, 118) on or within a common semiconductor substrate (110). 9. The power semiconductor device (100) of claim 7 or 8, wherein the power semiconductor device (100) is a press pack device (94), and the sealed housing (93) comprises: - a conductive first housing part (101) forming at least part of the first power terminal (56); P2023,0260 WO E / P220263WO01 April 19, 2023 - 31 - - a conductive second housing part (102) forming at least part of the second power terminal (57); - an insulating sidewall (103) separating the first housing part (101) and the second housing part (102); and - a bushing (105) arranged at or within the insulating sidewall (103) and configured for providing the control signal to the gate terminal (45). 10. The switching assembly (40) of any one of claims 1 to 6 or the power semiconductor device (100) of any one of claims 7 to 9, wherein - the non-latching power semiconductor switching device (42) comprises a bipolar transistor structure (47); or - the non-latching power semiconductor switching device (42) comprises a not self-sustaining thyristor structure (118). 11. A snubber-less power converter, in particular a power inverter, comprising a fully controllable, power semiconductor switching assembly (40) according to any one of claims 1 to 6. 12. The snubber-less power converter of claim 11, further comprising: - a control circuit (81) configured to provide at least one control signal for controlling the non-latching power semiconductor switching device (41) and/or the latching power semiconductor switching device (42). 13. The snubber-less power converter of claim 12, wherein - the control circuit (81) is connected to both the first unit (51, 61, 71) and the second unit (52, 62, 72) and P2023,0260 WO E / P220263WO01 April 19, 2023 - 32 - configured to provide a first control signal to a first gate unit (54) associated with the first gate terminal (44) and a second control signal to a second gate unit (55) associated with the second gate terminal (45); - the control circuit (81) is connected to the first unit (51, 61, 71) and configured to provide a first control signal to a master control unit associated with the first gate terminal (44), in particular the combined gate unit (82) or the first gate unit (54) according to claim 4, wherein the master control unit is configured to provide a second control signal to the second unit (52, 62, 72); or - the control circuit (81) is connected to the second unit (52, 62, 72) and configured to provide a second control signal to a master control unit associated with the second gate terminal (45), in particular the combined gate unit (82) or the second gate unit (55) according to claim 4, wherein the master control unit is configured to provide a first control signal to the first unit (51, 61, 71). 14. The snubber-less power converter of claim 12 or 13, wherein the controller (81) is specifically configured to - when the switching assembly (40) is switched on, impress a positive gate current between a gate terminal (45) and a cathode terminal of the non-latching power semiconductor switching device (42); - after a voltage between an anode and a gate terminal (44) of the latching power semiconductor switching device (41) has collapsed, trigger a gate of the latching power semiconductor switching device (41) and reduce the positive gate current between the gate terminal (45) and the cathode terminal of the non- P2023,0260 WO E / P220263WO01 April 19, 2023 - 33 - latching power semiconductor switching device (42) to zero; and - when the switching assembly (40) is switched off, impress a negative gate current on the gate terminal (44) of the latching power semiconductor switching device (41), and, optionally, on the gate terminal (45) of the non-latching power semiconductor switching device (42). 15. A method for manufacturing a power converter, in particular the snubber-less power converter of any one of claims 11 to 14, comprising: - providing a first unit (51, 61, 71), comprising a latching power semiconductor switching device (41) controlled by a first gate terminal (44); - providing a second unit (52, 62, 72), comprising a non- latching power semiconductor switching device (42) controlled by a second gate terminal (45); - providing, within the first unit (61), the second unit (72) or within a separate third unit (53), a power semiconductor diode (43); - connecting the latching power semiconductor switching device (41) and the non-latching power semiconductor switching device (42) in a parallel configuration with respect to a current switched by the power converter; and - connecting the power semiconductor diode (43) in an antiparallel configuration with respect to the current switched by the power converter.