EP4315578A1

EP4315578A1 - Bidirectional dc-to-dc converter and operating method

Info

Publication number: EP4315578A1
Application number: EP22719516.1A
Authority: EP
Inventors: Johannes Visosky
Original assignee: Keba Industrial Automation Germany GmbH
Current assignee: Keba Industrial Automation Germany GmbH
Priority date: 2021-03-31
Filing date: 2022-03-25
Publication date: 2024-02-07
Also published as: DE102021108278A1; WO2022207513A1

Abstract

The invention relates to a bidirectional DC-to-DC converter (10, 20, 30, 40, 50) for converting a DC link voltage (Uzk) on the input side into an output voltage (Uout) and vice versa, in particular for a transformerless charging station or for an energy store for temporarily storing energy from a servo drive. The DC-to-DC converter (10, 20, 30, 40, 50) comprises a series circuit composed of two half-bridges (H1, H2) which include four semiconductor switches (T1, T2, T3, T4) and each of which is connected between a DC link voltage bus (ZK+, ZK-) having a DC link voltage (Uzk) on the input side and a medium voltage bus (ZM) having a symmetric, in particular a balanced-to-earth, medium voltage (UZK+, UZK-). Each center tap (M1, M2) of the half-bridge (H1, H2) cooperates with a storage choke (Ls+, Ls-) and a storage capacitor (CS) in such a way that two bidirectional synchronous converters are connected in series. According to the invention, at least one ring-around capacitor (CZVS, CZVS+, CZVS-, CZVS++, CZVS+-, CZVS-+, CZVS--) is connected to the center tap (M1, M2) of each half-bridge (H1, H2).

Description

Bidirectional DC/DC converter and method of operation

The invention relates to a bidirectional DC/DC converter for converting an input-side intermediate circuit voltage U _Zk into an output voltage U _0ut and vice versa, in particular for use in a transformerless charging station, or for an energy store for temporarily storing energy from a servo drive.

STATE OF THE ART

A DC/DC converter, which is also referred to as a DC voltage converter, enables a direct voltage (DC voltage) on the input side or a direct current (DC voltage) supplied to the intermediate circuit to be converted into an output voltage with a higher, lower or an inverted voltage level at the output U _out . This is implemented using semiconductor switches and one or more energy stores such as inductors or capacitors. DC voltage converters of this type are also referred to as DC converters.

The DC/DC converter considered here works bidirectionally, i. H. an energy flow can be in both directions from entrance to exit, and/or from exit to entrance. In particular, by selecting the duty cycle of the semiconductor switches, the flow of current can be routed both from the source to the load and from the load to the source. The level of the output voltage can be higher or lower than the respective input voltage depending on the selection of the input and the output. The DC/DC converter considered here is based on the principle of the synchronous converter, which is also referred to as a DC voltage transformer. By cyclically switching semiconductor switches, energy is stored in a magnetic field of a storage choke, which can be cyclically charged or discharged. In particular, MOSFETs, IGBTs or other high-voltage semiconductor switches are used as semiconductor switches. In principle, the DC/DC converter under consideration can be viewed as a combination of a step-up and a step-down converter. The level of the output voltage is determined by the switch-on and switch-off time of the semiconductor switch, and thus by the duty cycle.

1 shows such a DC/DC converter from the prior art. The voltage of an intermediate circuit U _Zk is via a stabilization capacitor, which also referred to as intermediate circuit capacitor C _Zk , stabilized. Via a transistor half-bridge, which includes two transistors T1 and T2, an output voltage U _out is provided at a center tap via the storage inductor L _s across the storage capacitor C _s at the output potential taps DC+ and DC-. The two transistors T1, T2 are switched in push-pull, ie when switch T1 conducts, switch T2 opens and vice versa. In the topology shown in FIG. 1, the DC/DC converter 12 operates as a step-down converter with respect to the input voltage U _Zk for the reduced output voltage U _out . In a reverse flow of current, a lower input voltage L _t can be bidirectionally converted into a higher output voltage U _{zk using the step} -up converter principle. Area of application can be the loading operation of drive technology energy converters, in particular DC charging stations for charging or discharging electrical energy storage devices, in particular batteries, bidirectionally and without transformers, ie without an AC voltage transformer, with a high level of efficiency being achievable.

Based on the synchronous converter shown in FIG. 1, alternative topologies are known from the prior art, in particular topologies of DC/DC converters that use a transformer-based conversion of the DC voltages by means of an interposed inverter.

For example, DE 10 2018 206 388 A1 shows a DC/DC converter that includes an oscillating circuit and a transformer, with the transformer being supplied with alternating current by a half bridge and a downstream rectifier providing a DC voltage on the output side. However, such a topology cannot be operated bidirectionally.

In addition, EP 3 255 772 A1 shows a DC/DC converter which also supplies current to a transformer by means of an inverter bridge, with the AC voltage on the secondary side being able to be DC-converted again via a half or full bridge, also a multi-stage bridge. Although such DC/DC converters can work bidirectionally, since they use controllable half or full bridges on both sides of the transformer, the energy flow takes place via a transformer operated with alternating current, with corresponding energy losses and component costs.

Furthermore, WO 2012/116953 A1 shows a DC / DC converter, which is also based on a transformer coupling between the input and output side, and uses an inverter bridge on the one hand and a three-point half bridge on the other in order to be able to transmit energy bidirectionally.

US Pat. No. 1,0,516,365 B1 considers a 3-phase grid feed circuit of a renewable DC energy source into a three-phase supply grid, with energy being converted from the DC energy source into an AC grid via a three-stage converter. The grid feed circuit includes a DC low-voltage grid to supply the controller via a DC/DC converter. The DC/DC converter can be designed as a bidirectional converter stage with an additional DC converter. Explicit ZVS capacitors are absent and the chokes shown share a common iron yoke and are wound in opposite directions. The mains feed circuit includes a stabilizing upstream circuit for the DC/DC converter, with a voltage reduction from VDC to Va being achieved by the switching ratio of the semiconductor switches. The inductances of the inductive filter stage are used to filter harmonics. A function of a DC chopper or synchronous converter is neither fulfilled nor suggested by the stabilizing upstream circuit, because this is reserved for an auxiliary converter that is controlled by a system controller.

In addition, US 2016/0 329 811 A1 describes a DC/DC converter comprising a plurality of multi-stage multi-quadrant converters. Each converter includes a 3-stage bridge converter with an output-side inductance device that includes two chokes in the two output lines. Several of these bridge converter inductance devices are connected in parallel and are provided with a filter capacitance on the output side. The inductance device with the two inductances, preferably coupled inductances, only serve to smooth the current. At no point is a ZVS switching functionality or separate ZVS capacitances mentioned, nor is any indication given that filter inductances and filter capacitances could be used as energy stores for a step-up or step-down converter configuration.

WO 2020/256 690 A1 relates to a multi-stage DC/DC converter. This is used for bidirectional coupling of a battery to a DC bus system with a DC voltage network, photovoltaic system or charging station for electric vehicles. Two half-bridges connected in series have inductances at their center taps and thereafter parallel connected capacitances. A boost or step-down converter functionality is provided by the interaction of the inductances with the capacitances. In any case, the capacitances are not used as storage capacitors for a DC/DC converter, nor is a ZVS switching functionality addressed.

It remains to be noted that the aforementioned prior art does not show any resonant capacitors for a ZVS switching functionality at the center tap of the half-bridges and also does not propose any storage choke Ls+, Ls- and storage capacitors Cs for providing a bidirectional synchronous conversion functionality.

It is also known to use the principle of so-called zero voltage switching (ZVS) in a DC/DC conversion to determine the switching point of the semiconductor switches used, in order to achieve a high level of efficiency by using resonant switching topologies. This means that the drain-source voltage goes to zero before the MOSFET turns on, so that it can turn on when there is no voltage. So-called ZVS switching is also referred to as soft switching. With this Zero Voltage Switching concept, switching losses can be almost completely eliminated, especially when switching on. In addition, the turn-off losses can be significantly reduced with a reversing capacitor at the switching output of a semiconductor bridge, also referred to as a snubber capacitor.

The DC/DC converters known from the prior art either have poor efficiency, since a ZVS concept cannot be implemented, or they are burdened with high material costs, since an expensive and lossy transformer has to be used.

In addition, the known concepts do not allow the provision of an output potential that can be set symmetrically to ground, it being desirable to limit or minimize the voltage potential of the output potential tap DC+, DC- to ground, in particular to provide an output voltage symmetric to ground.

It is therefore the object of the invention to provide a DC/DC converter which has a high degree of efficiency, bidirectionally and without transformers a DC voltage wall tion, in particular for operation in a DC charging station, or as an operational energy converter, and provides a symmetrical DC output voltage with respect to ground.

This object is achieved by a bidirectional DC/DC converter according to the teaching of claim 1. Advantageous developments of the invention are the subject of the subclaims.

DISCLOSURE OF THE INVENTION

The invention relates to a bidirectional DC/DC converter for converting an input-side intermediate circuit voltage U _Zk into an output voltage U _out and vice versa, in particular a transformerless charging station for an energy store, in particular an electrochemical energy store, or for temporarily storing energy from a servo drive, or for Reduction of the intermediate circuit voltage for electric drives. The DC/DC converter comprises a series connection of two half-bridges H1, H2, each with two semiconductor switches T1, T2 and T3, T4, with each half-bridge H1, H2 between an input-side intermediate voltage potential rail ZK+, ZK- with intermediate circuit voltage U _Zk and a middle potential rail ZM with symmetrical, in particular symmetrical to ground, medium voltage U _Zk+, U _Zk - is switched. Each center tap M1, M2 of the half-bridge H1, H2 is connected to its own storage choke LS+, LS- and, in particular, a common storage capacitor Cs, so that two bidirectional synchronous converters are connected in series.

It is proposed that at least one separate reversing capacitor C _{zvs be} connected to the center tap M1, M2 of each half-bridge H1, H2.

In other words, a DC/DC converter is proposed which, in principle, can be viewed as a series connection of two synchronous converters. To implement a ZVS concept, a separate reversing capacitor C _zvs, C _zvs+, C _zvs -, C _zvs++, C _zvs+ -, C _zvs-+, C _zvs - is connected to the center tap of each half-bridge, each of which defines a synchronous converter. The reversing capacitor(s) enable zero-voltage switching (ZVS switching) in conjunction with a tuned circuit, especially a duty factor of the semiconductor switches T1 to T4 that is tuned to this, with switching losses being significantly reduced, waste heat being avoided and efficiency being increased can. The capacitance of the reversing capacitor(s). can be adjusted depending on the type of circuit and the power to be transmitted. In this context, separately means that the reversing capacitor is provided as an explicit and structurally separate component with a capacitance that is greater than a typical junction capacitance of a semiconductor switch, or in combination with this junction capacitance provides a sufficiently large ZVS capacitance.

The input-side intermediate circuit voltage U _Zk can be provided, for example, by an upstream bidirectional converter or a unidirectional rectifier that is balanced to ground. For example, the voltage can also be provided by one or more photovoltaic modules connected in series with a balanced-to-earth output. With the help of the series-connected half-bridges H1, H2, a ground-symmetrical output voltage with the two partial voltages DC+ and DC- can be provided. This has advantages in terms of electrical safety during operation and ensures reduced stress on the insulation, in particular for charging stations for batteries, in particular vehicle traction batteries, or for controlling DC energy converters. In the case of electrical drives, motors can be designed for a lower insulation voltage between the phases and to earth by reducing the intermediate circuit voltages sym metrically to earth. In the event of a fault, for example a ground fault, the output can be reliably switched off and the power unit prevented from being destroyed, which would not be possible with an upstream inverter, since current would continue to flow via the freewheeling diodes of the semiconductor switch.

A voltage rise rate du/dt can be reduced by the reversing capacitors C _zvs connected to the center taps M1, M2 of the half-bridges H1, H2, and the EMC behavior can thus be significantly improved since rapid voltage jumps are avoided. Overvoltages on the semiconductors can be significantly reduced, since soft switching or ZVS switching is enabled. The permissible intermediate circuit voltage U _Zk can be designed for almost twice the blocking voltage of a semiconductor, so that for a high intermediate circuit voltage U _Zk of 900-1000 V or higher, semiconductor switches with blocking voltages of 900 V or less, in particular less than or equal to 750 V or less, can be used. This can be achieved, for example, with SiC MOSFETs. A blocking voltage down to 650 V is also possible. This makes it possible for correspondingly high input voltages U _Zk to produce large output voltages. voltage ranges U _0ut from below 200 V up to 920 V DC. Since the permissible blocking voltage of Si MOSFETs is highly temperature-dependent, an output voltage U _0ut of 920 V can be reliably provided with SiC MOSFETs even at extremely low temperatures.

By implementing the ZVS switching principle, reverse recovery effects can be avoided because no blocking voltage is applied to a conductive diode. Since it is switched on with virtually no voltage, there are no reverse recovery losses and EMC problems resulting from a diode current failure can be prevented. As a result, there are practically no more turn-on losses, and turn-off losses can also be reduced. Ultimately, the proposed switching topology significantly increases efficiency and improves EMC behavior. Voltages that occur relative to ground can be minimized and switching overvoltages can be limited. In particular, powers of up to 22 kW can be provided, especially when used as a charger for an electric vehicle or as an intermediate circuit voltage converter for electric drives. Compared to conventional DC/DC converters, the effort required for the EMC output filter can be reduced and a large amount of material can be saved by doing without a converter transformer. The efficiency is improved in such a way that a high level of energy savings can be achieved over the service life, for example in private households.

The storage chokes can be designed separately and used in a magnetically uncoupled manner. In an advantageous embodiment, the two storage inductors LS+, LS- can be designed as a storage transformer T _s magnetically coupled. The two storage inductors LS+, LS- of each synchronous converter are arranged in the manner of a storage transformer Ts on a common magnetic core and are magnetically coupled. As a result, cost savings can be achieved, and space can also be saved on the circuit board.

In an advantageous embodiment, a storage capacitor C _s can be connected between the output sides of the two storage chokes l_s ₊ , Ls- for sharing the use of the two series-connected bidirectional synchronous converters. Through the storage capacitor C _s , which connects the output sides in the direction of the output potential taps DC+, DC- the two outputs of the storage chokes LS+, LS- connects, the output voltage U ₀ ut can be stabilized and switching frequency components can be suppressed.

In an advantageous embodiment, the semiconductor switches T1, T2, T3, T4 can be designed as high-voltage MOSFET switching transistors with a low blocking voltage <900 V, in particular <750 V. This makes it possible to achieve an output voltage U _ot of 920 V or more. Such semiconductors with a low blocking voltage, e.g. B. Semiconductors from the INFINEON CoolMOS series can be used cost-effectively and with low switching losses.

Advantageously, in particular for the aforementioned embodiment, SiC-FETs can be used as semiconductor switches, which combine a SiC-JFET with a Si-MOSFET in a cascode circuit, for example the model UJ4C075018K4S from UnitedSiC. The SiC cascode offers the switching behavior of a self-locking MOSFET with the positive electrical properties of a silicon carbide transistor. Such semiconductor switches can advantageously be designed for blocking voltages of up to 750 V. In an advantageous embodiment, two corresponding semiconductor switches T1 & T4 or T2 & T3 of the two half-bridges H1, H2 can be switched simultaneously, in particular with an identical switch-on delay. The switch-on delay is used to allow the voltage at the reversing capacitors to reverse. A symmetrical modulation of the control signals of the semiconductor switches T1 & T4 or T2 & T3 can be achieved.

In an embodiment that goes further in this regard, it is possible for the semiconductor switches T1, T2, T3, T4 to be switchable with different switch-off delays for the controllable balancing of the medium voltage UZK+, UZK- of the intermediate circuit, so that Uzk+ and Uzk- can be balanced by ZM. Based on this, the symmetrical modulation of H1 and H2 can be used to achieve controllable balancing of the output voltage U _out at the two output potential taps DC+, DC- with respect to ZM and thus to ground. This makes it possible to balance the output voltage Uout. In this way, asymmetries in the component parameters such as e.g. B. different switching speeds can be compensated. In an advantageous embodiment, the semiconductor switches T1, T2, T3, T4 can be switched to generate a storage inductor current or storage transformer current with a ripple amplitude greater than a mean value of the DC current, so that the inductor current has a zero crossing between two switching processes. In this way, ZVS switch-on can always be ensured. The ripple current amplitude is higher than the mean value of the inductor current, so an inductor current has always experienced a zero crossing between two switching processes, which is a prerequisite for ZVS switching on. In particular, a maximum and minimum value of the inductor current can be controlled by a current controller, for example a hysteresis current controller that controls the switching of the semiconductor switches, so that the respective semiconductor switches are switched off when the maximum or minimum value is reached. The aim is to store enough energy in the storage choke to charge the reversing capacitors, which then results in the desired control of the mean value of the choke current.

The semiconductor switch pairs T1 and T4 or T2 and T3 can thus be switched either with identical switch-on times or with different switch-on times, with switch-on losses being negligible. In an advantageous embodiment, the semiconductor switches T 1 , T2 , T3 , T4 can be switched in conjunction with the resonant capacitor Czvs, Czvs+, Czvs-, Czvs++, Czvs+-, Czvs-+, Czvs- ZVS (Zero Voltage Switching) in particular, it can be switched on with almost no loss of voltage and switched off with low losses with a limited voltage rise rate. Low-loss turn-off can result from limiting the voltage rise rate, with the semiconductor switches, in particular switching transistors, turning off faster than a voltage can build up. By implementing the ZVS switching principle, the efficiency is significantly increased, thermal waste heat from the DC/DC converter is minimized and the service life is greatly extended, so that both energy costs are minimized and the service life of the DC/DC converter can be significantly increased.

In an advantageous embodiment, at least one reversing capacitor Czvs+, Czvs- per half-bridge H1, H2 can be assigned, preferably one reversing capacitor Czvs++, C _zvs +-, Czvs-+, Czvs- per semiconductor switch T1, T2, T3, T4 connected in parallel be. A resonant capacitor is thus assigned to each semiconductor switch, so that a switching overvoltage when switching off is minimized. the oscillating capacitor is especially relevant for turning off. Low-loss turn-off can be achieved by additional reversing capacitors at the half-bridge outputs or parallel to the semiconductor switches T1, T2, T3, T4. A balancing of the medium voltage U _Zk+, U _Zk - can nevertheless be achieved by a slightly different switch-off delay. Alternatively, soft switching can already be achieved by a single capacitor C _zvs between the two half-bridge outputs M1, M2. Even if there is no oscillating capacitor, the switching losses in ZVS switching can be lower than with hard switching, since the drain/source capacitance, ie the junction capacitance of the semiconductors, can be used as an oscillating capacitor. In an advantageous embodiment, a current controller Coni for detecting at least one inductor current ILS of at least one storage choke Ls ₊ , Ls- can be included, in particular for detecting all inductor currents ILS+, ILS- of the two storage chokes Ls ₊ , Ls. The current controller Coni can be set up , On the basis of the detected inductor current ILS switching signals ST1, ST2, ST3, ST4 of the semiconductor switches T1, T2, T3, T4 in particular for controlling a maximum and a minimum value of the inductor current ILS _, ZU he testify. Ripple current control is achieved by controlling the maximum value and the minimum value of the inductor current(s), whereby the mean value of the inductor current can also be adjusted. As a rule, the switching signals ST1 & ST 4 as well as ST2 & ST 3 are synchronous with one another, which means that a common-mode voltage at the output can be avoided, taking into account the ZVS requirements for the switching processes. The switch-on delay is used to allow the voltage to swing around the capacitors, ie the ZVS capacitors. The current controller thus works as a hysteresis controller to determine the switch-on delay. By slightly varying the turn-off delay of the individual switching signals, active balancing of the mean voltage U _Zk+, U _Zk - can also be achieved. The switching signals can be generated on the basis of the inductor current I LS at least one, preferably both storage inductors ₊ , Ls-, so that the output voltage U _out can be made available in a regulated manner. If an inductor current exceeds a maximum value or falls below a minimum value, the current controller, which is preferably designed as a hysteresis controller, can cause corresponding semiconductor switches to be switched on or off. Its switching hysteresis is thus determined by a maximum and minimum value of the inductor current, which ensure at least one zero crossing of the inductor current per switching period should, defined.

Advantageously, the current controller Coni all inductor currents Ls _+, ILS- of the storage inductors Ls + _, Ls- can be detected separately, whereby the switching pulses ST1, ST2, ST3, ST4 are adjustable as a function of the inductor currents Ls _+, s-. In addition, a differential current error, in particular a power supply error, e.g. a leakage current, can advantageously be detected by a current difference formation of the inductor currents Ls ₊ - Ls- _, at least when a predeterminable current difference amount is exceeded, after which, for example, the current regulator Coni or a higher-level control unit switching pulses unterbin the and thus the DC-DC converter 20 can turn off. Alternatively or in addition, other switch-off devices, in particular contactors, can be used for switching off if a differential current error, in particular a leakage current, is detected by forming a current difference between the inductor currents Ls ₊ - Ls- at least when a predeterminable current difference amount is exceeded.

As a rule, the storage choke ₊ , L s- can be designed separately and structurally separate, and not magnetically coupled. The storage chokes Ls ₊ , Ls- are preferably designed with the same inductance. As a result of an advantageous further development of the invention, the storage transformer Ts can comprise two symmetrical windings of the two storage chokes Ls ₊ , L s- with the same number of turns on a common magnetic core. In the case of high-power applications, the storage transformer Ts can preferably have a total inductance of 20 pH or less and/or a total number of turns of nine turns or less. In an application with a low power requirement, for example a charging station with a low power of less than 10 kW, higher total inductances >20 pH and a larger number of turns can also be used. With a large ripple current, which produces at least zero crossings in the inductor current, the storage transformer Ts can have a low inductance and few turns. This results in low copper losses and negligible parasitic winding capacitances. In turn, low winding capacitances are favorable with regard to the EMC behavior; in particular, undesired capacitive leakage currents in the outputs can be avoided and a common-mode filter on the output side can be omitted or simply designed. With a conventional design of the storage transformer Ts for an effective ripple current value of ten percent of the DC current, on the other hand, a practically nine-fold total inductance of up to 180 pH, ie up to 90 pH per storage chokes need Ls ₊ , Ls-, and a triple number of turns up to 27 turns or more. Assuming unchanged winding window cross sections with the same fill factor, the copper resistance would be nine times higher. This shows that when designed for a high ripple current with zero crossings, the copper losses in the choke can be massively reduced despite the approx. 30% higher rms choke current value, although these savings are not quite as dramatic in reality, since the influence of a skin effect at high Switching frequencies is not taken into account, which is not negligible with a high ripple current. In any case, the core losses are significantly lower than the copper losses and these can be significantly reduced with simple storage choke configurations. In particular, in the case of stacked ferrite cores, the required internal cross-sections can be determined by the copper cross-section required for the winding.

Compared to the hard-switching operation of the DC/DC converters known from the prior art, a higher ripple current for the intermediate circuit capacitors CZK or output capacitors, in particular Cs, is unproblematic since low-loss film capacitors can be used. Low-loss ceramic capacitors in SMD design can preferably be used for the reversing capacitors Czvs. The ripple current load of the intermediate circuit is only slightly higher than in hard-switching operation.

Both the maximum and minimum value of the inductor current, and thus the mean inductor current value and the ripple current amplitude can be regulated by the current governor Coni, in particular such that the semiconductor switches are switched in such a way that zero crossings occur in the inductor current. The mean value of the inductor current ILS determines the active energy transfer and the energy flow direction. The ripple current amplitude determines the reactive energy circulating in the DC/DC converter for ZVS switching, with so much energy remaining stored in the choke coil that the reversing capacitors can be recharged.

In an advantageous development of the invention, a filter stage FIS can be connected downstream between the storage capacitor C _s and the output potential tap DC+, DC- on the output side. In particular, this filter stage FIS can include at least one current-compensated choke Us and a capacitor bridge HC with two series-connected medium-voltage filter capacitors Cis ₊ , Cis-, which have high-frequency can filter out quente voltage components of the output voltage U ₀ ut. A grounding filter capacitor CISG can preferably be connected to a ground potential at the center tap of the capacitor bridge HC, in order in turn to achieve high-frequency grounding of the DC output. Nevertheless, one filter capacitor can be connected between DC+ or DC- and ground, and another filter capacitor can be connected between DC+ and DC-. However, a different filter capacitor network can also be used.

In an advantageous embodiment, the intermediate circuit voltage UZK can be 950 V or higher in order to set a range of the output voltage L _t of at least between 200 V and 920 V's.

In an advantageous embodiment of the invention, each semiconductor switch T1, T2, T3, T4 can include a parallel connection of two or more switching transistors. This parallel connection allows the semiconductor efficiency to be increased within certain limits and higher output powers to be made available. Due to the ZVS switching behavior, the semiconductor switches T1, T2, T3, T4 only have on-state losses and no turn-on losses and low turn-off losses, with the on-state losses being further minimized and efficiency increased by connecting semiconductors in parallel.

In a secondary aspect, a method for operating an aforementioned bidirectional DC/DC converter is proposed, with the semiconductor switches T1 to T4 for operating two synchronous converters in conjunction with the two storage chokes LS+, LS+ and the storage capacitor Cs for converting an input-side intermediate circuit voltage UZK can be switched into an output voltage U _out and vice versa. For this purpose, at least one separate reversing capacitor C _zvs connected to the center tap of each half-bridge H1, H2 is used in such a way as to enable ZVS operation while providing an output voltage balanced to ground. The method is carried out by specifying switching signals from a current regulator Coni, which adjusts the duty cycle of the semiconductor switches T1 to T4 accordingly in order to provide low-loss and center-symmetrical voltage conversion. For this purpose, for example, measured current or voltage values, such as e.g. B. inductor current values can be used. For example, based on at least one inductor current s, which has a ripple current with an amplitude higher than a mean value of the inductor current for generating zero crossings, the duty cycle of the semiconductor switches T1, T2, T3 and T4 can be controlled. For this purpose, the current regulator Coni can generate four switching pulses ST1, ST2, ST3, ST4 as the gate voltage of the semiconductor switches T1, T2, T3, T4. These can be set in such a way that the respective semiconductor switches are switched off when a maximum or minimum value is reached, with sufficient energy being stored in the storage inductor in order to enable the resonant capacitors to be recharged.

The current controller Coni for safety current monitoring can also record both inductor currents ILS+, Ls- of the storage inductors Ls _+, - separately. If a differential current not equal to zero occurs, the DC-DC converter can be switched off.

DRAWINGS

Further advantages result from the present description of the drawings. Exemplary embodiments of the invention are shown in the drawings. The drawing, the description and the claims contain numerous features in combination. The person skilled in the art will expediently also consider the features individually and combine them into further meaningful combinations.

Show it:

1 shows a DC/DC synchronous converter from the prior art; 2 shows the basic configuration of a ZVS switching concept of a half-bridge; 3a, 3b show a first and second exemplary embodiment of a DC/DC converter according to the invention;

4a, 4b further exemplary embodiments of the DC/DC converter according to the invention;

5 shows a further exemplary embodiment of a DC/DC converter according to the invention. Elements of the same type are denoted by the same reference symbols in the figures. The figures only show examples and are not to be understood as limiting.

In Fig. 1, a bidirectional synchronous converter 12 of the prior art is Darge. An input voltage UZK, which is stabilized via an intermediate circuit capacitor CZK, is applied to a half-bridge comprising two semiconductor switches T1, T2, which are designed as MOSFET transistors. A storage choke Ls is connected to the center tap of the half-bridge, with a storage capacitor Cs being connected in parallel to the output potential tap DC+, DC-. Energy is stored in the storage choke Ls by cyclically switching the semiconductor switches T1, T2, it being possible for the output voltage Lt across the stabilizing storage capacitor _Cs to be output. Basically, the synchronous converter 12 can be viewed as a combination of a step-up converter and a step-down converter, with the step-down converter operating from the input voltage UZK to the output voltage U _0ut and the step-up converter operating from the output voltage U _out to the input voltage UZK, depending on the transformation direction. The level of the voltage to be converted is determined by the keying degree, ie the switch-on and switch-off time of the transistors T1, T2. The two transistors are operated in push-pull mode, with only one of the two transistors T1, T2 switching at any time, apart from a small dead time, in order to prevent a short circuit. Both charging and discharging, for example as a charging device for an electrochemical store, are possible due to the bidirectional energy transmission. In electromotive applications, both drive energy can be supplied and regenerative energy can be taken off. In this respect, the synchronous converter 12 shown in FIG. 1 has operating losses that must be minimized.

2 shows a typical configuration 14 of a zero-voltage switching concept of a half-bridge, comprising two semiconductor switches T1, T2. The ZVS switching topology 14 of FIG. 2 represents part of the first specific embodiment of a DC/DC converter 10 shown in FIG , so that the other semiconductor switch can turn on without voltage and loss. This means that it can be switched on with virtually no voltage and low losses, and switched off with a reduced voltage rise. Especially with power supplies or charging stations in the area of The efficiency of a DC/DC voltage converter plays a crucial role in electromobility. By ZVS switching the semiconductor switches, the turn-on losses can be practically set to zero, and undesirable thermal heating can be minimized.

3a shows a first exemplary embodiment 10 of a bidirectional DC/DC converter, which taps an input voltage UZK of a symmetrical intermediate circuit ZK with the two intermediate circuit medium voltages UZK+, UZK- and an intermediate circuit medium potential rail ZM into an output voltage U _out at the output potential DC+, DC- converts. For this purpose, a half bridge H1 or H2 is connected between the intermediate circuit potential rails ZK+, ZK- and the medium potential rail ZM. Each half-bridge comprises two semiconductor switches, half-bridge H1 the semiconductor switches T1 and T2, and half-bridge H2 the semiconductor switches T3 and T4.

Two stabilization capacitors CZK+ and CZK- are connected between the intermediate circuit potential rail ZK+ and ZK- and the medium potential rail ZM for the purpose of central potential stabilization and for supporting the intermediate circuit voltage UZK. Two symmetrical storage chokes ₊ and Ls- are connected to the respective center taps M1, M2 of the half-bridges H1 and H2, which are magnetically coupled to one another as a storage transformer Ts via a magnetic core. Alternatively, two individual chokes that are not magnetically coupled can also be used. At the input of the storage transformer Ts, two resonant capacitors Czvs ₊ and Czvs-ge are connected across from the mid-potential rail ZM in order to enable ZVS switching or soft switching of the semiconductor switches of the three-point bridge with the two half-bridges H1 and H2. A storage capacitor Cs is connected in parallel at the output of the transformer Ts and stabilizes the output voltage U _out at the two output potential taps DC+ and DC-. The combination of the two storage chokes l_s _+, Ls- in a storage transformer Ts as a storage choke with a split winding and switching reversing capacitors Czvs at the center taps M1, M2 of the two half-bridges H1, H2 results in a significant improvement in efficiency and a lower one Emission of interference allows, with high power over 20 kW can be transmitted.

The current through a storage choke Ls ₊ and/or Ls- is recorded as the choke current Ls by a current controller Coni. Based on the inductor current Ls, which has a ripple Lestrom having an amplitude higher than an average value of the inductor current for generating zero crossings, the duty cycle of the semiconductor switches T1, T2, T3 and T4 is controlled. For this purpose, the current controller Coni generates four switching pulses ST1, ST2, ST3, ST4 as the gate voltage of the semiconductor switches T1, T2, T3, T4. These are set in such a way that the respective semiconductor switches are switched off when a maximum or minimum value is reached, with sufficient energy being stored in the storage inductor in order to enable the reversing capacitors to be recharged.

As a rule, two semiconductor switches T1 & T4 and T2 & T3 are switched simultaneously, with the semiconductor switches T1 & T4 being switched in push-pull to T2 & T3 in order to avoid short circuits. Identical switch-on delays are assumed here. The switch-on delay is used to allow the voltage at the reversing capacitors to reverse. Slightly different switch-off delays can also be used to actively balance the output voltage Uout, in particular to ensure a balanced-to-earth output _Uout . As a rule, the current control is stored as a software process in the Coni current controller. In order to achieve very fast controller behavior, the current controller Coni can be designed at least partially, in particular completely, in hardware. The current controller Coni can also have an I/O interface Pl/O to a superordinate processor controller, for example charging electronics for an electrochemical storage device.

A second exemplary embodiment 20 is shown in FIG. 3b, which is essentially the same as the DC/DC converter 10 in FIG. 3a. Notwithstanding this, the storage chokes _+, Ls- have the same inductance and are magnetically independent and structurally separate from one another and are not combined in a storage transformer Ts. In addition, the current controller Coni records both inductor currents ILS+, ILS- of the storage inductors Ls _+, Ls- separately. If a residual current not equal to zero occurs, the DC-DC converter 20 can be switched off.

Two further exemplary embodiments 30, 40 of DC/DC converters according to the invention, which essentially correspond to the configuration of FIG. 3, are shown in FIGS. 4a, 4b. Deviating from FIG. 3, in FIG. 4a the DC voltage converter 30 is connected to a common one at the center taps M1, M2 of the two half-bridges H1, H2 Reversing capacitor Czvs connected. Analogous to the exemplary embodiment of the DC-DC converter 20, both inductor currents ks+, ILS- are detected by the current regulator Coni, so that what was said in this regard also applies to this. However, it can also be sufficient to record only one of the two inductor currents ILS+ or ks- to regulate the ripple current.

In FIG. 4b, each semiconductor switch T1, T2, T3, T4 of the DC voltage converter 40 has a resonant capacitor Czvs++, Czvs+-, Czvs-+, Czvs- connected in parallel. The inductor current is detected analogously to the embodiment of the DC voltage converter 10.

The different configurations of the reversing capacitor Czvs either minimize the number of components or the switching overvoltages.

Finally, FIG. 5 shows a further exemplary embodiment 50 of a DC/DC converter, which likewise essentially corresponds to the exemplary embodiment 10 in FIG. Analogous to the exemplary embodiment of the DC-DC converters 20 and 30, either one of the two or both inductor currents ILS+, ks- is detected by the current regulator Coni, so that what was said in this regard also applies here. A filter stage FIS is interposed on the storage capacitor Cs before the output potential tap DC+, DC-. The filter stage FIS includes a current-compensated choke Us. A half-bridge made up of two medium-voltage filter capacitors Cis+, Cis-, which is referred to as a capacitor bridge HC, is connected in parallel with the output potential taps DC+, DC-. Another grounding filter capacitor CISG is connected to ground at the center tap of the capacitor bridge HC in order to allow common-mode currents to be dissipated. The filter stage FIS enables radio interference suppression and an improvement in the EMC robustness of the DC/DC converter 50. There are several possibilities to build this filter, a capacitor Cis and two capacitors CISG can also be provided, each with a capacitor CISG of DC+ to ground and/or DC- to ground. Reference List

10 Bidirectional DC/DC converter

12 Bidirectional synchronous converter

14 ZVS switching topology

20 Bidirectional DC/DC converter

30 Bidirectional DC/DC converter

40 Bidirectional DC/DC converter

50 Bidirectional DC/DC Converter

UZK intermediate circuit voltage

UZK+, UZK- intermediate circuit medium voltage

Uout output voltage

ZK+, ZK- Intermediate circuit potential busbar ZM Intermediate circuit middle potential busbar

H 1 , H2 half bridge M1, M2 center tap of the half bridge

T1, T2, T3, T4 semiconductor switches ST1, ST2, ST3, ST4 switching signal CZK+, CZK- intermediate circuit capacitor Czvs resonant capacitor

Czvs+, Czvs- medium voltage reversing capacitor Czvs++, Czvs+-, switch related reversing capacitor

Czvs-+, Czvs-

Cs storage capacitor

Ls storage choke

Ls ₊ , Ls+ Symmetrical storage choke

T _s storage transformer

DC+, DC- output potential tap

Coni current controller

FIS filter stage

ILS inductor current

HC capacitor bridge

Cis+, Cis- medium voltage filter capacitor

ClSG grounding filter capacitor

Lis common mode choke

P-I/O I/O interface for processor control

Claims

patent claims

1 . Bidirectional DC/DC converter (10, 20, 30, 40, 50) for converting an input-side intermediate circuit voltage (U _Zk ) into an output voltage (U ₀ ut) and vice versa, in particular for a transformer-less charging station or for an energy store for the temporary storage of Energy of a servo drive, comprising a series connection of two half-bridges (H1, H2) with four semiconductor switches (T1, T2, T3, T4), with each half-bridge (H1, H2) between an input-side DC link busbar (ZK+, ZK-) with an intermediate circuit voltage (Uzk) and a medium-potential rail (ZM) with a symmetrical, in particular earth-symmetrical, medium voltage (UZK+, UZK-) is connected, and each center tap (M1, M2) of the half-bridge (H1, H2) is connected to a storage choke (L _{s +} , L _s. ) And a storage capacitor (Cs) interacts, so that two bidirectional synchronous converters are connected in series, characterized in that the center tap (M1, M2) of each half-bridge (H1, H2) at least at least a separate reversing capacitor (Czvs, Czvs+, Czvs-, Czvs++, Czvs+-, Czvs-+, Czvs-) is connected.

2. Bidirectional DC/DC converter (10, 20, 30, 40, 50) according to claim 1, characterized in that the two storage chokes (L _s+ , L _s. ) are designed as magnetically coupled storage transformers (Ts).

3. Bidirectional DC / DC converter (10, 20, 30, 40, 50) according to claim 1 or 2, characterized in that a storage capacitor (Cs) between the output sides of the two storage inductors (L _{s +} , L _s -) to the common Use of the two series-connected bidirectional synchronous converter is connected.

4. Bidirectional DC / DC converter (10, 20, 30, 40, 50) according to any one of the preceding claims, characterized in that the semiconductor switches (T1, T2, T3, T4) as high-voltage MOSFET switching transistors with a low Reverse voltage less than or equal to 900 V, in particular less than or equal to 750V are performed.

5. Bidirectional DC / DC converter (10, 20, 30, 40, 50) according to any one of the preceding claims, characterized in that the semiconductor switches are SiC-FETs, which are a SiC-JFET with a Si-MOSFET in a cascode circuit combine.

6. Bidirectional DC/DC converter (10, 20, 30, 40, 50) according to one of the preceding claims, characterized in that two corresponding semiconductor switches (T1 & T4 and T2 & T3) of the two half-bridges (H1, H2 ) can be switched at the same time, in particular with an identical switch-on delay.

7. Bidirectional DC/DC converter (10, 20, 30, 40, 50) according to one of the preceding claims, characterized in that the semiconductor switches (T1, T2, T3, T4) for the controllable balancing of the intermediate circuit voltage (UZK+, UZK -) and/or the output voltage (U ₀ ut) can be switched with different switch-off delays.

8. Bidirectional DC / DC converter (10, 20, 30, 40, 50) according to any one of the preceding claims, characterized in that each semiconductor switch (T1, T2, T3, T4) comprises a parallel connection of two or more switching transistors.

9. Bidirectional DC / DC converter (10, 20, 30, 40, 50) according to any one of the preceding claims, characterized in that the semiconductor switches (T1, T2, T3, T4) for generating a ripple current with a Rippeiamplitude greater than an average value of the inductor current can be switched, so that the inductor current has a zero crossing between two switching processes.

10. Bidirectional DC/DC converter (10, 20, 30, 40, 50) according to one of the preceding claims, characterized in that the semiconductor switches (T1, T2, T3, T4) in interaction with the resonant capacitor (Czvs, Czvs ₊ , Czvs-, Czvs++, Czvs+-, Czvs-+, Czvs-) ZVS-switchable (zero voltage switching) can be switched on almost without loss, in particular without voltage, and can be switched off with low loss with a limited voltage rise rate.

11 . Bidirectional DC/DC converter (10, 20, 30, 40, 50) according to one of the preceding claims, characterized in that at least one reversing capacitor (Czvs ₊ , Czvs-) is assigned to each half-bridge (H1, H2), preferably a To oscillating capacitor (Czvs++, Czvs+-, Czvs-+, Czvs-) per semiconductor switch (T1, T2, T3, T4) is connected in parallel.

12. Bidirectional DC/DC converter (10, 20, 30, 40, 50) according to one of the preceding claims, characterized in that a current controller (Coni) for detecting at least one inductor current (ILS, ILS+, ILS-) at least a storage inductor (L _s+ , L _s. ) is included, which is set up based on the inductor current (Ls _, Ls _+, Ls-) switching signals (ST1, ST2, ST3, ST4) of the semiconductor switches (T1, T2, T3, T4 ), in particular to regulate a maximum and a minimum value of the inductor current (Ls, Ls+, Ls-) to generate.

13. Bidirectional DC / DC converter (10, 20, 30, 40, 50) according to any one of the preceding claims, characterized in that the storage transformer (Ts) has two symmetrical windings of the two storage inductors (L _{s +} , L _s. ) With same number of turns on a common magnetic core, the storage transformer (Ts) preferably having a self-inductance of 20 mH or less and/or a total number of turns of nine turns or less.

14. Bidirectional DC/DC converter (10, 20, 30, 40, 50) according to one of the preceding claims, characterized in that a filter stage ( FIS) is connected downstream.

15. Bidirectional DC/DC converter (10, 20, 30, 40, 50) according to claim 14, characterized in that the filter stage (FIS) has at least one current-compensated choke Us and a capacitor bridge (HC) with two series-connected medium-voltage filter capacitors (Cis ₊ , Cis-), with a grounding filter capacitor (CISG) preferably being connected to a ground potential at the center tap of the capacitor bridge (HC), or an output potential tap (DC+, DC-) on the output side via a Filter capacitor is connected to the ground potential, and another filter capacitor is connected between the output potential taps on the output side (DC+, DC-).

16. Bidirectional DC/DC converter (10, 20, 30, 40, 50) according to one of the preceding claims, characterized in that the intermediate circuit voltage (UZK) is 950 V or higher, and that a range of the output voltage (L _t ) is adjustable at least between 200 V and 920 V.

17. A method for operating a bidirectional DC / DC converter (10, 20, 30, 40, 50) according to any one of the preceding claims, wherein the semiconductor switches (T1, T2, T3, T4) for operating two synchronous converters in interaction with the two storage chokes (Ls+, Ls-) and the storage capacitor (CS) for converting an input-side intermediate circuit voltage (Uzk) into an output voltage (Uout) and vice versa, characterized in that at least one at the center tap (M1, M2) of each half-bridge (H1 , H2) connected separate resonant capacitor (CZVS, CZVS+, CZVS-, CZVS++, CZVS+-, CZVS-+, CZVS-) enables ZVS operation while providing a balanced output voltage.