EP4244184A2

EP4244184A2 - Three-dimensional high aspect ratio graphene film composites

Info

Publication number: EP4244184A2
Application number: EP21810560.9A
Authority: EP
Inventors: Eldad GRADY
Original assignee: B2d Holding GmbH
Current assignee: B2d Holding GmbH
Priority date: 2020-11-10
Filing date: 2021-11-09
Publication date: 2023-09-20
Also published as: WO2022101210A3; WO2022101210A2

Abstract

The present invention relates to three-dimensional graphene films comprising one or more graphene layers in high aspect ratio architecture. Particularly, the invention relates to a method for preparation of three-dimensional high aspect ratio multilayer graphene as well as composites comprising said multilayer graphene as well as their application in electrodes, particularly for supercapacitor applications. The disclosed invention relates to novel graphene devices, graphene composites, and methods of preparing 3 dimensional electrodes based on plurality of graphene layers.

Description

Three-dimensional high aspect ratio graphene film composites

The present invention relates to three-dimensional graphene films comprising one or more graphene layers in high aspect ratio architecture. Particularly, the invention relates to a process for the preparation of three-dimensional high aspect ratio multilayer graphene as well as composites comprising said multilayer graphene as well as their application in electrodes, particularly for supercapacitor applications. The disclosed invention relates to novel graphene devices, graphene composites, and methods of preparing three-dimensional electrodes based on plurality of graphene layers.

The unique electrical properties, mechanical strength and chemical inertness of graphene are of high interest, particularly for novel electronic devices, such as supercapacitors (SC) for energy storage applications, interconnects and sensors. As a two-dimensional film, graphene has a high specific surface area and excellent electrical conductivity, therefore is highly suitable as an electrode material for supercapacitors. However, a three-dimensional architecture of graphene electrodes is needed to form interconnect vias and to increase the volumetric energy density of a supercapacitor cell, while retaining the pristine graphene qualities.

Currently available lithium-ion based supercapacitors implementations achieve incremental steps of improvement and are still limited by inherently short cycle life and reliance on rare earth materials. Graphene electric double layer capacitors offer a viable solution for future supercapacitor applications. Graphene electrodes in related art can be commercially fabricated by chemical vapour deposition (CVD) on catalytic substrate, or liquid phase exfoliation or ball-milling of graphene flakes to name a few, as described by WO 2015/184555 Al.

Solution-based graphene particles are the most common commercial alternative, due to their low production cost and simplicity of surface coatings. The solutionbased graphene (also liquid phase exfoliation) has significant shortcomings in terms of graphene quality, which translates to higher resistivity and limits the power density. Current solutions based on high quality graphene (also CVD graphene) are limited by topology of the graphene layers, typically a 2D surface, which limits the energy density of the SC cell, or use high-cost low-yield fabrication techniques. In order to increase the energy density of a graphene-based supercapacitor, graphene electrodes have been fabricated in a three-dimensional topology. Methods in related art include laser scribed graphene as described by ball-milling and reduced graphene-oxide solvents dispersed on 3D structures, but the produced graphene is still subpar.

WO 2018/015884 Al discloses a device including an on-chip electrode platform including one or more three-dimensional laser scribed graphene electrodes, methods of making the on-chip electrode platform, methods of analysing (e.g., detecting, quantifying, and the like) chemical and biochemicals, and the like. However, the produced graphene is flakey and not a continuous graphene film. Electrical resistance and chemical inertness of graphene flakes are inherently poorer than of a continuous graphene film.

In related art, structures of carbon nanotubes embedded with graphene nanoplatelets can be fabricated as described by Xiong et al. (Xiong, G., He, P., Lyu, Z. et al. Bioinspired leaves-on-branchlet hybrid carbon nanostructure for supercapacitors. Nat Commun 9, 790 (2018)), in order to increase the capacity density of a supercapacitor cell. One disadvantage of such structures is the poor adhesion and stability of the carbon nanotube to the surface of the electrode.

It is therefore an object of the present invention to provide three-dimensional high aspect ratio graphene film composites, which overcome the above-described shortcoming of the prior art. Particularly, it is an object of the invention to provide high quality graphene with a three-dimensional topology. High quality graphene films, which are highly continuous, homogeneous and uniform and have a low number of defects are to be provided. Particularly, it is an object of the present invention to provide three-dimensional graphene film electrodes for supercapacitor applications. Particularly, it is an object of the invention to provide high quality CVD graphene films in ultra-high aspect ratio topology, in a highly ordered way to increase volumetric energy density of a supercapacitor. In a first embodiment, the aforementioned object of the invention is solved by a process for the preparation of three-dimensional graphene films comprising the steps of a) providing a substrate having a three-dimensional surface topology b) coating at least a portion of the substrate conformally with a catalyst layer c) conformally growing a graphene film on at least a portion of the catalyst coating, wherein the graphene film comprises one or more graphene layers.

The inventive process may consist of the aforementioned steps. The graphene film may consist of one or more graphene layers. The substrate may be partially or fully coated with the catalyst layer. The graphene film may be grown on a part of the catalyst coating or on the entire catalyst coating.

Surprisingly, it has been found that the inventive process yields high quality CVD graphene films in ultra-high aspect ratio topology, in a highly ordered way to increase volumetric energy density of a supercapacitor. The inventive process surprisingly provides a technique for fabricating continuous graphene films with ultra-high aspect ratio three-dimensional topology. Graphene layers may be grown on substrates with ultra-high aspect ratio three-dimensional topology. Surprisingly, it has been found that multilayer graphene in high quality can be grown conformally on said substrates. The ultra-high aspect ratio three- dimensional topology is retained by the multilayer graphene and continuous homogeneous graphene layers with three-dimensional topology are obtained.

Figure 1 schematically shows an isometric view of an example of a three- dimensional surface topology on a substrate with hollow nanotubes as protruding structures.

Figure 2 schematically shows a side-view of the three-dimensional surface topology of Figure 1.

Figure 3 schematically shows a top view of the three-dimensional surface topology of Figure 1.

Figure 4 schematically shows a side-view of a high aspect ratio three-dimensional surface topology in the sense of the present invention. Figure 5 schematically shows the three- layered structure of a product of the inventive process.

Figure 6 schematically shows a top-view of the three-layer structure of the product of the inventive process, exemplified for a hollow nanotube.

Figure 7 schematically shows a side-view of the three-layer structure of the product of the inventive process, exemplified for a hollow nanotube.

Figure 8 schematically shows a top-view of the three-layer structure of the product of the inventive process, exemplified for a hollow nanotube and with an intermediate layer between catalyst and substrate.

Figure 9 schematically shows a side-view of the three-layer structure of the product of the inventive process, exemplified for a hollow nanotube and with an intermediate layer between catalyst and substrate.

The term "three-dimensional surface" or "three-dimensional surface topology" as used herein denotes a surface with periodically recurring synthesised trench, cavity, or protruding elements, that share common dimensions of height, width, diameter and/or thickness. Particularly, the three-dimensional surface topology may comprise a plurality of protruding structures with a plurality of cavities in between two or more protruding elements.

The term "high aspect ratio" as used herein denotes a high ratio between the surface area of protruding elements and cavities on the "three-dimensional surface" and the base area on the substrate covered by said protruding elements and cavities. A high aspect ratio may thus also be understood to refer to unevenness of the surface topology. A flat surface in this respect would correspond to an aspect ratio of 1. An aspect ratio is considered "high" in the sense of the present invention if it is above 5, preferably above 10, preferably above 100, particularly above 1000.

The term "conformally" or "conformal growth" as used herein denotes that a layer is congruent with the underlying layer and that the underlying layer is covered by the conformal layer. Particularly, the conformal layer is continuous, homogeneous and has the same topology as the underlying layer. Preferably, the conformal layer is uniform in its thickness over the conformally coated area and has a variance of thickness of less than 20%, more preferably less than 10%. Conformal coating may refer to a full coating or a partial coating.

In a first step, a substrate having a three-dimensional surface topology is provided. The form of the substrate determines the basic form of the obtained graphene film. The substrate may have any suitable form and may be made from any suitable material. The invention is not limited to a particular form or a particular material of the substrate.

The substrate may be rigid or flexible material. Preferably, the substrate comprises or consists of a metallic or ceramic material and/or their mixtures. Alternatively, the substrate may comprise or consist of an inner material and an outer material or surface material of a metallic or ceramic material and/or their mixtures. Particularly, the substrate may comprise or consist of Al, Ti, V, Zr, Mo, W, Ta, Nb, Cr, Hf, their alloys and mixtures, their oxides, nitrides and/or carbide compounds. The aforementioned materials may also constitute the outer shell of the substrate.

According to the invention, the substrate is provided with a three-dimensional surface topology. The three-dimensional surface topology of the substrate preferably has a high aspect ratio. Preferably, the three-dimensional geometry comprises a plurality of protruding structures and a plurality of cavities between two or more protruding structures, wherein the ratio between the surface area of the protruding structures and corresponding cavities and the base area on the substrate covered by said protruding structures and cavities is in the range of from 5 to 100,000, preferably 10 to 100,000, more preferably 100 to 100,000. More preferably said ratio is in the range of from 500 to 50,000, most preferably in the range of from 1,000 to 50,000. The density of said protruding structures and correspondingly of said cavities on the base area of the substrate is preferably in the range of from 1 to 1,000,000 pm^-2, more preferably 100 to 100,000 pm^-2, most preferably 1,000 to 10,000 pm^-2.

The protruding structures might be solid or hollow, such as in the case of nanotubes. The base area of the protruding structures denotes the area on the substrate from which the protruding structure protrudes. In the case of hollow structures, e.g., nanotubes and the like, the base area denotes merely the base area of the protruding part. The base area of a cavity refers to the area on the substrate between two or more protruding structures or within a hollow protruding structure.

Figure 4 schematically shows a side-view of an example of a high aspect ratio three-dimensional surface topology, comprising a plurality of protruding structures 1 and a plurality of corresponding cavities 2. Figure 4 shows the lateral surface area of the protruding structures a, and their base area b, as well as the lateral surface area of the corresponding cavities c and their base area d. It should be noted that Figure 4 is not to scale, but rather shows aspect ratios that are below the aforementioned 5, 10 or 100. Figure 4 is for illustrative purposes only. In a preferred embodiment, the three-dimensional surface topology comprises a plurality of protruding structures and a plurality of corresponding cavities between two or more protruding structures and the ratio between the lateral surface area of the protruding structures a and their base area b, as well as the ratio between the lateral surface area of the corresponding cavities c and their base area d is in the range of from 5 to 100,000, preferably 10 to 100,000, more preferably 100 to 10,000, most preferably between 1,000 to 5,000.

The form of the three-dimensional surface topology is chosen to correspond to the intended form of the produced three-dimensional graphene. Preferably, the surface topology of the substrate comprises vertical (i.e. protruding) structures, especially nanotubes, nanopillars and/or nanowires provided on an underlying substrate. The surface topology of the substrate preferably comprises cavities between the protruding structures.

Figure 1 schematically shows an example of a three-dimensional surface topology on a substrate with hollow nanotubes as protruding structures. The figure is not to scale, i.e., the aspect ratio of the nanotubes and corresponding cavities as shown in the Figure does not necessarily show a high aspect ratio in the sense of the present invention. The figure is merely for illustrative purposes. Figures 2 and 3 show a side-view and top-view of the same exemplary structure.

Particularly in the case where the protruding structures comprise nanotubes, said nanotubes may have an outer diameter in the range of from 25 nm to 350 nm and an inner diameter in the range of from 15 to 300 nm. Their height might be in the range of from 100 nm to 250 micrometer. The average distance between two adjacent nanotubes may be below 50 nm, particularly in the range of from 1 to 50 nm.

In a preferred embodiment, the substrate having a three-dimensional topology may be provided by growing said vertical (i.e. protruding) structures on a substrate having a two-dimensional topology, i.e., an underlying substrate. The underlying substrate may be flat and the aforementioned protruding structures, especially nanotubes, nanopillars and/or nanowires, may be grown on said flat underlying substrate.

In one embodiment, the underlying substrate may be in the form of a metal foil. The thickness of the metal foil is preferably in the range of from 50 to 500 micrometer, more preferably 100 to 300 micrometer, most preferably 120 to 250 micrometer. The underlying substrate may be of any suitable material, particularly any material of the substrate as described above. Preferably the underlying substrate comprises or consists of Ti, Ta, Mo, V, Al, Zn, Hf, Ni and/or Cu. More preferably, a Ti foil is used as underlying substrate.

In an alternative embodiment, the underlying substrate may be fabricated by atomic layer deposition (ALD), physical vapour deposition (PVD), chemical vapour deposition (CVD) or thermal evaporation on a silicon substrate or its oxides and nitrides (such as SiOz, SiN_x), TiOz, TiN_x, or on other rigid or flexible substrates. The thin film deposited on the substrate may, for example, comprise or consist of the aforementioned metals Ti, Ta, Mo, V, Al, Zn, Hf, Ni and/or Cu. The thin film may have a preferred thickness of 100 to 1600 nm, more prefably 200 to 1000 nm or 400 to 800 nm.

The three-dimensional topology, especially nanotubes, may be grown on the underlying substrate (e.g. the aforementioned Ti foil or the aforementioned Ti films deposited on a base material) by means of anodization in electrolytic liquid, by applying voltage on two opposing electrodes. Particularly, vertical nanotubes may be grown on the underlying substrate by means of anodization in electrolytic liquid, by applying voltage on two opposing electrodes. The substrate may act as an anode and especially a metal plate, such as Pt, may act as the cathode. However, the cathode material is not limited to said plate or said Pt. Alternatively, any suitable electrode may be employed as cathode. Particular examples comprise Pd, Au, Re, Rh and/or Ru. The three-dimensional topology, especially nanotubes, may be grown by means of oxidation of the underlying substrate in the electrolyte. Length, diameter and spacing of three- dimensional topology, especially of the nanotubes, may be controlled by the applied voltage between the electrodes, the temperature of the electrolytic liquid, the chemical composition of the electrolyte and the duration of the anodization process, and the number of anodization processes as described below.

Any suitable electrolyte may be employed. Various electrolytes can be used such as NH4F or HF, water/ethylene glycol (EG) or glycerol electrolytes, or other fluoride-containing electrolytes. Possible electrolytes mixtures can be IM H2SO4 +0.15 wt. %HF, 2 vol.% H2O+ 0.3wt.%NH4F. The aforementioned electrolytes may particularly be used to induce the electrochemical growth of TiC nanotubes. Preferably, a mixture of HF and orthophosphoric acid may be employed as catalyst. Particularly, a mixture of 3M HF (40% purity) in O-H3PO4 may be employed, especially for inducing the electrochemical growth of TiC nanotubes.

HF concentration affects the diameter of the nanotubes, with an inverse correlation between nanotube diameter and HF concentration. Moreover, HF concentration affects the current densities in the electrolyte. High electric field is found to be essential for the formation of highly ordered nanotubes. Concentration of at least 1 mol/L HF is required for highly ordered nanotubes. Concentration of more than 5 mol/L HF can induce too high current densities which may destroy the nanotubes.

The applied voltage is preferably in the range of from 2 to 40 V, more preferably 10 to 30 V, most preferably 18 to 22 V. The applied voltage affects the nanotube diameter. The diameter of the nanotubes increases linearly with increasing applied voltage for a 2 hours growth duration.

The temperature of the electrolytic liquid is preferably in the range of from 80 to

120 °C, more preferably 95 to 105 °C. If a temperature of less than 80 °C is chosen, the nanotubes may be less homogeneous. If temperature of more than 120 °C is chosen, the nanotubes may show etched morphologies.

The anodization is preferably carried out for 10 minutes to 24 hours, more preferably 1 to 6 hours, most preferably 1 to 3 hours. The growth time may affect the nanotubes diameter as well, however, this effect typically saturates after 4 hours for applied voltage values and specified temperature.

Particularly, the formation of ordered TiOz nanotube arrays can be carried out with various anodizing conditions, e.g. applied potential between 2 to 40 V, temperature range between 80 to 120°C, and duration between 10 minutes to 24 hours.

A second or further anodization step may be performed to increase the nanotubes length. The second anodization may, for example, be carried out in 50 mM ZnSO4-7 H2O for 1 hour with IV applied voltage. Alternatively, the anodization may, for example, be carried out in NH4F/EG for 10 min and 20V applied voltage.

After growing the three-dimensional topology, the substrate may be cleaned of the electrolytic liquid and dried. Preferably, the cleaning is performed by rinsing with ethanol, isopropanol or the like. Preferably, drying is performed in a gas stream, such as an N2 stream.

In a second step, the substrate having a three-dimensional topology is conformally coated with a catalyst layer. The catalyst layer preferably has the form of a thin film.

The catalyst layer may comprise one or more layers. Particularly, the catalyst layer may comprise an intermediate layer, which is directly coated on the substrate and the actual catalyst layer, which is coated on the intermediate layer. In another embodiment, the catalyst layer may be a single layer comprising the actual catalyst and be directly provided on the substrate.

In a preferred embodiment, first an oxide layer is coated on the substrate as intermediate oxide layer. It has surprisingly been found, that an oxide layer as intermediate layer between catalyst and substrate may play a beneficial role in the formation of graphitic carbon during graphene growth at high temperatures (e.g. above 800 °C). Without the intention of being bound by theory, it is believed that at these high temperatures, C and H radicals may diffuse into the catalyst, and interact with the oxide interface and enhance the growth of the graphene layers. The intermediate layer may stimulate the formation of carbon-carbon bonds, by adsorbing CH radicals at the oxide interface at active O-H sites. Surprisingly, a particularly high quality of the graphene film may be obtained, in case an intermediate oxide layer is employed between the substrate and the catalyst layer. This effect may particularly be induced, if the intermediate oxide layer comprises oxides of Si, Mo, W and their mixtures.

The thickness of the intermediate layer is preferably in the range of from 2 to 15 nm, more preferably 5 to 15 nm, most preferably 5 to 10 nm.

Coating of the substrate with an intermediate layer may preferably be performed by thin film deposition techniques such as ALD, PVD or CVD. Particularly preferred is atomic layer deposition (ALD). The ALD may be carried out at a temperature between 50 to 400 °C, more preferably 50 to 350 °C, or 150 to 350 °C.

The surface of the substrate may be fully or partially coated with the intermediate layer. The coating is particularly conformal, i.e., the intermediate layer is homogenous and continuous in the coated areas. The thickness of the intermediate layer has preferably a variance in thickness in the coated areas of less than 20%, more preferably less than 10%.

Preferably, the intermediate layer comprises or consists of SiOz, MoOx or Wo_x or their mixtures.

In one embodiment, the intermediate layer may comprise of consist of a SiOz film, which may be deposited by plasma enhanced atomic layer deposition, for example, with BDEAS (H2Si[N(C2H5)2]2), bis(tertiary-butylamino)silane, AP-LTO®330, SiH2[NH(C4H9)]2 and/or H2Si(N(C2H5)2)2 as a silicone precursor. The plasma half cycle may comprise or consist of O2 or Ar/Oz gas mixtures for oxidation. The deposition may preferably be carried out at a temperature in the range of 150 to 400 °C. Alternatively, the SiOz film, may be deposited by thermal atomic layer deposition, for example, with BDEAS (H2Si[N(C2H5)2]2), bis(tertiary-butylamino)silane, AP- LTO®330, SiH2[NH(C4H9)]2 and/or H2Si(N(C2H5)2)2 as a silicone precursor. The deposition may preferably be carried out at a temperature in the range of 250 to 600 °C.

The film thickness is preferably between 2 to 14 nm, more preferably between 5 to 10 nm.

Alternatively, the intermediate layer may in one embodiment comprise or consist of a MoOx film, which may be deposited by plasma enhanced atomic layer deposition, for example, with bis(tert-butylimido)-bis(dimethylamido)- molybdenum, Mo(^tBuN)2(NMe2)2 (for example 98%, Strem Chemicals), as a Mo precursor. The plasma half cycle may comprise or consist of O2 gas for oxidation. Deposition temperatures can be in the range of 50 to 350 °C. The film thickness is preferably between 5 and 15 nm.

Consequently, the intermediate layer is conformally coated with the actual catalyst layer. If no intermediate layer is employed the catalyst layer is directly coated onto the substrate Coating of the substrate or the intermediate layer with a catalyst layer may preferably be performed by thin film deposition techniques such as atomic layer deposition (ALD), physical vapour deposition (PVD) or chemical vapour deposition (CVD). In a preferred embodiment, the substrate or the intermediate layer is coated conformally by thin film deposition techniques, such as atomic layer deposition (ALD), physical vapour deposition (PVD) or chemical vapour deposition (CVD).

The surface of the substrate or the intermediate layer may be fully or partially coated with the catalyst layer. The coating is conformal, i.e., the catalyst layer is homogenous and continuous in the coated areas. The thickness of the catalyst layer has preferably a variance in thickness in the coated areas of less than 20%, more preferably less than 10%.

The catalyst layer preferably has a thickness of 5 to 40 nm, more preferably 10 to 30 nm, most preferably 15 to 25 nm. The catalyst layer, especially in form of a thin film, may be composed of or comprise elementary or a compound transition metal, such as Mo, W, Ta, Ti, Nb, Zr, V, La, Yt, Cr, Hf or metals such as Ni, Cu, Pt deposited in a conformal way on the three-dimensional topography substrate. The deposition can be accompanied by plasma treatment of the surface, using one or more gasses such as hydrogen, argon or oxygen.

The catalyst layer preferably comprises or consists of carbides and/or nitrides of the aforementioned transition metals Mo, W, Ta, Ti, Nb, Zr, V, La, Yt, Cr, Hf or metals Ni, Cu, Pt or mixtures thereof. Surprisingly, it has been found that a particularly high-quality graphene film may be obtained, if the catalyst layer comprises carbon or is a carbon rich film. A carbon-rich film may for example be provided by directly growing a carbon-rich catalyst layer on the substrate or intermediate layer or by growing a catalyst layer without carbon and later carburising it. Carburisation may be carried out as described below The carbon content of the catalyst layer is preferable in the range of from 25 at.-% to 50 at.- %. Most preferably the catalyst layer comprises or consists of MoCx, where x is between 0.75 and 1.

In a particularly preferred embodiment, coating with the catalyst layer is performed by atomic layer deposition. During atomic layer deposition a film is grown on a substrate by exposing its surface to alternate gaseous species (typically referred to as precursors or reactants). In contrast to chemical vapor deposition, the deposition is limited to the substrate surface and does not occur in the gas phase. This is achieved by temporal or spatial separation of the precursor and coreactant (half cycles). The precursors are never present simultaneously in the reactor, but they are inserted as a series of sequential, non-overlapping pulses. In each of these half cycles the precursor molecules adsorbs on the reactive surface sites in a self-limiting way, so that the reaction terminates once all the reactive sites on the surface are consumed and saturation is achieved.

In a following purge step, the chamber is evacuated from previous reaction products, ligands. Consequently, a monolayer of material is uniformly and conformally deposited on the surface after a single cycle is completed. This interaction determines the saturated growth conditions, also known as the ALD window. A key signature of ALD is the linear growth rate. By varying the number of cycles it is possible to grow materials uniformly and with high precision on arbitrarily complex and large substrates.

Thermal ALD involves only gas vapours, and reaction kinetics, adsorbate's partial pressure and amount of reactive surface sites determine the saturation time. A plasma enhanced ALD relies on reactive plasma species such as ions, electrons gas radicals and photons during the second half cycle. The Plasma parameters determine the saturation of the second half cycle, e.g., exposure time, ion mean energy, gas composition, reaction kinetics and number of surface sites. PEALD's has the ability to control and tune the film composition, along with a broad temperature window.

Surprisingly it has been found that ALD is a particularly suitable method for forming a conformal catalyst layer on the three-dimensional surface topology substrates of the present invention. Without the intention of being bound by theory, it is believed that ALD allows for conformal growth of catalyst layer even in high aspect ratio protruding structures or cavities of the three-dimensional surface topology. This effect may be attributed to the controlled layer growth of ALD, where only a single layer of atoms is formed in each step. This may allow the atoms of the catalyst layer to homogenously enter the cavities of three-dimensional surface of the substrate and form a homogenous and continuous catalyst layer on the substrate.

In a preferred embodiment, conformally coating of the three-dimensional substrate with the catalyst layer, i.e., the second layer deposition, is performed by plasma enhanced atomic layer deposition (PEALD). One ALD cycle may comprise or consist of subsequently a precursor dose step, a purge step, a plasma exposure step and again a purge step.

The choice of precursor substances depends on the chemical nature of the intended catalyst film. Particularly preferred is (Mo(tBuN)2(NMe2), or Tris(diethylamido)(tertbutylimido)tantalum(V), bis(tert-butylimido)-bis-

(dimethylamido)-tungsten, bis(l,4-di-tert-butyl-l,3-diazabutadienyl)nickel(II) (Ni(dad)2 in case the catalyst layer comprises or consists of MoCx, TaC, WCx or NiCx, respectively. As pointed out above, the conformal growth of the catalyst layer may cover the entire surface of the substrate or a part thereof. The catalyst layer may cover between 10 and 90% of the surface of the substrate, or 20 to 80%, or 30 to 70%, or 40 to 60%. In case the catalyst layer is grown on an intermediate layer, the catalyst layer preferably covers the entire intermediate layer or a part thereof.

In a third step, a graphene film comprising or consisting of one or more graphene layers is conformally grown on the catalyst layer (i.e., the second layer). Preferably, in a first step, the catalyst layer is loaded with carbon atoms, i.e., without the intention of being bound by theory, carbon atoms are solved in the catalyst layer or the catalyst layer is saturated with carbon atoms. Loading with carbon atoms preferably involves contacting the catalyst layer with a carbon feedstock, especially under increased temperature. In a second step, a graphene film having one or more layers is conformally grown on the surface of the catalyst layer from the loaded carbon atoms, especially under further increased temperature.

The graphene film may be grown on the entire catalyst layer or only on a part thereof. The covered area of the catalyst layer may be in the range of from 10 to 90%, or 20 to 80%, or 30 to 70%, or 40 to 60%. The covered area may be 50% or 100%. Growth of graphene film on the entire catalyst layer is particularly preferred.

In order to achieve full graphene film coverage of the covered area, and a uniform graphene growth, it has been found that carburisation of the substrate is advantageous. The carburisation step surprisingly allows for saturation of the catalytic film with free carbon. Saturation with free carbon of an Amorphous catalytic film is more facile and results in a lower D/G peak ratios in Raman spectra of the graphene film. The density of defects, determined by the Raman spectrum of the film D/G peak ratios, and mapped over a scanned area of choice, comprising of at least 1000 adjacent scanning points, is a strong indication of the graphene film quality. Generally, the graphene layer may be grown by chemical vapour deposition (CVD) techniques. Chemical vapour deposition is a continuous vapour-based deposition technique. Typically, a metal precursor and a co-reactant gas vapours or plasma are dosed simultaneously. In the case of graphene growth, hydrocarbon precursor gas may for example be used in combination with a catalytic metal surface. Without the intention of being bound by theory, the hydrocarbon gas may adsorb and decompose and/or dehydrogenate on the surface of the metal at high temperatures. Depending on the solubility of carbon in the catalytic metal substrate, the active carbon can diffuse into the bulk of the metal at high temperatures. In case Cu is the catalyst of choice, it is known for its low solubility, therefore the process is surface limited in general.

Any suitable carbon feedstock may be employed. Suitable carbon feedstocks include for example graphite powder, PMMA, benzene or generally compounds comprising methine groups, without limitation. Preferably, methane, ethanol , ethane, ethene, ethyne, propane, propene, propadiene, propyne, butane, butene, butadiene, butariene, and/or butyne are employed as carbon feedstock.

Preferably, for conformally growing a graphene layer, after the second layer deposition, the top thin film may be impregnated with carbon atoms, for example by thermal treatment at temperatures between 600 to 850 °C, and a carbon feedstock, especially methane or ethanol.

A second layer of amorphous film and high carbon content can be impregnated in a broader temperature range than crystalline film with lower carbon content. In order to efficiently impregnate denser, more crystalline film, temperatures higher than the film crystalline phase change is preferred. Typically, temperatures above 650°C.

Subsequently, graphene layers may be grown on the surface of the carborised film by a second thermal treatment step in temperature ranging from 800 to 1300 °C. The second thermal treatment can be performed with or without a carbon rich feedstock. The graphene film obtained may comprise or consist of one or more graphene layers. Preferably, the graphene film is a multilayer graphene film. The graphene film has the same high aspect ratio three-dimensional topology as the substrate. The graphene film is especially continuous and homogeneous and is of high quality.

Particularly, the obtained graphene film is three-dimensional as opposed to flat or two-dimensional graphene films of the prior art. The graphene films follow the three-dimensional surface topology of the substrate and may be considered as highly folded or bended. Conventional two-dimensional graphene films may be characterized in that they are essentially flat and comprise no cavities or protrusions and are not folded. Accordingly, their surface area density is low. The graphene films obtained with the inventive method are highly bent or folded and thus have a very high surface area density.

The quality of the graphene film obtained may be characterized by Raman spectroscopy and X-ray photoelectron spectroscopy. The inventive method may yield a three-dimensional high quality graphene film having a narrow Raman 2D/G peak ratio density (less than 20- IO^-2), a narrow Raman defect (D/G peak ratio) density distribution (variance less than 200- 10^-4), preferably a low D/G peak mean ratio (less than 0.5), and high content of sp² hybridized carbon (more than 90%) in its top layers and surface.

In an alternative embodiment, the object of the invention is solved by a three- dimensional graphene film, obtainable by the above-described inventive process.

The inventive graphene film may consist of one or more graphene layers. The inventive graphene film has a high quality, i.e., a high continuity and high homogeneity. Particularly, the amount of sp² hybridized carbon atom in its top layer and surface may be more than 90%, when measured with X-ray photoelectron spectroscopy. The inventive graphene film may have all of the aforementioned qualitative properties of the graphene films, obtainable by the inventive method.

The inventive three-dimensional graphene film, especially obtainable by the inventive process and optionally as a composite with a conformal substrate, may particularly be employed as an electrode, especially as an electrode for supercapacitor applications.

The inventive electrode particularly has a very high amount of graphene film (in terms of its surface area) over a given electrode area. Particularly, the ratio of the surface area of graphene film over a given electrode area is in the range of from 5 to 5000, or 10 to 5000, preferably 50 to 5000, more preferably 100 to 1000.

The conformal growth of the layers over three-dimensional structures may increase the robustness of the electrode. The electrodes electrical performance may be enhanced due to the seamless graphene surface over the entire electrode. This design may avoid additional contact resistance between the 3D structures, and the current collector. In some embodiments, such as a supercapacitor cell, the dual function of the graphene films both as energy storage and current collector increases the specific power density of the supercapacitor due to a lower equivalent series resistance (ESR).

The three-dimensional structure of the electrode may increase substantially the active surface area of the electrode. The volume of the electrolytic interlayer between the electrodes may be better utilised by a three-dimensional electrode, and the distance of the free ions between the electrodes shortened. Therefore, increasing the volumetric energy density of the supercapacitor.

In an alternative embodiment, the object of the invention is solved by an electrode comprising the inventive three-dimensional graphene film conformally on a three- dimensional substrate. The inventive electrode may be directly produced by the inventive process described above.

In an alternative embodiment, the object of the invention is solved by a supercapacitor comprising the inventive electrode.

A supercapacitor is an energy storage device that combines the power density advantages of a capacitor with improved energy density similar to a battery. An electrical double-layer capacitance (EDLC) type of supercapacitor stores charge electrostatically on the surface of its electrodes. Because of the lack of electrochemical reactions, i.e. no ion intercalation into the electrodes, the cycle life of EDLC supercapacitor is in theory infinite, as no change of electrode volume occurs during charging/discharging. The specific capacitance of such a device is defined by:

C = EoErS/d where S is the specific surface area, d the distance between the electrodes , and EoSr are the permittivity constants. Graphene is known for its extraordinary specific surface area at 2630 m² per gram, thus is an ideal candidate for such EDLC supercapacitor devices. However, the gravimetric energy density of a supercapacitor is dependant on the entire packages cell. By employing a three- dimensional electrode of high quality graphene of the present invention more cell volume is utilised in charge storage, without compromising power performance.

In an alternative embodiment, the object of the invention is solved by the use of the inventive three-dimensional graphene film in an electrode, in a supercapacitor, or in interconnect vias.

As transistor nodes are being scaled down to improve CPU performance, power consumption and delay increases due to increased current density in Cu interconnects (IC). The smaller dimension IC have less metal volume, and resistivity increases exponentially when transitioning from 10 nm to 5 nm transistor nodes.

The transistor's delay, determined by the R.-C product is expected to increase by 40% when nodes decrease from 10 to 5 nm. Electromigration of Cu atoms is also expected to increase due to the high current density, resulting in voids in the Cu film.

Other material considered as substitute metal for IC, such as Co or Ru have lower resistivity than Cu only at dimensions smaller than 10 nm. Thus, Cu is still the main metallic film used for IC. Moreover, due to Cu diffusion in the interlayer dielectrics (ILD), a diffusion barrier layer is needed, which reduces the volume of the conductive metal. Previously, graphene has been suggested as a replacement for IC, but thus far no successful implementation of graphene could be performed. It is expected to outperform current metal VIAs due to Lower R-C: high mobility, low per-unit- length resistance, lower capacitance, high current carrying capacity. Electron migration.

Typically, CVD graphene is grown on Cu, and as a single layer graphene (SLG) has defects than degrade its electrical conductivity. Multilayer graphene (MLG) grown on Ni substrate needs to be transferred onto the target substrate, which is detrimental to its structural integrity and performance. Furthermore, growth is done on planar substrates, which limits MLG integration to various VIA topologies.

By employing the inventive method described above, a method to integrate a film of graphene layers of high purity and homogeneity is provided, to accommodate various VIAs topologies without the need to transfer the grown graphene.

The method includes a deposition of conductive catalytic film on nanotubes, such that the nanotubes are uniformly coated. Following the film deposition, a CVD growth of graphene is performed, which grows a uniform graphene plurality film on top of the conductive catalytic substrate. The deposition and growth sequence can be iterated several times to increase the volume of graphene layers, and adapt to the VIA current demands.

This growth allows for a scalable uniform method to fabricate multilayer graphene IC for the next generation transistors.

The IC can be fitted in diameter to connect to the bottom stacks of the transistor and scaled up in diameter for the upper layers. Thus, a modular implementation of VIAs fabrication can be achieved for the entire stack. The conductive catalytic film is suitable for use as IC layer and to improve the graphene layers electrical performance.

Examples

An inventive three-dimensional graphene film was obtained by the inventive process. Example 1

In a first step, a substrate with a three-dimensional topology in the form of nanotubes was produced. In order to fabricate anodic TiOz layers, Ti foils (Aldrich titanium foil ,0.127 mm thick, 99.7% metal basis) were used as starting material. The Ti foils were degreased by sonication in acetone, ethanol, and deionized (DI) water for 20 min, respectively and dried in a stream of nitrogen. The cleaned foils were contacted at the working electrode (WE). Anodization was carried out in a two-electrode system configuration with a power supply (VLP-2403 pro, Voltcraft). A Pt plate is used as counter electrode (CE) and was placed 20 mm from the WE, in order to have a sufficient electrolyte volume between the two electrodes. The CE was parallel to the WE for a uniform current distribution and this configuration avoids accumulation of gas bubbles at both the WE and CE. An electrolyte was prepared with pure solid orthophosphoric acid ( O-H3PO4 , Sigma-Aldrich), which is melted at 100°C. Prior to anodization, the melted O-H3PO4 was mixed with 3M of HF (40% purity, Sigma-Aldrich), and held at 100 °C for 30 min to reduce the water content. Anodization was carried out in a mixture of 3M HF in O-H3PO4 at 100 °C at 15 V for 2 hours to fabricate highly ordered TiOz nanotubes on the Ti foils. After the anodization, the nanotube films were rinsed with ethanol and dried in an N2 stream.

In a second step, the three-dimensional substrate is conformally coated with an intermediate layer of SiOz. The SiOz film is deposited by thermal atomic layer deposition with AP-LTO®330 as Si precursor. The co-reactant half cycles are carried out with O3 as the oxygen source.

Deposition temperature was set to 300 °C. Film thickness of 10 nm of SiOz is deposited by the thermal ALD process.

After deposition of SiOz, the three-dimensional surface is coated with a catalyst layer of molybdenum carbide by means of plasma enhanced atomic layer deposition (PEALD). bis(tert-butylimido)-bis(dimethylamido)- molybdenum, Mo(^lBuN)2(NMe2)2 (98%, Strem Chemicals), was employed as precursor. The precursor was bubbled by an argon flow of 50 seem during the precursor dose step to the reaction chamber. During the plasma exposure step, a co-reactant Hz/Ar is flowed to the reaction chamber, with a 4: 1 ratio.

In a third step a high-quality graphene film was grown conformally on the catalyst layer. The MoCx coated nanotubes films were saturated with carbon by annealing for 2 hours at 800 °C under low pressure of 4 mbar with Cl- as carbon feedstoock. Subsequently, graphene films were grown under similar conditions at 1100 °C for 10 minutes.

Example 2

In a second step, the three-dimensional substrate was conformally coated with an intermediate layer of MoOx. The MoOx film is deposited by plasma enhanced atomic layer deposition with bis(tert-butylimido)-bis(dimethylamido)- molybdenum, Mo(^lBuN)2(NMe2)2 (98%, Strem Chemicals), as a Mo precursor. The plasma half cycle consisted of O2 gas for oxidation. Deposition temperature is set to 200 °C. Film thickness of 10 nm of MoOx is deposited by the PEALD process.

After deposition of MoOx, the three-dimensional surface is coated with a catalyst layer of molybdenum carbide by means of plasma enhanced atomic layer deposition (PEALD). Bis(tert-butylimido)-bis(dimethylamido)- molybdenum, Mo(^tBuN)2(NMe2)2 was employed as precursor. The precursor was bubbled by an argon flow of 50 seem during the precursor dose step to the reaction chamber. During the plasma exposure step, a co-reactant H2/Ar is flowed to the reaction chamber, with a 4: 1 ratio.

In a third step a high-quality graphene film was grown conformally on the catalyst layer. The MoCx coated nanotubes films were saturated with carbon by annealing for 2 hours at 800 °C under low pressure of 4 mbar with CP as carbon feedstoock. Subsequently, graphene films were grown under similar conditions at 1100 °C for 10 minutes.

Example 3

In a first step, a substrate with a three-dimensional topology in the form of nanotubes was produced. In order to fabricate anodic TiC layers, Ti foils (Aldrich titanium foil ,0.127 mm thick, 99.7% metal basis) were used as starting material. The Ti foils were degreased by sonication in acetone, ethanol, and deionized (DI) water for 20 min, respectively and dried in a stream of nitrogen. The cleaned foils were contacted at the working electrode (WE). Anodization was carried out in a two-electrode system configuration with a power supply (VLP-2403 pro, Voltcraft). A Pt plate is used as counter electrode (CE) and was placed 20 mm from the WE, in order to have a sufficient electrolyte volume between the two electrodes. The CE was parallel to the WE for a uniform current distribution and this configuration avoids accumulation of gas bubbles at both the WE and CE. An electrolyte was prepared with pure solid orthophosphoric acid (O-H3PO4 , Sigma-Aldrich), which is melted at 100°C. Prior to anodization, the melted O-H3PO4 was mixed with 3M of HF (40% purity, Sigma-Aldrich), and held at 100 °C for 30 min to reduce the water content. Anodization was carried out in a mixture of 3M HF in O-H3PO4 at 100 °C at 15 V for 2 hours to fabricate highly ordered TiC nanotubes on the Ti foils. After the anodization, the nanotube films were rinsed with ethanol and dried in an N2 stream.

In a second step, the three-dimensional substrate was conformally coated with a catalyst layer of molybdenum carbide by means of plasma enhanced atomic layer deposition (PEALD). Mo(^tBuN)2(NMe2)2 was employed as precursor. The precursor was bubbled by an argon flow of 50 seem during the precursor dose step to the reaction chamber. During the plasma exposure step, a co-reactant hh/Ar is flowed to the reaction chamber, with a 4: 1 ratio.

In a third step a high-quality graphene film was grown conformally on the catalyst layer. The MoCx coated nanotubes films were saturated with carbon by annealing for 2 hours at 800 °C under low pressure of 4 mbar with Ch as carbon feedstoock. Subsequently, graphene films were grown under similar conditions at 1300 °C for 15 minutes with Ch as carbon feedstoock.

Example 4

In a first step, a substrate with a three-dimensional topology in the form of nanotubes was produced. Thin Ti films of 500 nm were deposited on SiO2 substrates by ion beam sputter deposition method. The applied acceleration voltage was 2500 V and the deposition was at room temperature. Pure Ar was employed as the sputtering gas. The thin Ti films were contacted at the working electrode (WE). Anodization was carried out in a two-electrode system configuration with a power supply (VLP-2403 pro, Voltcraft). A Pt plate is used as counter electrode (CE) and was placed 20 mm from the WE, in order to have a sufficient electrolyte volume between the two electrodes. The CE was parallel to the WE for a uniform current distribution and this configuration avoids accumulation of gas bubbles at both the WE and CE. The electrochemical anodization was performed in IM H2SO4 +0.15 wt. %HF at an applied potential of 10 V. Anodization was carried out for 1 hour to fabricate highly ordered TiC nanotubes on the Ti thin film. After the anodization, the nanotube films were annealed at 450 °C in an N2 stream. In a second step, the three-dimensional substrate was conformally coated with an intermediate layer of SiOz. The SiOz film is deposited by plasma enhanced atomic layer deposition with BDEAS (H2Si[N(C2Hs)2]2), as a silicone precursor. The plasma half cycle consisted of O2 gas for oxidation.

Deposition temperature is set to 200 °C . Film thickness of 10 nm of SiO2 is deposited by the PEALD process.

After deposition of SiO2, the three-dimensional surface is coated with a catalyst layer of molybdenum carbide by means of plasma enhanced atomic layer deposition (PEALD). Bis(tert-butylimido)-bis(dimethylamido)- molybdenum, Mo(^tBuN)2(NMe2)2 was employed as precursor. The precursor was bubbled by an argon flow of 50 seem during the precursor dose step to the reaction chamber. During the plasma exposure step, a co-reactant H2/Ar is flowed to the reaction chamber, with a 4: 1 ratio.

Figures 1 to 3 schematically depict the shape of the obtained products, having three layers of substrate, catalyst and the surface graphene film layer. Figures 5 to 7 show the three-layered structure of a single nanotube, comprising a nanotube 3, an ALD catalyst coating 4 and graphene film 5. In Examples 1,2, and 4 the catalyst coating 4 comprises an intermediate layer and the actual catalyst layer, whereas in Example 3, the catalyst coating 4 consists of only a single catalyst layer. Figures 8 and 9 depict the intermediate layer 6, between nanotube 3 and ALD catalyst coating 4.

Claims

1. Process for the preparation of three-dimensional graphene films comprising the steps of a) providing a substrate having a three-dimensional surface topology b) coating at least a portion of the substrate conformally with a catalyst layer c) conformally growing a graphene film on at least a portion of the catalyst coating, wherein the graphene film comprises one or more graphene layers.

2. Process according to claim 1, wherein the three-dimensional topology of the substrate comprises a plurality of protruding structures, especially nanotubes, nanopillars, nanowires, and a plurality of cavities between two or more protruding structures.

3. Process according to claim 2, wherein a ratio between a surface area of the protruding structures and corresponding cavities and a base area on the substrate covered by said protruding structures and cavities is in the range of from 5 to 100,000, especially 100 to 100,000.

4. Process according to one or more of claims 1 to 3, wherein the substrate having a three-dimensional topology is provided by growing vertical structures on a substrate having a two-dimensional topology, especially by anodization in electrolytic liquid.

5. Process according to one or more of claims 1 to 4, wherein the catalyst layer comprises elementary or compound transition metals or metals deposited in a conformal way.

6. Process according to claim 5, wherein the catalyst layer comprises carbides and/or nitrides of Mo, W, Ta, Ti, Nb, Zr, Va, La, Yt, Cr, Hf, Ni, Cu or Pt.

7. Process according to one or more of claims 1 to 6, wherein conformally coating of the substrate with a catalyst layer comprises thin film deposition techniques.

8. Process according to claim 7, wherein said thin film deposition techniques comprise atomic layer deposition (ALD), especially plasma enhanced atomic layer deposition (PEALD), physical vapour deposition (PVD) or chemical vapour deposition (CVD).

9. Process according to claim 8, wherein coating of the substrate comprises plasma enhanced atomic layer deposition comprising at least one precursor dose step, a first purge step, a plasma exposure step and a second purge step, wherein the catalyst layer comprises a carbide of Mo, W, Ta, Ti, Nb, Zr, V, La, Yt, Cr, Hf, Ni, Cu or Pt.

10. Process according to one or more of claims 1 to 9, wherein conformally growing a graphene film on the catalyst coating comprises thermal treatment at a temperature between 600 and 850 °C with a carbon feedstock and subsequently growing graphene layers by a second thermal treatment at a temperature between 800 and 1300 °C.

11. Three-dimensional graphene film obtainable by a process according to one or more of claims 1 to 10.

12. Electrode comprising a three-dimensional graphene film according to claim 11 conformally on a three-dimensional substrate.

13. Supercapacitor comprising an electrode according to claim 12.

14. Use of a three-dimensional film according to claim 11 in an electrode, in a supercapacitor or in an interconnect via.