EP3931695A4 - Arithmetic and logical operations in a multi-user network - Google Patents
Arithmetic and logical operations in a multi-user network Download PDFInfo
- Publication number
- EP3931695A4 EP3931695A4 EP20762469.3A EP20762469A EP3931695A4 EP 3931695 A4 EP3931695 A4 EP 3931695A4 EP 20762469 A EP20762469 A EP 20762469A EP 3931695 A4 EP3931695 A4 EP 3931695A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- arithmetic
- logical operations
- user network
- network
- logical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17306—Intercommunication techniques
- G06F15/17331—Distributed shared memory [DSM], e.g. remote direct memory access [RDMA]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
- G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
- G06F7/607—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers number-of-ones counters, i.e. devices for counting the number of input lines set to ONE among a plurality of input lines, also called bit counters or parallel counters
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/541—Interprogram communication via adapters, e.g. between incompatible applications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45533—Hypervisors; Virtual machine monitors
- G06F9/45558—Hypervisor-specific management and integration aspects
- G06F2009/45583—Memory management, e.g. access or allocation
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16/286,941 US10990387B2 (en) | 2019-02-27 | 2019-02-27 | Converting floating-point operands into universal number format operands for processing in a multi-user network |
US16/287,156 US11074100B2 (en) | 2019-02-27 | 2019-02-27 | Arithmetic and logical operations in a multi-user network |
PCT/US2020/015369 WO2020176184A1 (en) | 2019-02-27 | 2020-01-28 | Arithmetic and logical operations in a multi-user network |
Publications (2)
Publication Number | Publication Date |
---|---|
EP3931695A1 EP3931695A1 (en) | 2022-01-05 |
EP3931695A4 true EP3931695A4 (en) | 2022-12-14 |
Family
ID=72238547
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP20762469.3A Withdrawn EP3931695A4 (en) | 2019-02-27 | 2020-01-28 | Arithmetic and logical operations in a multi-user network |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP3931695A4 (en) |
KR (1) | KR20210121266A (en) |
CN (1) | CN113508363B (en) |
WO (1) | WO2020176184A1 (en) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5652862A (en) * | 1992-12-30 | 1997-07-29 | Apple Computer, Inc. | Method and appartus for determining a precision of an intermediate arithmetic for converting values between a first numeric format and a second numeric format |
US7353368B2 (en) * | 2000-02-15 | 2008-04-01 | Intel Corporation | Method and apparatus for achieving architectural correctness in a multi-mode processor providing floating-point support |
US7555566B2 (en) * | 2001-02-24 | 2009-06-30 | International Business Machines Corporation | Massively parallel supercomputer |
US20180217838A1 (en) * | 2017-02-01 | 2018-08-02 | Futurewei Technologies, Inc. | Ultra lean vector processor |
US10713088B2 (en) * | 2017-03-23 | 2020-07-14 | Amazon Technologies, Inc. | Event-driven scheduling using directed acyclic graphs |
US20190004878A1 (en) * | 2017-07-01 | 2019-01-03 | Intel Corporation | Processors, methods, and systems for a configurable spatial accelerator with security, power reduction, and performace features |
-
2020
- 2020-01-28 EP EP20762469.3A patent/EP3931695A4/en not_active Withdrawn
- 2020-01-28 KR KR1020217030046A patent/KR20210121266A/en not_active Application Discontinuation
- 2020-01-28 CN CN202080016545.5A patent/CN113508363B/en active Active
- 2020-01-28 WO PCT/US2020/015369 patent/WO2020176184A1/en unknown
Non-Patent Citations (5)
Title |
---|
ANONYMOUS: "Unum (number format) - Wikipedia", 20 February 2019 (2019-02-20), pages 1 - 9, XP055969876, Retrieved from the Internet <URL:https://en.wikipedia.org/w/index.php?title=Unum_(number_format)&oldid=884306755> [retrieved on 20221011] * |
IVAN GONZALEZ ET AL: "Virtualization of reconfigurable coprocessors in HPRC systems with multicore architecture", JOURNAL OF SYSTEMS ARCHITECTURE, ELSEVIER BV, NL, vol. 58, no. 6, 12 March 2012 (2012-03-12), pages 247 - 256, XP028521582, ISSN: 1383-7621, [retrieved on 20120323], DOI: 10.1016/J.SYSARC.2012.03.002 * |
JAISWAL MANISH KUMAR ET AL: "Universal number posit arithmetic generator on FPGA", 2018 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), EDAA, 19 March 2018 (2018-03-19), pages 1159 - 1162, XP033334031, DOI: 10.23919/DATE.2018.8342187 * |
KIDANE HILIWI LEAKE ET AL: "NoC Based Virtualized Accelerators for Cloud Computing", 2016 IEEE 10TH INTERNATIONAL SYMPOSIUM ON EMBEDDED MULTICORE/MANY-CORE SYSTEMS-ON-CHIP (MCSOC), IEEE, 21 September 2016 (2016-09-21), pages 133 - 137, XP033018408, DOI: 10.1109/MCSOC.2016.21 * |
See also references of WO2020176184A1 * |
Also Published As
Publication number | Publication date |
---|---|
CN113508363A (en) | 2021-10-15 |
WO2020176184A1 (en) | 2020-09-03 |
CN113508363B (en) | 2022-09-16 |
EP3931695A1 (en) | 2022-01-05 |
KR20210121266A (en) | 2021-10-07 |
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Legal Events
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STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE |
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DAX | Request for extension of the european patent (deleted) | ||
A4 | Supplementary search report drawn up and despatched |
Effective date: 20221110 |
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RIC1 | Information provided on ipc code assigned before grant |
Ipc: G06F 9/54 20060101ALI20221104BHEP Ipc: G06F 7/57 20060101ALI20221104BHEP Ipc: G06F 7/544 20060101ALI20221104BHEP Ipc: G06F 7/575 20060101ALI20221104BHEP Ipc: G06F 7/60 20060101ALI20221104BHEP Ipc: G06F 15/173 20060101ALI20221104BHEP Ipc: G06F 9/50 20060101ALI20221104BHEP Ipc: G06F 9/455 20180101AFI20221104BHEP |
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Effective date: 20230922 |