EP3895018A4 - Vérification de synchronisme de matériel dans un intervalle de détection de défaillance dans un système sur puce - Google Patents

Vérification de synchronisme de matériel dans un intervalle de détection de défaillance dans un système sur puce Download PDF

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Publication number
EP3895018A4
EP3895018A4 EP19894625.3A EP19894625A EP3895018A4 EP 3895018 A4 EP3895018 A4 EP 3895018A4 EP 19894625 A EP19894625 A EP 19894625A EP 3895018 A4 EP3895018 A4 EP 3895018A4
Authority
EP
European Patent Office
Prior art keywords
hardware
chip
fault detection
detection interval
lockstep checking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP19894625.3A
Other languages
German (de)
English (en)
Other versions
EP3895018A1 (fr
Inventor
Umberto Santoni
Rahul Pal
Philip Abraham
Mahesh Mamidipaka
C Santhosh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of EP3895018A1 publication Critical patent/EP3895018A1/fr
Publication of EP3895018A4 publication Critical patent/EP3895018A4/fr
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1683—Temporal synchronisation or re-synchronisation of redundant processing components at instruction level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/273—Tester hardware, i.e. output processing circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1633—Error detection by comparing the output of redundant processing systems using mutual exchange of the output between the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
EP19894625.3A 2018-12-12 2019-11-27 Vérification de synchronisme de matériel dans un intervalle de détection de défaillance dans un système sur puce Pending EP3895018A4 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/218,078 US10831628B2 (en) 2018-12-12 2018-12-12 Hardware lockstep checking within a fault detection interval in a system on chip
PCT/US2019/063607 WO2020123159A1 (fr) 2018-12-12 2019-11-27 Vérification de synchronisme de matériel dans un intervalle de détection de défaillance dans un système sur puce

Publications (2)

Publication Number Publication Date
EP3895018A1 EP3895018A1 (fr) 2021-10-20
EP3895018A4 true EP3895018A4 (fr) 2022-09-14

Family

ID=66095804

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19894625.3A Pending EP3895018A4 (fr) 2018-12-12 2019-11-27 Vérification de synchronisme de matériel dans un intervalle de détection de défaillance dans un système sur puce

Country Status (4)

Country Link
US (1) US10831628B2 (fr)
EP (1) EP3895018A4 (fr)
CN (1) CN113168366A (fr)
WO (1) WO2020123159A1 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10831628B2 (en) 2018-12-12 2020-11-10 Intel Corporation Hardware lockstep checking within a fault detection interval in a system on chip
KR20210044364A (ko) 2019-10-14 2021-04-23 삼성전자주식회사 이미지 센서
US11221901B2 (en) 2019-11-26 2022-01-11 Siemens Industry Software Inc. Monitoring processors operating in lockstep
KR20210084871A (ko) 2019-12-30 2021-07-08 삼성전자주식회사 안전 민감 데이터의 무결성 점검 장치 및 이를 포함하는 전자 기기
JP7312141B2 (ja) * 2020-05-25 2023-07-20 ルネサスエレクトロニクス株式会社 半導体装置
US11513883B2 (en) * 2021-01-29 2022-11-29 Stmicroelectronics International N.V. Glitch absorption apparatus and method
US11550684B2 (en) * 2021-04-19 2023-01-10 Nxp B.V. Testing of lockstep architecture in system-on-chips
US11892505B1 (en) * 2022-09-15 2024-02-06 Stmicroelectronics International N.V. Debug and trace circuit in lockstep architectures, associated method, processing system, and apparatus
CN116821038B (zh) * 2023-08-28 2023-12-26 英特尔(中国)研究中心有限公司 用于处理器的锁步控制装置和方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007005818A2 (fr) * 2005-06-30 2007-01-11 Intel Corporation Reduction du taux d'erreurs incorrigibles dans un systeme de redondance a double module en mode perpetuel
EP2722760A1 (fr) * 2012-10-18 2014-04-23 Renesas Electronics Corporation Dispositif semi-conducteur
US20180059180A1 (en) * 2016-09-01 2018-03-01 Texas Instruments Incorporated Self Test for Safety Logic

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6055660A (en) * 1997-10-02 2000-04-25 International Business Machines Corporation Method for identifying SMP bus transfer errors
US7502958B2 (en) * 2004-10-25 2009-03-10 Hewlett-Packard Development Company, L.P. System and method for providing firmware recoverable lockstep protection
JP3897046B2 (ja) 2005-01-28 2007-03-22 横河電機株式会社 情報処理装置および情報処理方法
US7412353B2 (en) * 2005-09-28 2008-08-12 Intel Corporation Reliable computing with a many-core processor
US8117512B2 (en) 2008-02-06 2012-02-14 Westinghouse Electric Company Llc Failure detection and mitigation in logic circuits
US7890831B2 (en) * 2008-06-10 2011-02-15 Globalfoundries Inc. Processor test system utilizing functional redundancy
DE102011086530A1 (de) 2010-11-19 2012-05-24 Continental Teves Ag & Co. Ohg Mikroprozessorsystem mit fehlertoleranter Architektur
KR101560497B1 (ko) 2014-09-26 2015-10-15 성균관대학교산학협력단 락스텝으로 이중화된 프로세서 코어들의 리셋 제어 방법 및 이를 이용하는 락스텝 시스템
US10169240B2 (en) * 2016-04-08 2019-01-01 Qualcomm Incorporated Reducing memory access bandwidth based on prediction of memory request size
US10482024B2 (en) * 2017-07-20 2019-11-19 Alibaba Group Holding Limited Private caching for thread local storage data access
US10831628B2 (en) 2018-12-12 2020-11-10 Intel Corporation Hardware lockstep checking within a fault detection interval in a system on chip

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007005818A2 (fr) * 2005-06-30 2007-01-11 Intel Corporation Reduction du taux d'erreurs incorrigibles dans un systeme de redondance a double module en mode perpetuel
EP2722760A1 (fr) * 2012-10-18 2014-04-23 Renesas Electronics Corporation Dispositif semi-conducteur
US20180059180A1 (en) * 2016-09-01 2018-03-01 Texas Instruments Incorporated Self Test for Safety Logic

Also Published As

Publication number Publication date
US10831628B2 (en) 2020-11-10
CN113168366A (zh) 2021-07-23
US20190114243A1 (en) 2019-04-18
WO2020123159A1 (fr) 2020-06-18
EP3895018A1 (fr) 2021-10-20

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