EP3855675A4 - Network card, time synchronization method and device and computer storage medium - Google Patents

Network card, time synchronization method and device and computer storage medium Download PDF

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Publication number
EP3855675A4
EP3855675A4 EP19863839.7A EP19863839A EP3855675A4 EP 3855675 A4 EP3855675 A4 EP 3855675A4 EP 19863839 A EP19863839 A EP 19863839A EP 3855675 A4 EP3855675 A4 EP 3855675A4
Authority
EP
European Patent Office
Prior art keywords
storage medium
computer storage
time synchronization
network card
synchronization method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP19863839.7A
Other languages
German (de)
French (fr)
Other versions
EP3855675A1 (en
EP3855675B1 (en
Inventor
Xiangwu Cui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZTE Corp
Original Assignee
ZTE Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ZTE Corp filed Critical ZTE Corp
Publication of EP3855675A1 publication Critical patent/EP3855675A1/en
Publication of EP3855675A4 publication Critical patent/EP3855675A4/en
Application granted granted Critical
Publication of EP3855675B1 publication Critical patent/EP3855675B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12Synchronisation of different clock signals provided by a plurality of clock generators
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658Clock or time synchronisation among packet nodes
    • H04J3/0661Clock or time synchronisation among packet nodes using timestamps
    • H04J3/0667Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0331Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45595Network integration; Enabling network access in virtual machine instances

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Electric Clocks (AREA)
  • Computer And Data Communications (AREA)
EP19863839.7A 2018-09-20 2019-08-15 Network card, time synchronization method and device and computer storage medium Active EP3855675B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201811102873.8A CN110932839B (en) 2018-09-20 2018-09-20 Network card, time synchronization method, equipment and computer storage medium
PCT/CN2019/100749 WO2020057303A1 (en) 2018-09-20 2019-08-15 Network card, time synchronization method and device and computer storage medium

Publications (3)

Publication Number Publication Date
EP3855675A1 EP3855675A1 (en) 2021-07-28
EP3855675A4 true EP3855675A4 (en) 2022-06-15
EP3855675B1 EP3855675B1 (en) 2024-10-09

Family

ID=69855580

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19863839.7A Active EP3855675B1 (en) 2018-09-20 2019-08-15 Network card, time synchronization method and device and computer storage medium

Country Status (5)

Country Link
US (1) US11609598B2 (en)
EP (1) EP3855675B1 (en)
JP (1) JP2021506037A (en)
CN (1) CN110932839B (en)
WO (1) WO2020057303A1 (en)

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CN111865466B (en) * 2020-07-10 2023-11-03 润电能源科学技术有限公司 Time synchronization method, device, time-given equipment and storage medium
CN111857237B (en) * 2020-07-27 2023-09-08 超越科技股份有限公司 Clock synchronization method, system, equipment and medium
CN112350718B (en) 2020-09-25 2023-06-27 苏州华兴源创科技股份有限公司 Clock source circuit, chassis and multi-chassis cascading system
JP2022067149A (en) * 2020-10-20 2022-05-06 株式会社オートネットワーク技術研究所 On-vehicle device, on-vehicle communication system, and synchronization control method
US11748141B2 (en) * 2020-10-30 2023-09-05 Red Hat, Inc. Providing virtual devices direct access to clock times in memory locations managed by a hypervisor
US20220006607A1 (en) * 2020-12-26 2022-01-06 Intel Corporation Timestamp alignment for multiple nodes
CN112904932A (en) * 2021-05-08 2021-06-04 鹏城实验室 Clock synchronization method, board card, computer storage medium and terminal equipment
KR102407341B1 (en) * 2021-05-14 2022-06-13 한국전자기술연구원 Method for transmitting and receiving messages of Precision Time Protocol (PTP) and apparatus therefor
US11844037B2 (en) * 2021-07-23 2023-12-12 Charter Communications Operating, Llc Automated determination of a timing offset for DOCSIS time protocol to provide precision time protocol accuracy
CN113759766A (en) * 2021-07-29 2021-12-07 苏州浪潮智能科技有限公司 Intelligent network card capable of being independently powered on and started and intelligent network card powered on starting method
US11558448B1 (en) * 2021-09-22 2023-01-17 International Business Machines Corporation Sparse information sharing system
CN114003091B (en) * 2021-10-29 2024-01-30 深圳市科思科技股份有限公司 Time synchronization method, device, equipment and storage medium
CN114679481A (en) * 2022-02-23 2022-06-28 达闼机器人股份有限公司 Robot control method and device, storage medium and robot cluster
CN117811687A (en) * 2022-09-26 2024-04-02 施耐德电器工业公司 System and method for time synchronization of multiple operating systems
CN115865803B (en) * 2023-03-03 2023-08-22 浪潮电子信息产业股份有限公司 IO request processing method, device, equipment and readable storage medium
US12063287B1 (en) 2023-04-27 2024-08-13 Keysight Technologies, Inc. Methods, systems, and computer readable media for determining an internal time of a time-sensitive networking (TSN) network card
CN117850903A (en) * 2023-12-13 2024-04-09 天翼云科技有限公司 Synchronization system and method for front end and back end based on virtio protocol

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US9344265B2 (en) * 2014-10-15 2016-05-17 Anue Systems, Inc. Network packet timing synchronization for virtual machine host systems

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US7356725B2 (en) * 2005-09-09 2008-04-08 International Business Machines Corporation Method and apparatus for adjusting a time of day clock without adjusting the stepping rate of an oscillator
US8473638B2 (en) * 2008-05-02 2013-06-25 James Aweya Method and apparatus for time and frequency transfer in communication networks
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US9344265B2 (en) * 2014-10-15 2016-05-17 Anue Systems, Inc. Network packet timing synchronization for virtual machine host systems

Non-Patent Citations (2)

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Title
D'SOUZA SANDEEP ET AL: "QuartzV: Bringing Quality of Time to Virtual Machines", 2018 IEEE REAL-TIME AND EMBEDDED TECHNOLOGY AND APPLICATIONS SYMPOSIUM (RTAS), IEEE, 11 April 2018 (2018-04-11), pages 49 - 61, XP033382522, DOI: 10.1109/RTAS.2018.00011 *
See also references of WO2020057303A1 *

Also Published As

Publication number Publication date
EP3855675A1 (en) 2021-07-28
CN110932839B (en) 2023-09-22
EP3855675B1 (en) 2024-10-09
WO2020057303A1 (en) 2020-03-26
JP2021506037A (en) 2021-02-18
US11609598B2 (en) 2023-03-21
CN110932839A (en) 2020-03-27
US20210303021A1 (en) 2021-09-30

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