EP3764169B1 - Method for frosting some parts of a silicon timepiece component - Google Patents

Description

The present invention relates to a method for roughening a silicon surface in places. It relates more particularly to a method for roughening in places a silicon surface of a wafer in which a watch component will then be micro-machined or, alternatively, for roughening in places a silicon surface of the watch component itself or of the blank of this one.

In this document, the verb "to roughen" has the meaning of attacking a surface so as to remove its "polish". A surface is thus qualified as “frosted” when it has sufficient roughness to diffuse or absorb the incident light. Finally, in the context of the present document, a surface is said to be rough when it has an irregular relief comprising hollows and peaks, these hollows, or craters, having a depth ranging from a hundred nanometers to one micrometer.

PRIOR ART

Reflecting both fashion and technology, the world of watchmaking places a special emphasis on aesthetics. This is probably the reason why the use of decorated components is commonplace there. One thinks in particular (but not exclusively) of watch dials, which are often adorned with engravings. These traditional decorations exist in many varieties, chiselling, guillochage, beading, sunburst, or Côtes de Genève, etc.

Today, more and more watch components are made of silicon. However, this material has a major drawback: it is fragile. If it is subjected to stresses that exceed a certain intensity, it breaks without prior plastic deformation. Indeed, silicon is absolutely not ductile, and it will therefore be understood that it cannot be engraved using the traditional techniques of watchmakers.

Crystalline silicon is opaque and reflects light. Its appearance is that of a dark gray metal. This shade can give a somewhat austere appearance to parts made of silicon. In order to remedy this drawback and to give a somewhat more cheerful appearance to these components, it has been proposed to coat their surface with a thin layer of transparent dioxide. Indeed, this layer of silicon dioxide is the scene of light interference phenomena accompanied by the appearance of iridescent colors. The latter have the particularity of being dependent on the angle of observation. Components that feature such rainbow-colored surfaces are highly valued. The fact remains that a need remains for those skilled in the art to have a method allowing them to work on the appearance of the surfaces of watchmaking components in silicon, in a way that makes it possible to confer on each model of timepieces a truly unique personality.

There are known documents describing processes using DRIE type etching on silicon substrates, for example EP 3 109 199 A1 Or EP 3 002 635 A1 .

BRIEF DESCRIPTION OF THE INVENTION

An object of the present invention is to remedy the problems of the prior art which have just been explained. The present invention achieves this and other objects by providing a method for spot-etching a silicon surface which is in accordance with appended claim 1.

In accordance with step (a) of the method of the invention, the places of the silicon surface which will be roughened are first delimited by producing an etching mask comprising openings.

In accordance with step (b) of the method of the invention, a sacrificial layer of resin is deposited on the etching mask and inside its openings. In accordance with the invention, the production of the sacrificial layer does not involve either exposure or annealing of the resin of the sacrificial layer. An advantage of this feature is that it contributes to shortening and simplifying the implementation of step (b) of the method.

In accordance with step (c) of the process of the invention, the sacrificial resin layer is then attacked by deep reactive ion etching (usually designated by its English acronym "DRIE"), so as to transfer inhomogeneities from the sacrificial layer on the places to roughen the silicon surface. Deep reactive ion etching is the most commonly used etching technique for micromachining silicon-based components. This technique is already described in particular in the patent document WO 94/14187 in the name of Robert Bosch GmbH. This document is incorporated by reference in the present description. Deep reactive ion etching makes it possible to etch nearly vertical flank profiles in a silicon-based substrate by applying a procedure that alternates the steps of depositing an inert passivation layer and plasma etching. The steps of deposition of the passivation layer and those of etching all call for fluorinated compounds, so that they take place in the same chemical context. Each step lasts a few seconds, the passivation layer is formed over the entire surface of the substrate, so that the latter is protected against any subsequent etching. However, during the etching step which follows, the bombardment by ions which are accelerated vertically disintegrates the part of the passivation layer which is at the bottom of the profiles (but not that which covers the sides thereof). The bottom of the profiles is thus very quickly exposed to reactive etching. It will be understood from the foregoing that deep reactive ion etching, which occurs in step (c) of the process of the invention, is distinguished from other current etching processes by its highly anisotropic, almost unidirectional character. One advantage of using the deep reactive ion etching technique is therefore that it makes it possible to transfer the inhomogeneities of the sacrificial layer to the substrate with high resolution and without attenuation. It is important to note that this advantage is not found with the other current techniques which have a lesser degree of anisotropy. Indeed, with these less anisotropic techniques, the considerable divergence which exists between the directions of Etching only allows the transfer of a strongly attenuated roughness onto the silicon surface.

As will be seen in more detail below, the different embodiments of the invention make it possible to roughen in places, in identical or different ways, the surface of a silicon wafer in which a watchmaking component or, alternatively, to roughen in places one surface, or several surfaces, of said watchmaking component itself or of the blank thereof. It will be noted that the wafer, the timepiece component, or its blank, may or may not have been previously covered with a layer of SiO ₂ . The invention makes it possible to combine on the same plate, blank or component, two different effects, such as matte and shiny or polished and frosted, which offers new possibilities in the dressing.

Advantageously, the surfaces frosted in places correspond to surfaces visible from the outside of the timepiece. The frosted surfaces are also preferably located in non-functional areas of the timepiece components, so as not to interfere with the timepiece mechanisms and to maintain optimum mechanical properties.

BRIEF DESCRIPTION OF FIGURES

• les figures 1 à 5 sont des vues schématiques en coupe verticale qui constituent cinq instantanés successifs au cours de la mise en oeuvre d'un procédé pour dépolir par endroit une surface en silicium, qui est conforme à un premier mode de mise oeuvre particulier de de l'invention ;
• les figures 6 à 11 sont des vues schématiques en coupe verticale qui constituent six instantanés successifs au cours de la mise en oeuvre d'un procédé pour dépolir par endroit une surface en silicium, qui est conforme à un deuxième mode de mise oeuvre particulier de de l'invention ;

• la figure 12 est une vue photographique montrant la face supérieure d'un wafer en silicium dont la surface a été dépolie par endroits en appliquant l'un ou l'autre des deux modes de mise en oeuvre particuliers de l'invention qui font respectivement l'objet des figures 1 à 5 et 6 à 11 ;
• les figures 13 et 14 sont deux vues schématiques en coupe verticale qui constituent deux instantanés au cours de la réalisation de composants horloger par micro-usinage d'un wafer en silicium dont la surface a préalablement été dépolie par endroits à l'aide de l'un ou l'autre des deux modes de mise en oeuvre particuliers de l'invention qui font respectivement l'objet des figures 1 à 5 et 6 à 11 ;
• les figures 15 et 16 sont deux vues au microscope d'un spiral à base de silicium dont la surface a été dépolie par endroits en appliquant un troisième mode de mise en oeuvre particulier de l'invention, ce dernier faisant l'objet des figures 20 à 23 ;
• les figures 17 à 19 sont des vues schématiques en coupe verticale qui constituent trois instantanés successifs montrant la réalisation de l'ébauche d'un composant horloger en silicium par micro-usinage d'un wafer SOI ;
• les figures 20 à 23 sont des vues schématiques en coupe verticale qui constituent quatre instantanés successifs au cours de la mise en oeuvre d'un procédé pour dépolir par endroit une surface en silicium, qui est conforme à un troisième mode de mise oeuvre particulier de de l'invention.

Other characteristics and advantages of the present invention will appear on reading the following description, given solely by way of non-limiting example, and made with reference to the appended drawings in which:

• THE figures 1 to 5 are schematic views in vertical section which constitute five successive snapshots during the implementation of a method for roughening a silicon surface in places, which is in accordance with a first particular embodiment of the invention;
• THE figures 6 to 11 are schematic views in vertical section which constitute six successive snapshots during the implementation a method for roughening a silicon surface in places, which conforms to a second particular embodiment of the invention;

• there figure 12 is a photographic view showing the upper face of a silicon wafer whose surface has been roughened in places by applying one or the other of the two particular embodiments of the invention which are respectively the subject of the figures 1 to 5 And 6 to 11 ;
• THE figures 13 and 14 are two schematic views in vertical section which constitute two snapshots during the production of watchmaking components by micro-machining of a silicon wafer whose surface has previously been roughened in places using one or the other of the two particular embodiments of the invention which are respectively the subject of the figures 1 to 5 And 6 to 11 ;
• THE figures 15 and 16 are two views under a microscope of a silicon-based hairspring whose surface has been roughened in places by applying a third particular mode of implementation of the invention, the latter being the subject of the figures 20 to 23 ;
• THE figures 17 to 19 are schematic views in vertical section which constitute three successive snapshots showing the production of the blank of a watchmaking component in silicon by micro-machining of an SOI wafer;
• THE figures 20 to 23 are schematic views in vertical section which constitute four successive snapshots during the implementation of a method for roughening a silicon surface in places, which is in accordance with a third particular embodiment of the invention.

DETAILED DESCRIPTION OF MODES OF IMPLEMENTATION

A first exemplary embodiment of the method of the invention will now be described with reference to the figures 1 to 5 appended which are five schematic views in vertical section which illustrate successive instants of the implementation. There Figure 1 illustrates an object (referenced 2) which comprises at least one silicon surface 4 which it is desired to roughen in places using the method of the invention. In accordance with the example illustrated, the term “object” designates a silicon wafer. It will however be understood that in accordance with other variants (not illustrated), this term could alternatively designate a timepiece component based on silicon or the blank of such a component.

There figure 2 illustrates the object 2 following the production by photolithography of an openwork etching mask 6 on the silicon surface 4. This mask 6 can be produced in any manner known to those skilled in the art. In particular by first depositing a layer of photosensitive resin on surface 4, and then structuring this layer by photolithography before subjecting it to annealing. In the present example, the layer of photoresist is a layer of AZ _® 9260 whose thickness is approximately 7 microns. It will however be understood that the resin can of course be of another type. Moreover, its thickness is obviously not necessarily 7 microns. The thickness of the resin layer is typically, but not necessarily, between 5 and 15 microns.

There picture 3 illustrates the object 2 following the deposition of a sacrificial layer 8 of resin on the etching mask 6 and on the parts of the surface 4 which are exposed through the openings of the mask 6. The sacrificial layer of resin generally has a thickness less than or equal to 5 microns, typically less than or equal to 3 microns. In the present example, the sacrificial layer 8 is produced with positive photosensitive resin of the AZ _® 1518 type. This particular resin is suitable for producing thin layers. By way of example, the resin can be applied with a spinner at 5000 revolutions/minute. This speed leads to the deposition of a thin layer whose thickness is approximately 1.8 microns. In accordance with the invention, once the resin which forms the sacrificial layer 8 has been deposited, one passes to the subsequent etching step without having exposed or annealed the resin layer 8 beforehand.

There figure 4 illustrates object 2 after the aforementioned etching step. This etching step consists in attacking the layer of sacrificial resin 8 by deep reactive ion etching (DRIE). Table I below indicates the main parameters used in the present example to implement the DRIE etching. <u>Table I</u> step Pressure Power LF Platen Pulsing He BP Gas Temp Loop PPS/PSS Primary Secondary Time s mT W W Hz /% mT sccm sccm ° C number / min GR DEP 1 30 2800/300 70 150/20 0 C4F8-O2/200-50 30 300 E1 1 40 2800/600 0 150/20 0 SF6/300 22.50 E2 2.5 40 2800/600 0 150/20 0 SF6-C4F8/300

In accordance with what Table I indicates, the version of the DRIE process used in the present example is based on a cycle consisting of a step (designated by the acronym DEP) of forming a passivation layer, followed by two distinct steps (respectively designated by E1 and E2) plasma etching. To form the passivation layer, a gas mixture formed of 4/5 C ₄ F ₈ and 1/5 O ₂ is injected. For the first etching step E1, a first plasma produced from SF ₆ is used. The function of this first plasma is to disintegrate the part of the passivation layer which is at the bottom of the profiles. As for the second etching step E2, it uses a plasma formed from a mixture of SF ₆ and C ₄ F ₈ . The function of this second plasma is to hollow out the profiles by reactive etching of the bottom of the latter.

• la température du procédé (c.-à-d. la température de l'objet 2) est de 30°C. Autrement dit, elle est supérieure à la température ambiante, alors que la température est normalement comprise entre -10°C et 20°C. Dans ces conditions, la couche sacrificielle 8 cuit de manière inhomogène, jusqu'à ce qu'elle soit consommée totalement ;
• on effectue la gravure sans faire passer de flux d'Hélium au dos de l'objet 2. Autrement dit, on supprime la circulation de gaz sous la plaque support de l'appareil. En effet, ce gaz est susceptible de contribuer au refroidissement de l'objet 2. Dans les applications courantes en revanche, on a l'habitude d'injecter un flux d'hélium à cet endroit sous une pression comprise entre 5mT et 15mT ;
• la valeur indiquée dans la colonne intitulée « LF Platen » correspond à la puissance qui est utilisée pour accélérer les ions dans la direction perpendiculaire à la surface 4. La puissance d'accélération contribue à l'inhomogénéité. Dans le présent exemple, on donne une valeur inhabituellement élevée à cette puissance pendant la phase de passivation (DEP), de l'ordre de 30 à 50 Watts, typiquement 40 Watts. Alors que, dans les applications courantes la puissance est normalement comprise entre 0 et 20 Watts durant la phase DEP et comprise entre 30 et 150 Watts durant les phases E1 et E2.

The etching step, the result of which is illustrated in the figure 4 aims to create inhomogeneities in the sacrificial layer 8 and to transfer the latter to the places of the silicon surface 4 which it is desired to roughen. With the aim of maximizing the roughness of the surface 4 at the places to be roughened, the parameters which appear in Table I are preferably used for carrying out the DRIE etching. These settings are different from those typically used for more traditional deep reactive ion etching applications. It will however be understood that the person skilled in the art can freely choose the values of the etching parameters, from among the values which seem to him adequate, without departing from the scope of the invention. The main differences between the values of the The parameters listed in Table I and the values one would normally use for traditional DRIE etching are listed below:

• the process temperature (ie the temperature of object 2) is 30°C. In other words, it is higher than the ambient temperature, whereas the temperature is normally between -10°C and 20°C. Under these conditions, the sacrificial layer 8 cooks unevenly, until it is completely consumed;
• the etching is carried out without passing any flow of helium on the back of the object 2. In other words, the circulation of gas under the support plate of the device is suppressed. Indeed, this gas is likely to contribute to the cooling of the object 2. In current applications, on the other hand, it is customary to inject a flow of helium at this location under a pressure of between 5 mT and 15 mT;
• the value shown in the column labeled “LF Platen” corresponds to the power that is used to accelerate the ions in the direction perpendicular to the surface 4. The accelerating power contributes to the inhomogeneity. In the present example, an unusually high value is given to this power during the passivation phase (DEP), of the order of 30 to 50 Watts, typically 40 Watts. Whereas, in current applications, the power is normally between 0 and 20 Watts during the DEP phase and between 30 and 150 Watts during the E1 and E2 phases.

The three differences above favor a very inhomogeneous etching of the resin and thus make it possible to make the silicon surface particularly rough. A person skilled in the art will understand that he can obtain a degree of roughness suited to his particular needs by varying the above parameters.

In accordance with the invention, the DRIE etching step continues long enough to transfer inhomogeneities from the sacrificial layer 8 to the places to be roughened (or in other words rough) of the silicon surface 4. will therefore understand that the etching continues at least until emerging orifices have been created through the sacrificial layer 8. It is possible, for example, to identify this first pivotal moment by detecting the presence of silicon atoms, or of compounds comprising silicon, in the reactor in which the DRIE etching is implemented. At the other extreme, the etching should not be continued after the sacrificial layer 8 has been completely consumed. It will be understood that this second pivotal moment is concomitant with the disappearance of the chemical species characteristic of the sacrificial layer, which were present in the reactor until then. After calibrating the process, the person skilled in the art will be able to determine, for example by timing, the moment when he wishes to stop the etching. The moment that a person skilled in the art will choose for stopping the etching will be situated in the interval between the first and second pivotal moments mentioned above.

Finally, the figure 5 illustrates the object 2 following a final step consisting in eliminating the etching mask 6, the resin residues from the sacrificial layer 8, as well as other residues left by the passivation steps. In the present example, the removal of the resin and of the C ₄ F ₈ residues is carried out using an O ₂ plasma.

A second exemplary embodiment of the method of the invention will now be described with reference to the figures 6 to 11 appended which are schematic views in vertical section showing six successive instants of this particular implementation. In accordance with this second embodiment, the silicon surface which it is desired to roughen by application of the method is the surface of a wafer (reference 12). It will however be understood that in accordance with other variants (not illustrated) of this second mode of implementation, the surface in question could be that of a timepiece component based on silicon or that of the blank of such a component. .

With particular reference to figures 6 to 10 , it can be seen that, in accordance with a widespread practice, the silicon body of the wafer 12 is coated on all sides with a layer of silicon dioxide (SiO ₂ ) 15 whose thickness is about 0.8 micron. In a manner known per se, layer 15 may for example have been formed on wafer 12 by thermal oxidation of silicon at a temperature between 900°C and 1200°C.

There figure 6 illustrates the wafer 12 after a first step consisting in the production by photolithography of an openwork etching mask 16 on the upper face of the wafer 12. In the present example, the etching mask is a resin mask, and it can be produced conventionally, for example with photosensitive resin of the AZ _® 1518 type. The resin can be applied with a spinner at 4000 revolutions/minute so as to deposit a layer whose thickness is approximately 2.6 microns. The layer of resin deposited by photolithography is then structured before subjecting it to annealing.

The step whose result is illustrated in the figure 7 consists in etching the layer of SiO ₂ through the openings of the resin mask 16, so as to structure it and make an etching mask of it. In accordance with the present example, reactive ion etching (RIE) is used to completely remove the dioxide where it is exposed, so that the silicon appears wherever it needs to be etched.

There figure 8 illustrates wafer 12 after removal of resist mask 16. This removal can be accomplished in a number of ways known to those skilled in the art, and it will further be understood that it could just as easily occur later in the process. The oxide layer 15 which had been structured during the previous step is now in a position to serve as an etching mask capable of withstanding the DRIE process which will be implemented during a subsequent step. There figure 8 still shows a new sacrificial layer (referenced 18) which covers the SiO ₂ etching mask 15, as well as the silicon exposed through the openings of the mask 15. As already explained in relation to the picture 3 , the sacrificial layer 18 can be made with AZ ^® 1518 type resin. As in the case of the previous example, the resin can be applied using a spinner 5000 revolutions/minute, so as to form a thin layer whose thickness is approximately 1.8 microns.

The etching step, the result of which is illustrated in the figure 9 aims to create inhomogeneities in the sacrificial layer 18 and to transfer the latter to the places of the silicon surface which it is desired to roughen. This step can be implemented in the same way as what has already been explained above in relation to the figure 4 from the first example. In accordance with the invention, the DRIE etching step continues long enough to transfer inhomogeneities from the sacrificial layer 18 to the places to be roughened on the silicon surface, so that said places are roughened according to the degree of roughening desired.

There figure 10 illustrates the wafer 12 after the resin residues of the sacrificial layer 18 and the C ₄ F ₈ residues left by the passivation steps have been eliminated. As in the first example, residue removal can be achieved using an O2 plasma. Finally, the process step whose result is illustrated in figure 11 consists of the elimination of all the SiO ₂ which covers the wafer 12. In a known way, this step can be implemented in the form of a wet etching with BHF.

There figure 12 is a photographic view showing the upper face of a silicon wafer whose surface has been roughened in places by applying one or the other of the two exemplary embodiments of the invention which have been described so far . The areas of the silicon surface which have been roughened by the process are perfectly visible in the photograph. A review of the figure 12 makes it possible to get an idea of the innumerable graphic possibilities offered by the method of the invention for giving watchmaking components (eg, hairsprings, hands, anchors, wheels, dials, etc.) a visually unique personality.

THE figures 13 and 14 are two schematic views in vertical section which illustrate two moments during the production of watch components by micromachining from a silicon wafer whose surface has previously been frosted in places using the method of the invention. By way of example, FIG. 13 illustrates the wafer 12 whose silicon surface has previously been roughened in places in accordance with the second mode of implementation which has been described above. There figure 13 illustrates the wafer 12 following the formation of a new openwork etching mask 20 on its upper face. This new mask 20 can be produced in a conventional manner, for example by first depositing a layer approximately 7 microns thick of photosensitive resin of AZ _® 9260. Once this layer of photosensitive resin has been structured and annealed, the mask of engraving 20 must be able to withstand the DRIE process which will be implemented during a subsequent step. There figure 14 shows the wafer 12 after the implementation of the DRIE etching to cut the wafer 12 into several pieces. It is worth specifying that the cutting of a wafer by DRIE etching is already known as such. Moreover, traditional settings are preferably used for the implementation of this etching. It will be understood that at least some of the pieces represented schematically in the figure 14 , are in fact watch components or at least drafts of such components.

As we have seen, the figures 13 and 14 describe the etching of a face of a wafer by DRIE after the surface of the latter has been roughened in places using the method of the invention. We will now describe an embodiment of the invention in which, conversely, at least one watchmaking component blank (in this case the blank of a hairspring) is first cut out of a wafer before roughening the surface of the component in places. This third exemplary embodiment of the method of the invention will be described with reference to the figures 20 to 23 appended, which are schematic views in vertical section which illustrate the blank of a watchmaking component in silicon at four successive instants of the implementation of a method.

THE figures 17 to 19 are schematic views in vertical section which constitute three successive snapshots showing the production of the blank of a watchmaking component in silicon from an SOI wafer. There figure 17 illustrates the wafer SOI (silicon on insulator) referenced 22. Conventionally, this wafer consists of two layers of silicon and a layer of silicon dioxide sandwiched between the layers of silicon. There figure 17 illustrates the wafer 22 following the production of an openwork etching mask 26 by photolithography on the upper face of the wafer 22. The mask 26 can be produced in a conventional manner. For example, by proceeding in the manner described above in relation to the figure 13 .

There figure 18 illustrates the SOI 22 wafer after the top silicon layer has been etched to its full thickness (about 120 microns) by conventional DRIE etching.

There figure 19 illustrates the SOI wafer 22 after removal of the etching mask 26. In known manner, the dissolution of the mask 26 can be obtained for example by immersing the SOI wafer 22 for a few hours in a KOH solution. There figure 19 further shows that a layer of silicon dioxide 24 completely covers the surfaces of the SOI wafer 22 and of the watch component blank which is formed in its upper silicon layer. The thickness of the SiO ₂ layer is around 0.8 micron. It will be understood that the layer of dioxide 24 was formed after the removal of the etching mask 26. As already indicated in relation to the figure 6 at 10, the layer of dioxide may have been formed on the wafer 22, for example, by thermal oxidation at a temperature between 900°C and 1200°C.

THE figures 20 to 23 are schematic views in vertical section illustrating four successive instants of the third particular exemplary embodiment of the invention. As already mentioned, this third embodiment makes it possible to roughen the surface of a timepiece component or of the blank of such a component in places; the component or blank having first been cut from a wafer. In accordance with the present example, the method is implemented to etch at least in places the watch component blank, the production of which by micro-machining the SOI wafer (reference 22) has just been described in relation to the figures 17 to 19 . There figure 20 illustrates the SOI 22 wafer, as well as the timepiece component blank which is formed in the upper layer of the latter, after the part of the layer 24 of silicon dioxide which covered the upper face of the blank has been removed. In the present example, directional reactive ion etching (directional RIE) was used so as to remove the silicon dioxide only on the upper face.

The following figure (the figure 21 ) illustrates the SOI wafer 22 after the deposition of a photoresist layer 28 completely covering the blank. As has already been explained in relation to the figure 6 , the resin can for example be of the AZ _® 1518 type. It can be applied with a spinner at a speed of 4000 revolutions/minute so that the thickness of the layer 28 is approximately 2.6 microns.

There figure 22 illustrates the SOI wafer 22 after the production of an openwork mask by structuring the resin layer 28. In accordance with the present example, the structuring of the layer 28 is carried out by photolithography by implementing RIE etching. It will be understood that the openings of the mask are arranged so as to expose only the surfaces to be roughened. There figure 22 again shows a sacrificial layer 30 which was then deposited on the resin layer 28 and in the openings of the latter. In accordance with what has already been explained in relation to the picture 3 , the sacrificial layer 30 can for example be produced by applying photosensitive resin of the AZ _® 1518 type using a spinner at 5000 rpm.

There figure 23 illustrates the SOI wafer 22, as well as the watch component blank which is formed in the upper layer of the latter, after the transfer by DRIE etching of inhomogeneities of the sacrificial layer 30 on the places to be etched of the blank. There figure 23 further shows that the resin residues of the openwork mask 28 and of the sacrificial layer 30, as well as the C4F8 residues left by the passivation steps have been eliminated. There figure 23 finally shows that the SiO ₂ which covered the side faces of the blank has also been eliminated.

The watch component blank can finally be detached from the rest of the SOI wafer 22. To this end, the SOI wafer and the blank are immersed in a bath which contains a chemical agent which attacks the silicon dioxide while sparing the silicon. Preferably buffered hydrofluoric acid (BHF) is used.

Claims (7)

1. A method of spot etching a silicon surface (4) of a timepiece component, the method comprising the following steps

   a) forming an apertured etching mask (6; 15; 28) on the silicon surface, so that the areas of the surface to be etched are exposed;

   b) depositing a sacrificial layer (8; 18; 30) of resist on the exposed areas of the surface and on the etch mask, the sacrificial layer being formed without exposing the resist or annealing it;

   c) etching the sacrificial resin layer by deep reactive ion etching (DRIE), step c) continuing long enough to transfer inhomogeneities in the sacrificial layer onto the area of the silicon surface to be etched, so as roughen said area into an irregular relief comprising depressions and peaks, said depressions, or craters, having a depth of from about 100 nanometres to 1 micrometre.
2. The method of to claim 1, characterised in that step (c) is carried out while the temperature (Temp) of the silicon surface is allowed to rise above ambient temperature.
3. The method of claim 1, characterised in that step (c) is carried out while the temperature (Temp) of the silicon surface is allowed to rise above 30°C.
4. The method of any one of claims 1, 2 and 3, characterised in that step (c) is carried out while the temperature (Temp) of the silicon surface is allowed to rise to the point that the sacrificial layer (8; 18; 30) bakes inhomogeneously, until it is completely consumed.
5. The method of any one of the preceding claims, characterised in that step (c) is implemented while a power (LF Platen) greater than 40 Watts is provided in order to accelerate the ions in the direction perpendicular to the silicon surface during the passivation steps (DEP).
6. The method of any one of the preceding claims, characterised in that step (c) comprises the following sub-steps:

   i. reactive ion etching the sacrificial layer (8; 18; 30) and/or the silicon surface through the apertures of the mask (6; 15; 28), so as to dig into the sacrificial layer and/or the silicon surface;

   ii. depositing a chemically inert passivation layer on the surfaces exposed by the etching in the previous step;

   iii. reactive ion etching the passivation layer through the apertures of the mask, so as to expose the sacrificial layer and/or silicon surface at the bottom of the trenches deepened in the previous substep (i);

   iv. repeating the execution of a sequence of substeps comprising steps (i), (ii) and (iii) until the end of step (c).
7. A timepiece component having a silicon surface, said surface having been etched in places using the method of any one of claims 1 to 6.

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