EP3711346A1 - Procédé et appareil de synchronisation entre différents flux de paquets de données - Google Patents

Procédé et appareil de synchronisation entre différents flux de paquets de données

Info

Publication number
EP3711346A1
EP3711346A1 EP17932045.2A EP17932045A EP3711346A1 EP 3711346 A1 EP3711346 A1 EP 3711346A1 EP 17932045 A EP17932045 A EP 17932045A EP 3711346 A1 EP3711346 A1 EP 3711346A1
Authority
EP
European Patent Office
Prior art keywords
synchronization
data packets
uplink
packet
delay variation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP17932045.2A
Other languages
German (de)
English (en)
Other versions
EP3711346A4 (fr
Inventor
Xiang Xu
Yang Shen
Devaki Chandramouli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Technologies Oy
Original Assignee
Nokia Technologies Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Technologies Oy filed Critical Nokia Technologies Oy
Publication of EP3711346A1 publication Critical patent/EP3711346A1/fr
Publication of EP3711346A4 publication Critical patent/EP3711346A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/28—Flow control; Congestion control in relation to timing considerations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/34—Flow control; Congestion control ensuring sequence integrity, e.g. using sequence numbers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W28/00—Network traffic management; Network resource management
    • H04W28/02—Traffic management, e.g. flow control or congestion control
    • H04W28/0231—Traffic management, e.g. flow control or congestion control based on communication conditions
    • H04W28/0236—Traffic management, e.g. flow control or congestion control based on communication conditions radio quality, e.g. interference, losses or delay

Definitions

  • a method, apparatus and computer program product are provided for transmitting different data packet streams and, more particularly, to synchronizing the different data packet streams.
  • the core network (CN) and radio access networks (RAN) ensure a packet delay budget is met for a specific data packet (or quality of service (QoS) flow) .
  • the synchronization and packet delay variation (PDV) between related data packets may not be controlled, thereby potentially resulting in a lack of synchronization between different streams of related data packets.
  • audio and video streams of a media file may be delivered for consumption without sufficient synchronization therebetween.
  • These synchronization issues may, in turn, impair the user experience during consumption of the different streams of related data packets.
  • UE user equipment
  • DL downlink
  • This method provides synchronization, but causes additional delay that may not meet the stringent requirements for some applications. For example, in an online game, completing an action may have a strict deadline, and a latency of more than 100 millisecond can affect the experience of the user playing the game. Additionally, the current methods also require a large buffer in the UE in order to properly download and synchronize the data packets from the data packet streams.
  • Packet delay variation (PDV) or packet delay jitter is similarly handled in current telecommunication systems.
  • the RAN may not know that the PDV is larger than a threshold for a specific data packet, even if the data packet is sent to the UE within a required packet data budget (PDB) .
  • PDB packet data budget
  • a synchronization and packet delay variation (PDV) policy at a core network (CN) .
  • Other embodiments implement a synchronization and packet delay variation (PDV) policy at a user plane function (UPF) and/or radio access network (RAN) in the telecommunication system.
  • PPF user plane function
  • RAN radio access network
  • a method for providing a synchronization and packet delay variation policy at a core network includes receiving one or more synchronization and packet delay variation policy parameters from an application server to a policy control function of the core network, determining the synchronization and packet delay variation policy utilizing the one or more synchronization and packet delay variation policy parameters at the policy control function, determining a differentiated services code point value based on the synchronization and packet delay variation policy at a session management function of the core network, causing transmission of the synchronization and packet delay variation policy to a radio access network utilizing a user plane or a carrier plane, and causing transmission of the synchronization and packet delay variation policy and the differentiated services code point value to a user plane function.
  • the synchronization and packet delay variation policy parameters comprise one or more of a maximum one-way delay for packet delivery between a user equipment and the application server, a synchronization threshold between one or more data packet streams, a packet delay variation threshold for each of the one or more data packet streams, a synchronization clock for each of the one or more data packet streams, a sample rate for each of the one or more data packet streams, a real time protocol parameter, and identification information for each of the one or more streams.
  • an apparatus for providing a synchronization and packet delay variation policy at a core network comprising at least one processor and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the processor, cause the apparatus to at least: receive one or more synchronization and packet delay variation policy parameters from an application server to a policy control function of the core network, determine the synchronization and packet delay variation policy utilizing the one or more synchronization and packet delay variation policy parameters at the policy control function, determine a differentiated services code point value based on the synchronization and packet delay variation policy at a session management function of the core network, cause transmission of the synchronization and packet delay variation policy to a radio access network utilizing a user plane or a carrier plane, and cause transmission of the synchronization and packet delay variation policy and the differentiated services code point value to a user plane function.
  • the synchronization and packet delay variation policy parameters comprise one or more of: a maximum one-way delay for packet delivery between a user equipment and the application server, a synchronization threshold between two data packet streams, a packet delay variation threshold for each of the one or more data packet streams, a synchronization clock for each of the two data packet streams, a sample rate for each of the one or more data packet streams, a real time protocol parameter, and identification information for each of the one or more streams.
  • a non-transitory computer-readable storage medium for providing a synchronization and packet delay variation policy at a core network.
  • the non-transitory computer-readable storage medium storing program code instructions that, when executed, cause an apparatus to perform the method described above.
  • a method for implementing a synchronization and packet delay variation policy at a user plane function comprising: receiving the synchronization and packet delay variation policy and a differentiated services code point value from a session management function, receiving one or more data packets from one or more data streams from an application server, determining scheduling assistance information for each of the one or more packets utilizing the synchronization and packet delay variation policy, determining a transport layer differentiated services code point value based on the differentiated services code point value and the scheduling assistance information, determining a user plane function delivery sequence of the one or more data packets based on the scheduling assistance information, and causing transmission of each of the one or more data packets according to the user plane function delivery sequence to a radio access network.
  • the method further comprises: causing transmission of the scheduling assistance information with each of the one or more data packets, wherein the scheduling assistance information causes the radio access network to determine a radio access network delivery sequence and transmit the one or more data packets according to the radio access network delivery sequence.
  • the one or more data packets are received in a first order from the application server and the user plane function delivery sequence comprises a second order.
  • the first order is different than the second order.
  • the synchronization and packet delay variation policy is based on one or more synchronization and packet delay variation policy parameters and wherein the one or more synchronization and packet delay variation policy parameters comprise one or more of: a maximum one-way delay for packet delivery between a user equipment and the application server, a synchronization threshold between the one or more data packet streams, a packet delay variation threshold for each of the one or more data packet streams, a synchronization clock for each of the one or more data packet streams, a sample rate for each of the one or more data packet streams, a real time protocol parameter, and identification information for each of the one or more streams.
  • the one or more synchronization and packet delay variation policy parameters comprise one or more of: a maximum one-way delay for packet delivery between a user equipment and the application server, a synchronization threshold between the one or more data packet streams, a packet delay variation threshold for each of the one or more data packet streams, a synchronization clock for each of the one or more data packet streams, a sample rate for each of the one or more data packet streams
  • the scheduling assistance information comprises one or more scheduling parameters selected from the group consisting of: a packet transmission deadline for each of the one or more data packets, a remaining acceptable delay for each of the one or more data packets, an accumulated delay for each of the one or more data packets, a data packet synchronization relationship with one or more data packets from another data packet stream, a data packet delay variation relationship with one or more data packets from a same data packet stream, and a conflict rule, wherein the conflict rule determines which scheduling parameter will be met if one or more scheduling parameters cannot be met.
  • the method further includes receiving one or more uplink data packets from the radio access network, wherein the uplink data packets comprise timing information, determining an uplink differentiated services code point value for each of the uplink data packets utilizing the timing information, determining an user plane function uplink delivery sequence of the one or more uplink data packets based on the timing information, and causing transmission of each of the one or more uplink data packets according to the determined user plane function uplink delivery sequence to the application server.
  • the one or more uplink data packets are received in a first uplink order from the radio access network and wherein the user plane function uplink delivery sequence comprises a second uplink order.
  • the first uplink order is different than the second uplink order.
  • an apparatus for implementing a synchronization and packet delay variation policy at a user plane function comprising at least one processor and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the processor, cause the apparatus to at least: receive the synchronization and packet delay variation policy and a differentiated services code point value from a session management function, receive one or more data packets from one or more data streams from an application server, determine scheduling assistance information for each of the one or more packets utilizing the synchronization and packet delay variation policy, determine a transport layer differentiated services code point value based on the differentiated services code point value and the scheduling assistance information, determine a user plane function delivery sequence of the one or more data packets based on the scheduling assistance information, and cause transmission of each of the one or more data packets according to the user plane function delivery sequence to a radio access network.
  • the at least one memory and the computer program code are further configured to, with the processor, cause the apparatus to at least: cause transmission of the scheduling assistance information with each of the one or more data packets, wherein the scheduling assistance information causes the radio access network to determine a radio access network delivery sequence and transmit the one or more data packets according to the radio access network delivery sequence.
  • the one or more data packets are received in a first order from the application server and wherein the user plane function delivery sequence comprises a second order. In one example, wherein the first order is different than the second order.
  • the synchronization and packet delay variation policy is based on one or more synchronization and packet delay variation policy parameters and wherein the one or more synchronization and packet delay variation policy parameters comprise one or more of: a maximum one-way delay for packet delivery between a user equipment and the application server, a synchronization threshold between the one or more data packet streams, a packet delay variation threshold for each of the one or more data packet streams, a synchronization clock for each of the one or more data packet streams, a sample rate for each of the one or more data packet streams, a real time protocol parameter, and identification information for each of the one or more streams.
  • the one or more synchronization and packet delay variation policy parameters comprise one or more of: a maximum one-way delay for packet delivery between a user equipment and the application server, a synchronization threshold between the one or more data packet streams, a packet delay variation threshold for each of the one or more data packet streams, a synchronization clock for each of the one or more data packet streams, a sample rate for each of the one or more data packet streams
  • the scheduling assistance information comprises one or more scheduling parameters selected from the group consisting of: a packet transmission deadline for each of the one or more data packets, a remaining acceptable delay for each of the one or more data packets, an accumulated delay for each of the one or more data packets, a data packet synchronization relationship with one or more data packets from another data packet stream, a data packet delay variation relationship with one or more data packets from a same data packet stream, and a conflict rule, wherein the conflict rule determines which scheduling parameter will be met if one or more scheduling parameters cannot be met.
  • the at least one memory and the computer program code are further configured to, with the processor, cause the apparatus to at least: receive one or more uplink data packets from the radio access network, wherein the uplink data packets comprise timing information, determine an uplink differentiated services code point value for each of the uplink data packets utilizing the timing information, determine an user plane function uplink delivery sequence of the one or more uplink data packets based on the timing information, and cause transmission of each of the one or more uplink data packets according to the determined user plane function uplink delivery sequence to the application server.
  • the one or more uplink data packets are received in a first uplink order from the radio access network and wherein the user plane function uplink delivery sequence comprises a second uplink order.
  • the first uplink order is different than the second uplink order.
  • a non-transitory computer-readable storage medium for implementing a synchronization and packet delay variation policy at a user plane function.
  • the non-transitory computer-readable storage medium storing program code instructions that, when executed, cause an apparatus to perform the method described above.
  • a method for implementing a synchronization and packet delay variation policy at a radio access network comprising: receiving the synchronization and packet delay variation policy from a session management function, receiving one or more data packets with scheduling assistance information from one or more data packet streams from an user plane function, determining a radio access network delivery sequence of the one or more data packets based on the scheduling assistance information and quality of service information, and causing transmission of each of the one or more data packets according to the radio access network delivery sequence to a user equipment.
  • the one or more data packets are received in a first order from the user plane function and wherein the radio access network delivery sequence comprises a second order.
  • the first order is different than the second order.
  • the synchronization and packet delay variation policy is based on one or more synchronization and packet delay variation policy parameters and wherein the one or more synchronization and packet delay variation policy parameters comprise one or more of: a maximum one-way delay for packet delivery between a user equipment and an application server; a synchronization threshold between the one or more data packet streams; a packet delay variation threshold for each of the one or more data packet streams; a synchronization clock for each of the one or more data packet streams; a sample rate for each of the one or more data packet streams; a real time protocol parameter; and identification information for each of the one or more data packet streams.
  • the one or more synchronization and packet delay variation policy parameters comprise one or more of: a maximum one-way delay for packet delivery between a user equipment and an application server; a synchronization threshold between the one or more data packet streams; a packet delay variation threshold for each of the one or more data packet streams; a synchronization clock for each of the one or more data packet streams; a sample rate for each of the one or more data
  • the scheduling assistance information comprises one or more scheduling parameters selected from the group consisting of: a packet transmission deadline for each of the one or more data packets, a remaining acceptable delay for each of the one or more data packets, an accumulated delay for each of the one or more data packets, a data packet synchronization relationship with one or more data packets from another data packet stream, a data packet delay variation relationship with one or more data packets from a same data packet stream; and a conflict rule, wherein the conflict rule determines which scheduling parameter will be met if one or more scheduling parameters cannot be met.
  • the method further includes receiving one or more uplink data packets from the user equipment, wherein the one or more uplink data packets comprise timing information, determining an uplink differentiated services code point value for each of the uplink data packets utilizing the timing information, determining a radio access network uplink delivery sequence of the one or more uplink data packets based on the timing information, and causing transmission of each of the one or more uplink data packets to the user plane function according to the radio access network uplink delivery sequence.
  • the one or more uplink data packets are received in a first uplink order from the user equipment and wherein the radio access network uplink delivery sequence comprises a second uplink order.
  • the first uplink order is different than the second uplink order.
  • an apparatus for implementing a synchronization and packet delay variation policy at a radio access network comprising at least one processor and at least one memory including computer program code, the at least one memory and the computer program code configured to, with the processor, cause the apparatus to at least: receive the synchronization and packet delay variation policy from a session management function, receive one or more data packets with scheduling assistance information from one or more data packet streams from an user plane function, determine a radio access network delivery sequence of the one or more data packets based on the scheduling assistance information and quality of service information, and cause transmission of each of the one or more data packets according to the radio access network delivery sequence to a user equipment.
  • the one or more data packets are received in a first order from the user plane function and wherein the radio access network delivery sequence comprises a second order.
  • the first order is different than the second order.
  • the synchronization and packet delay variation policy is based on one or more synchronization and packet delay variation policy parameters and wherein the one or more synchronization and packet delay variation policy parameters comprise one or more of: a maximum one-way delay for packet delivery between a user equipment and an application server, a synchronization threshold between the one or more data packet streams, a packet delay variation threshold for each of the one or more data packet streams, a synchronization clock for each of the one or more data packet streams, a sample rate for each of the one or more data packet streams, a real time protocol parameter, and identification information for each of the one or more data packet streams.
  • the one or more synchronization and packet delay variation policy parameters comprise one or more of: a maximum one-way delay for packet delivery between a user equipment and an application server, a synchronization threshold between the one or more data packet streams, a packet delay variation threshold for each of the one or more data packet streams, a synchronization clock for each of the one or more data packet streams, a sample rate for each of the one or more data
  • the scheduling assistance information comprises one or more scheduling parameters selected from the group consisting of: a packet transmission deadline for each of the one or more data packets, a remaining acceptable delay for each of the one or more data packets, an accumulated delay for each of the one or more data packets, a data packet synchronization relationship with one or more data packets from another data packet stream, a data packet delay variation relationship with one or more data packets from a same data packet stream, and a conflict rule, wherein the conflict rule determines which scheduling parameter will be met if one or more scheduling parameters cannot be met.
  • the at least one memory and the computer program code are further configured to, with the processor, cause the apparatus to at least: receive one or more uplink data packets from the user equipment, wherein the one or more uplink data packets comprise timing information, determine an uplink differentiated services code point value for each of the uplink data packets utilizing the timing information, determine a radio access network uplink delivery sequence of the one or more uplink data packets based on the timing information, and cause transmission of each of the one or more uplink data packets to the user plane function according to the radio access network uplink delivery sequence.
  • the one or more uplink data packets are received in a first uplink order from the user equipment and wherein the radio access network uplink delivery sequence comprises a second uplink order.
  • the first uplink order is different than the second uplink order.
  • a non-transitory computer-readable storage medium for implementing a synchronization and packet delay variation policy at a radio access network.
  • the non-transitory computer-readable storage medium storing program code instructions that, when executed, cause an apparatus to perform the method as described above.
  • Figure 1 is a networked system in accordance with an example embodiment of the present disclosure
  • Figure 2 is an alternate view of the networked system of Figure 1 in accordance with an example embodiment of the present disclosure
  • Figure 3 is a block diagram of a core network apparatus configured in accordance with an example embodiment of the present disclosure
  • FIG. 4 is a block diagram of a radio access network apparatus configured in accordance with an example embodiment of the present disclosure
  • Figure 5 is an end-point flow chart according to an example embodiment of the present disclosure.
  • Figure 6 is a flowchart illustrating provision of a synchronization and PDV policy in accordance with an example embodiment of the present disclosure
  • Figures 7 and 9 are flowcharts illustrating implementation of a synchronization and PDV policy at a user plane function in accordance with an example embodiment of the present disclosure
  • Figure 8 is an additional end-point flow chart according to an example embodiment of the present disclosure.
  • Figures 10 and 12 are flowcharts illustrating implementation of a synchronization and PDV policy at a radio access network in accordance with an example embodiment of the present disclosure.
  • Figure 11 is an additional end-point flow chart according to an example embodiment of the present disclosure.
  • circuitry refers to (a) hardware-only circuit implementations (e.g., implementations in analog circuitry and/or digital circuitry) ; (b) combinations of circuits and computer program product (s) comprising software and/or firmware instructions stored on one or more computer readable memories that work together to cause an apparatus to perform one or more functions described herein; and (c) circuits, such as, for example, a microprocessor (s) or a portion of a microprocessor (s) , that require software or firmware for operation even if the software or firmware is not physically present.
  • This definition of ‘circuitry’ applies to all uses of this term herein, including in any claims.
  • circuitry also includes an implementation comprising one or more processors and/or portion (s) thereof and accompanying software and/or firmware.
  • a “computer-readable storage medium, ” which refers to a physical storage medium (e.g., volatile or non-volatile memory device)
  • a “computer-readable transmission medium, ” which refers to an electromagnetic signal.
  • Methods, apparatuses, and computer program products are provided in accordance with example embodiments to provide synchronization of packet data flows and control of packet delay variation in a mobile network as described herein.
  • Figure 1 is a networked system 100 in accordance with an example embodiment of the present disclosure.
  • Figure 1 specifically illustrates User Equipment (UE) 102, which may be in communication with a Radio Access Network (RAN) 104 an Access and Mobility Management Function (AMF) 108 and User Plane Function (UPF) 106.
  • the AMF 108 may, in turn, be in communication with core network services including Session Management Function (SMF) 110 and Policy Control Function (PCF) 114.
  • the core network services may also be in communication with and Application Server/Application Function (AS/AF) 112.
  • Other networked services also include Network Slice Selection Function (NSSF) 122, Authentication Server Function (AUSF) 120, User Data Management (UDM) 118, and Data Network (DN) 116.
  • NSSF Network Slice Selection Function
  • AUSF Authentication Server Function
  • UDM User Data Management
  • DN Data Network
  • the fifth generation (5G) quality of service (QoS) model supports a QoS flow based framework.
  • the QoS flow is the finest granularity of QoS differentiation in a packet data unit (PDU) session.
  • a QoS Flow ID (QFI) is used to identify a QoS flow in the 5G system.
  • User Plane traffic with the same QFI within a PDU session receives the same traffic forwarding treatment (e.g. scheduling or admission threshold) .
  • the SMF 110 performs the binding of service delivery frameworks (SDFs) to QoS flows based on the QoS and service requirements of the SDF (e.g. the received policy control and charging (PCC) rules) .
  • the SMF 110 assigns the QFI for a new QoS flow and derives its QoS profile from the information provided by the PCF 114.
  • the SMF 110 also provides the QFI together with the QoS profile to the RAN 104.
  • the SMF 110 provides the SDF template (e.g., the set of packet filters associated with the SDF received from the PCF) together with the SDF precedence, the QoS related information, and the corresponding packet marking information, e.g., the QFI, the differentiated services code point (DSCP) value and optionally the Reflective QoS Indication to the UPF 106 enabling classification, bandwidth enforcement and marking of User Plane traffic.
  • SDF template e.g., the set of packet filters associated with the SDF received from the PCF
  • the QoS related information e.g., the QFI, the differentiated services code point (DSCP) value and optionally the Reflective QoS Indication
  • incoming data packets are classified by the UPF 106 based on SDF templates according to their SDF precedence.
  • the UPF 106 conveys the classification of the User Plane traffic belonging to a QoS flow through a User Plane marking using a QFI.
  • the RAN 104 binds QoS flows to RAN resources (e.g., Data Radio Bearers of in case of 3GPP RAN) .
  • RAN resources e.g., Data Radio Bearers of in case of 3GPP RAN
  • Example one-to-one mapping of standardized 5QI values to 5G QoS characteristics are specified in Table 1.
  • the Packet Delay Budget defines an upper bound for the time that a packet may be delayed between the UE and the UPF.
  • a 20ms delay budget is assumed between the packet gateway (e.g. UPF for 5G) and a base station.
  • the remaining delay budget is for the air interface in the telecommunications network.
  • the RAN mainly considers the PDB to determine when a packet should be sent to the UE. For example, for quality class identified (QCI) 1, 80%of the PDB, i.e. 80ms, is the portion of the delay budget assigned to the air interface.
  • QCI quality class identified
  • the PDB is met as long as the RAN node can send the data at any time within an 80ms window (e.g.
  • the RAN scheduling may also consider the synchronization requirement and PDV requirement, which may change the delivery window.
  • the size of the data window might be reduced to 30 ms, (for example, 10: 00: 00.130 -10: 00: 00.160, in order to meet the requirements of PDB, synchronization, and PDV.
  • Some Internet applications use multiple service flows requiring a different QoS for each flow.
  • an online gaming application may use both a video flow or stream, and audio flow or stream, each with different QoS requirements.
  • These type of services may require synchronization between audio and video.
  • audio-video synchronization thresholds may be: [125ms -5ms] for audio delay and [45ms-5ms] for audio advance.
  • the audio stream and video stream may share the same QoS flow.
  • PDV may be considered a QoS parameter.
  • VoIP voice over IP
  • PDV can be of importance and hence VoIP transmissions may need quality of service-enabled networks to provide a high quality channel.
  • PDV that exceeds 40ms will cause severe deterioration in call quality.
  • Table 2 show example performance requirements for low some latency and high reliability scenarios.
  • the CN services and the RAN 104 ensure the packet delay budget is met for a specific data packet flow or QoS flow.
  • the use of a synchronization requirement can be used to improve the user experience.
  • RAN 104 receives audio packets A1 and A2 and video packet V1.
  • the PDB is 100ms for audio and 150ms for video.
  • the synchronization requirement is [125ms audio delay-45ms audio advance. ]
  • the RAN 104 receives audio packet A2 before video packet V1. If the RAN 104 is not aware of the synchronization requirement, it may send audio packets A1 and A2 followed by the video packet V1. All packets would be delivered within the PDB, but the lack of synchronization may have a negative effect on user experience. If, according to some example embodiments, the RAN 104 is made aware of the synchronization requirement, RAN 104 would know to send video packet V 1 before audio packet A2 to meet this requirement, thus improving the user experience..
  • the UE 102 utilizes a buffer to first store the received audio/video packets, then output these packets when the required data packets are all received, or output one when a timer expires. This example may address some synchronization issues, but it may cause additional delay that may not meet the requirements of some applications.
  • the RAN 104 may comprise a Content Awareness Function-RAN (CAF) which may inspect the DL packets, and further fine-tune the DL packet scheduling.
  • CAF Content Awareness Function-RAN
  • Many audio/video packets are sent via real time transport protocol RTP.
  • the CAF can check the timestamp information of the audio/video packets, then adjust the scheduling. But this has some issues.
  • the CAF may not know the DL packets or QoS flows are related to the same application.
  • the RTP time stamps in the video and audio streams may not be directly related to each other.
  • the audio timestamp may start from 1000, but the video RTP timestamp starts from 2000 (this is the purpose of RTP control protocol Sender Report) .
  • the CAF may not be able to determine how to sync RTP audio and video streams by looking at RTP packets alone. Also, the CAF need to perform deep packet inspection (DPI) , which is usually performed in the CN.
  • DPI deep packet inspection
  • FIG 2 is an alternate view of the system 100 of Figure 1 in accordance with an example embodiment of the present disclosure.
  • the RAN 104 and UPF 106 are a part of the synchronization and PDV services 204, which implement the synchronization and PDV policies on data packets sent from the AS/AF 112 to the UE 102.
  • a core network apparatus (including the core network services: UPF 106, AMF 108, SMF 110, and PCF 114) are depicted that may be embodied as a core network apparatus 300 as configured in accordance with an example embodiment of the present disclosure.
  • the CNA 300 of an example embodiment may be configured to perform the functions described herein.
  • the CNA 300 may more generally be embodied by a computing device, such as a server, a personal computer, a computer workstation or other type of computing device including those functioning as network equipment.
  • the apparatus of an example embodiment may be configured as shown in Figure 3 so as to include, be associated with or otherwise be in communication with processing circuitry 308 including, for example, a processor 302 and a memory device 304 and, in some embodiments, and/or a CNA communication interface 306.
  • processing circuitry 308 including, for example, a processor 302 and a memory device 304 and, in some embodiments, and/or a CNA communication interface 306.
  • the processor 302 (and/or co-processors or any other circuitry assisting or otherwise associated with the processor) may be in communication with the memory device 304 via a bus for passing information among components of the CNA 300.
  • the memory device may include, for example, one or more volatile and/or non-volatile memories.
  • the memory device may be an electronic storage device (e.g., a computer readable storage medium) comprising gates configured to store data (e.g., bits) that may be retrievable by a machine (e.g., a computing device like the processor) .
  • the memory device may be configured to store information, data, content, applications, instructions, or the like for enabling the apparatus to carry out various functions in accordance with an example embodiment of the present invention.
  • the memory device could be configured to buffer input data for processing by the processor.
  • the memory device could be configured to store instructions for execution by the processor.
  • the CNA 300 may, in some embodiments, be embodied in various computing devices as described above.
  • the apparatus may be embodied as a chip or chip set.
  • the apparatus may comprise one or more physical packages (e.g., chips) including materials, components and/or wires on a structural assembly (e.g., a baseboard) .
  • the structural assembly may provide physical strength, conservation of size, and/or limitation of electrical interaction for component circuitry included thereon.
  • the apparatus may therefore, in some cases, be configured to implement an embodiment of the present invention on a single chip or as a single “system on a chip. ”
  • a chip or chipset may constitute means for performing one or more operations for providing the functionalities described herein.
  • the processor 302 may be embodied in a number of different ways.
  • the processor may be embodied as one or more of various hardware processing means such as a coprocessor, a microprocessor, a controller, a digital signal processor (DSP) , a processing element with or without an accompanying DSP, or various other circuitry including integrated circuits such as, for example, an ASIC (application specific integrated circuit) , an FPGA (field programmable gate array) , a microcontroller unit (MCU) , a hardware accelerator, a special-purpose computer chip, or the like.
  • the processor may include one or more processing cores configured to perform independently.
  • a multi-core processor may enable multiprocessing within a single physical package.
  • the processor may include one or more processors configured in tandem via the bus to enable independent execution of instructions, pipelining and/or multithreading.
  • the processor 302 may be configured to execute instructions stored in the memory device 304 or otherwise accessible to the processor.
  • the processor may be configured to execute hard coded functionality.
  • the processor may represent an entity (e.g., physically embodied in circuitry) capable of performing operations according to an embodiment of the present disclosure while configured accordingly.
  • the processor when the processor is embodied as an ASIC, FPGA or the like, the processor may be specifically configured hardware for conducting the operations described herein.
  • the processor when the processor is embodied as an executor of instructions, the instructions may specifically configure the processor to perform the algorithms and/or operations described herein when the instructions are executed.
  • the processor may be a processor of a specific device (e.g., an encoder and/or a decoder) configured to employ an embodiment of the present invention by further configuration of the processor by instructions for performing the algorithms and/or operations described herein.
  • the processor may include, among other things, a clock, an arithmetic logic unit (ALU) and logic gates configured to support operation of the processor.
  • ALU arithmetic logic unit
  • the communication interface may be any means such as a device or circuitry embodied in either hardware or a combination of hardware and software that is configured to receive and/or transmit data from/to a network and/or any other device or module in communication with the CNA 300, such as UE, radio access network, core network services, an application server/function, a database or other storage device, etc.
  • the communication interface may include, for example, an antenna (or multiple antennas) and supporting hardware and/or software for enabling communications with a wireless communication network. Additionally or alternatively, the communication interface may include the circuitry for interacting with the antenna (s) to cause transmission of signals via the antenna (s) or to handle receipt of signals received via the antenna (s) .
  • the communication interface may alternatively or also support wired communication.
  • the communication interface may include a communication modem and/or other hardware/software for supporting communication via cable, digital subscriber line (DSL) , universal serial bus (USB) or other mechanisms.
  • DSL digital subscriber line
  • USB universal serial bus
  • an RAN 104 apparatus may be embodied as a RAN apparatus as configured in accordance with an example embodiment of the present disclosure.
  • the RAN 104 of an example embodiment may be configured to perform the functions described herein.
  • the RAN 104 may more generally be embodied by a computing device, such as a server, a personal computer, a computer workstation or other type of computing device including those functioning as radio access network equipment.
  • the apparatus of an example embodiment may be configured as shown in Figure 4 so as to include, be associated with or otherwise be in communication with processing circuitry 400 including, for example, a processor 402 and a memory device 404 and, in some embodiments, and/or a RAN communication interface 406.
  • processing circuitry 400 including, for example, a processor 402 and a memory device 404 and, in some embodiments, and/or a RAN communication interface 406.
  • the processor 402 (and/or co-processors or any other circuitry assisting or otherwise associated with the processor) may be in communication with the memory device 404 via a bus for passing information among components of the RAN 104.
  • the memory device may include, for example, one or more volatile and/or non-volatile memories.
  • the memory device may be an electronic storage device (e.g., a computer readable storage medium) comprising gates configured to store data (e.g., bits) that may be retrievable by a machine (e.g., a computing device like the processor) .
  • the memory device may be configured to store information, data, content, applications, instructions, or the like for enabling the apparatus to carry out various functions in accordance with an example embodiment of the present invention.
  • the memory device could be configured to buffer input data for processing by the processor.
  • the memory device could be configured to store instructions for execution by the processor.
  • the RAN 104 may, in some embodiments, be embodied in various computing devices as described above.
  • the apparatus may be embodied as a chip or chip set.
  • the apparatus may comprise one or more physical packages (e.g., chips) including materials, components and/or wires on a structural assembly (e.g., a baseboard) .
  • the structural assembly may provide physical strength, conservation of size, and/or limitation of electrical interaction for component circuitry included thereon.
  • the apparatus may therefore, in some cases, be configured to implement an embodiment of the present invention on a single chip or as a single “system on a chip. ”
  • a chip or chipset may constitute means for performing one or more operations for providing the functionalities described herein.
  • the processor 402 may be embodied in a number of different ways.
  • the processor may be embodied as one or more of various hardware processing means such as a coprocessor, a microprocessor, a controller, a digital signal processor (DSP) , a processing element with or without an accompanying DSP, or various other circuitry including integrated circuits such as, for example, an ASIC (application specific integrated circuit) , an FPGA (field programmable gate array) , a microcontroller unit (MCU) , a hardware accelerator, a special- purpose computer chip, or the like.
  • the processor may include one or more processing cores configured to perform independently.
  • a multi-core processor may enable multiprocessing within a single physical package.
  • the processor may include one or more processors configured in tandem via the bus to enable independent execution of instructions, pipelining and/or multithreading.
  • the processor 402 may be configured to execute instructions stored in the memory device 404 or otherwise accessible to the processor.
  • the processor may be configured to execute hard coded functionality.
  • the processor may represent an entity (e.g., physically embodied in circuitry) capable of performing operations according to an embodiment of the present disclosure while configured accordingly.
  • the processor when the processor is embodied as an ASIC, FPGA or the like, the processor may be specifically configured hardware for conducting the operations described herein.
  • the processor when the processor is embodied as an executor of instructions, the instructions may specifically configure the processor to perform the algorithms and/or operations described herein when the instructions are executed.
  • the processor may be a processor of a specific device (e.g., an encoder and/or a decoder) configured to employ an embodiment of the present invention by further configuration of the processor by instructions for performing the algorithms and/or operations described herein.
  • the processor may include, among other things, a clock, an arithmetic logic unit (ALU) and logic gates configured to support operation of the processor.
  • ALU arithmetic logic unit
  • the communication interface may be any means such as a device or circuitry embodied in either hardware or a combination of hardware and software that is configured to receive and/or transmit data from/to a network and/or any other device or module in communication with the RAN 104, such as UE, core network services, an application server/function, a database or other storage device, etc.
  • the communication interface may include, for example, an antenna (or multiple antennas) and supporting hardware and/or software for enabling communications with a wireless communication network. Additionally or alternatively, the communication interface may include the circuitry for interacting with the antenna (s) to cause transmission of signals via the antenna (s) or to handle receipt of signals received via the antenna (s) .
  • the communication interface may alternatively or also support wired communication.
  • the communication interface may include a communication modem and/or other hardware/software for supporting communication via cable, digital subscriber line (DSL) , universal serial bus (USB) or other mechanisms.
  • DSL digital subscriber line
  • USB universal serial bus
  • Figure 5 is an end-point flow chart according to an example embodiments of the present disclosure.
  • synchronization and PDV requirements may be sent from the AS/AF 112 to the PCF 114 and the SMF 110, UPF 106, and the RAN 104 via the AMF 108 as shown in operations 502a-502d.
  • Operations 504 through 532 illustrate example data packet progression through the networked system 100 according to an example embodiment described herein.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for receiving one or more synchronization and PDV policy parameters from an application server to a policy control function (PCF) 114 of the CN, such as shown by operation 502a in Figure 5.
  • PCF policy control function
  • the synchronization and PDV policy parameters comprise one or more of a maximum one-way delay for packet delivery between a user equipment and the application server; a synchronization threshold between one or more data packet streams (e.g., in the range of [125ms-5ms] for audio delayed and in the range of [45ms-5ms] for audio advanced) ; a PDV threshold for each of the one or more data packet streams (e.g., 20ms for audio stream) ; a synchronization clock (e.g., a network time protocol (NTP time) ) for each of the one or more data packet streams; a sample rate for each of the one or more data packet streams (e.g.
  • NTP time network time protocol
  • the data streams may be related in that the data packets of one data stream are required to be delivered relative to the data packets of another data packet stream.
  • the data packets of the data packets streams must be delivered relative to each other, it is of importance that they be properly synchronized so as to provide the desired user experience. For example, an audio stream and a video stream need to be delivered in a synchronized manner so that a user views a synchronized video and audio output.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for determining the synchronization and PDV policy utilizing the one or more synchronization and PDV policy parameters at the PCF, such as PCF 114.
  • a network operator provides a configuration for the policy in the PCF or in an application function (AF) , which may then provide the policy to the PCF, which in turn provides policy information to the SMF.
  • the synchronization and PDV policy may be configured in the SMF on a per application basis for well-known applications like video/audio applications.
  • the SMF will provide the synchronization and PDV policy to the RAN, UPF and if needed, towards the UE.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for determining a suggest differentiated services code point (DSCP) value based on the synchronization and PDV policy at a session management function (SMF) of the CN, such as SMF 110.
  • DSCP differentiated services code point
  • SMF session management function
  • the suggested DSCP value given by the PCF for audio packets and video packets may be “Default PHB” , which is may be best-effort traffic.
  • the UPF described below may set the DSCP to “Expedited Forwarding (EF) PHB” for this audio packet.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302, communication interface 306 or the like, for causing the transmission of the synchronization and PDV policy to a radio access network (RAN) , such as RAN 104, utilizing a user plane or a carrier plane, as shown by operation 502c of Figure 5.
  • RAN radio access network
  • the AMF 108 informs the RAN about the synchronization and PDV policy, and the information of the related data packet streams.
  • the AMF 108 may also inform the RAN 104 about the QoS Flow ID, 5G Quality Indicator (5QI) , and other networking information.
  • 5QI 5G Quality Indicator
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302, communication interface 306 or the like, for causing the transmission of the synchronization and PDV policy and the suggested DSCP value to a user plane function, such as UPF 106 as shown by operation 502b of Figure 5.
  • a user plane function such as UPF 106 as shown by operation 502b of Figure 5.
  • the operations performed are illustrated in order to implement a synchronization and packet delay variation (PDV) policy at a user plane function (UPF) , such as UPF 106 which may be embodied by a computing device such as described in relation to Figure 3.
  • the UPF may determine and adjust a downlink delivery from the UPF.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for receiving the synchronization and PDV policy and a suggested DSCP value from a session management function (SMF) , such as shown by operation 502b in Figure 5.
  • SMF session management function
  • the synchronization and PDV policy is based on one or more synchronization and PDV policy parameters.
  • the synchronization and PDV policy parameters may comprise one or more of a maximum one-way delay for packet delivery between a user equipment and the application server; a synchronization threshold between one or more data packet streams; a PDV threshold for each of the one or more data packet streams; a synchronization clock for each of the one or more data packet streams; a sample rate for each of the one or more data packet streams; a real time protocol (RTP) parameter; and/or identification information for each of the one or more streams.
  • RTP real time protocol
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for receiving one or more data packets from one or more data streams from an application server (AS) , such as AS/AF 112.
  • AS application server
  • the one or more data streams may comprise a related audio and video stream from an application such as an interactive video game or video communication application.
  • the data packets comprise an RTP packet and contain timestamp information.
  • Data packets A1, A2, from an audio data packet stream and data packet V1 from a video data packet stream may be received at UPF 106. This is also shown in Figure 8, where A1, A2, and V1 are received from the sender in AS 112 to the UPF 106 in a first order A1, A2, V1 from the AS.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for determining scheduling assistance information for each of the one or more packets utilizing the synchronization and PDV policy.
  • the scheduling assistance information comprises one or more scheduling parameters comprising a packet transmission deadline for each of the one or more data packets (e.g. data packet A1 should be transmitted to UE before 10: 00: 00: 180) ; a remaining acceptable delay for each of the one or more data packets (e.g.
  • data packet A1 can only accept additional 40ms delay and the remaining accepted delay may be implicitly covered by the suggested transmission deadline) ; an accumulated delay for each of the one or more data packets (e.g., from when the data was created, to when the data was received by the CN) ; a data packet synchronization relationship with one or more data packets from another data packet stream (e.g., video packet V1 should be transmitted to the UE in the range of [45ms-5ms] after data packet A 1 is sent to the UE and the other data packet may be identified by the GTP-U sequence number, or other new IE of the GTP-U header) ; a data packet PDV relationship with one or more data packets from a same data packet stream (e.g., audio packet A2 should be transmitted to the UE within 20-40ms after audio packet A1 is transmitted to the UE while the other data packet may be identified by the GTP-U sequence number, or other new IE of the GTP-U header) ; and a conflict rule.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302, or the like, for determining a transport layer DSCP value based on the suggested DSCP value and the scheduling assistance information.
  • the DSCP value may be different. For example, if the video packet V1 has already experienced a long delay, or close to the suggested transmission deadline, the video packet is to be treated with higher priority than other packets. Thus the DSCP value for video packet V1 is different to the suggested DSCP value.
  • the suggested DSCP value given by the PCF for audio packets and video packets may be “Default PHB” , which is may be best-effort traffic.
  • the UPF may set the DSCP to “Expedited Forwarding (EF) PHB” for this audio packet.
  • the apparatus of this example embodiment includes means, the processor 302, or the like, for determining a UPF delivery sequence of the one or more data packets based on the scheduling assistance information.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302, communication interface 306 or the like, for causing transmission of each of the one or more data packets according to the UPF delivery sequence to a radio access network (RAN) , such as RAN 104, as shown by steps 510, 512, and 514 of Figure 5.
  • the method also comprises causing transmission of the scheduling assistance information with each of the one or more data packets.
  • the scheduling assistance information causes the RAN, such as RAN 104, to determine a RAN delivery sequence and transmit the one or more data packets according to the RAN delivery sequence, such as shown in operations 516, 518, and 520 of Figure 5 and as shown in Figure 8.
  • the Scheduling Assistance Information is sent as in-band signaling, for example, it may be added in the GTP-U header when GTP-U is used between the RAN 104 and UPF 106 for the user plane.
  • the UPF delivery sequence comprises a second order.
  • the second order may be the same order as the first received order (e.g., A1, A2, V1...) .
  • the second order may be different than the second order due to the changes made by the UPF according the UPF delivery sequence.
  • the UPF 106 receives the packets A1, A2, and V! in a first order (A1, A2, V1) and the UPF delivery sequence is changed to A1, V1, A2 due to the UPF delivery sequence which is based on the synchronization and PDV policy.
  • the UPF 106 may first send the A1 to the RAN.
  • the UPF may send the V1 before A2, if the synchronization between the A1 and V1 cannot be met if not for sending the V1 before A2.
  • the UPF 106 may send A2 before the V1, if the PDV for A1 and A2 cannot be met if not for sending A2 before V1. In some examples, in case of a conflict to meet the synchronization requirement and PDV requirement, the UPF 106 sends the data packets according to the precedence rule received from CN. This allows the packets to ultimately be delivered to the UE 102 with the required PDB and synchronization times.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for receiving one or more uplink data packets from the RAN, wherein the uplink data packets comprise timing information, such as shown by operations 526 and 528 in Figure 5.
  • the timing information is based on a common timebase used by the UE 102, the RAN 104 and the CN (e.g. coordinated universal time (UTC)) .
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for determining an uplink DSCP value for each of the uplink data packets utilizing the timing information.
  • the UPF may set the uplink DSCP to “Expedited Forwarding (EF) PHB” for this delayed packet.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for determining an UPF uplink delivery sequence of the one or more uplink data packets based on the timing information.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 308, the processor 302 or the like, for causing transmission of each of the one or more uplink data packets according to the determined UPF uplink delivery sequence to the AS, such as shown by operations 530 and 532 of Figure 5.
  • the one or more uplink data packets are received in a first uplink order from the RAN 104 and the UPF uplink delivery sequence comprises a second uplink order.
  • the first uplink order is different than the second uplink order. For example, if an audio data packet has experienced a long delay (e.g.
  • the audio packet need to be treated with higher priority than other packets.
  • the UPF may also adjust the order of the data packet sent to the Application Function/Server accordingly. In this example, this audio packet may be sent first, before other data packets, to the Application Function/Server
  • the operations performed are illustrated in order to implement a synchronization and packet delay variation (PDV) policy at a user plane function (UPF) , such as UPF 106.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 400, the processor 402 or the like, for receiving the synchronization and PDV policy from a session management function (SMF) , such as shown by operation 502c in Figure 5.
  • SMF session management function
  • the synchronization and PDV policy is based on one or more synchronization and PDV policy parameters.
  • the synchronization and PDV policy parameters may comprise one or more of a maximum one-way delay for packet delivery between a user equipment and the application server; a synchronization threshold between one or more data packet streams; a PDV threshold for each of the one or more data packet streams; a synchronization clock for each of the one or more data packet streams; a sample rate for each of the one or more data packet streams; a real time protocol (RTP) parameter; and/or identification information for each of the one or more streams.
  • RTP real time protocol
  • the apparatus of this example embodiment includes means, such as the processing circuitry 400, the processor 402 or the like, for receiving one or more data packets with scheduling assistance information from one or more data packet streams from a user plane function (UPF) , such as UPF 106.
  • the one or more data streams may comprise related audio and video streams from an application such as an interactive video game or video communication application.
  • UPF user plane function
  • Data packets with scheduling assistance information A1, A2, from an audio data packet stream and data packet with scheduling assistance information V1 from a video data packet stream may be received at RAN 104.
  • the scheduling assistance information comprises one or more scheduling parameters including a packet transmission deadline for each of the one or more data packets; a remaining acceptable delay for each of the one or more data packets; an accumulated delay for each of the one or more data packets; a data packet synchronization relationship with one or more data packets from another data packet stream; a data packet PDV relationship with one or more data packets from a same data packet stream; and/or a conflict rule.
  • the conflict rule determines which scheduling parameter will be met if one or more scheduling parameters cannot be met.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 400, the processor 402 or the like, for determining a RAN delivery sequence of the one or more data packets based on the synchronization and PDV policy, the scheduling assistance information and quality of service information, such as PDB parameters.
  • the RAN 104 may send the V1 before the A2, if the synchronization between A1 and V1 cannot be met if not for sending V1 before A2.
  • A1 may be sent first if A1 is close to the transmission deadline.
  • V1 may be sent before A2, if A1 and V1 need to be synchronized. Otherwise, A1 and V1 may lose synchronization.
  • A2 may be sent before V1, if A1 and A2 need to meet the PDV. Otherwise, the PDV for A2 may not be met.
  • the RAN 104 may send the A2 before V1, if the PDV for A1 and A2 cannot be met if not for sending A2 before V1. In case of a conflict to meet the synchronization requirement and PDV requirement, the RAN 104 sends the data packets according to the precedence rule received from CN.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 400, the processor 402, or the like, for transmitting each of the one or more data packets according to the RAN delivery sequence to a user equipment (UE) .
  • the RAN delivery sequence comprises a second order.
  • the second order may be the same order as the first received order (e.g., A1, A2, V1...) .
  • the second order may be different than the second order due to the changes made by the RAN 104 according the RAN delivery sequence.
  • the RAN 104 receives the packets A1, A2, and V1 in a first order (A1, A2, V1) and the RAN delivery sequence is changed to A1, V1, A2 due to the RAN delivery sequence which is based on the synchronization and PDV policy and scheduling assistance information. This allows the packets to ultimately be delivered to the UE 102 within the required PDV and synchronization times.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 400, the processor 402 or the like, for receiving one or more uplink data packets from the UE 102 with the one or more uplink data packets comprising timing information, such as shown by operations 522 and 524 in Figure 5.
  • PDV packet delay variation
  • the apparatus of this example embodiment includes means, such as the processing circuitry 400, the processor 402 or the like, for determining an uplink DSCP value for each of the uplink data packets utilizing the timing information. For example, if an audio packet has already experienced long delay, the RAN may set the uplink DSCP to “Expedited Forwarding (EF) PHB” for this audio packet.
  • EF Expedited Forwarding
  • the apparatus of this example embodiment includes means, such as the processing circuitry 400, the processor 402 or the like, for determining a RAN uplink delivery sequence of the one or more uplink data packets based on the timing information.
  • the apparatus of this example embodiment includes means, such as the processing circuitry 400, the processor 402 or the like, for causing transmission of each of the one or more uplink data packets to the UPF according to the RAN uplink delivery sequence, such as shown by operations 526 and 528 of Figure 5.
  • a first uplink order is received from the UE 102 and the RAN uplink delivery sequence comprises a second uplink order.
  • the first uplink order is the same as the second uplink order.
  • the first uplink order is different than the second uplink order.
  • the RAN 104 considers the timing information when setting the transport layer DSCP.
  • an audio data packet has experienced long delay (e.g., from when the audio data was sampled, to when the data was received by the RAN node) , the audio packet needs to be treated with higher priority than other packets.
  • the RAN may also adjust the order of the data packet sent to the UPF accordingly. In this example, this audio packet may be sent first, before other data packets, to the UPF 106.
  • inventions are provided in accordance with certain example embodiments in order to provide a synchronization and packet delay variation policy at a core network.
  • Other embodiments implement a synchronization and packet delay variation policy at a user plane function and/or radio access network in the telecommunication system.
  • the embodiments described herein provide for handling of data packets from one or more data packet streams at the UPF and the RAN which provides for improved synchronization and PDV times for the data packets. This improved handling of the data packets decreases the buffer storage requirements of user equipment and improves the user experience.
  • Figures 6, 7, 9, 10, and 12 illustrate flowcharts of an apparatus, method, and computer program product according to example embodiments of the invention. It will be understood that each block of the flowcharts, and combinations of blocks in the flowcharts, may be implemented by various means, such as hardware, firmware, processor, circuitry, and/or other devices associated with execution of software including one or more computer program instructions. For example, one or more of the procedures described above may be embodied by computer program instructions.
  • the computer program instructions which embody the procedures described above may be stored by a memory device 304 or 404 of an apparatus employing an embodiment of the present invention and executed by processing circuitry 308 or 400, e.g., a processor 302 or 402, of the apparatus.
  • any such computer program instructions may be loaded onto a computer or other programmable apparatus (e.g., hardware) to produce a machine, such that the resulting computer or other programmable apparatus implements the functions specified in the flowchart blocks.
  • These computer program instructions may also be stored in a computer-readable memory that may direct a computer or other programmable apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture, the execution of which implements the function specified in the flowchart blocks.
  • the computer program instructions may also be loaded onto a computer or other programmable apparatus to cause a series of operations to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide operations for implementing the functions specified in the flowchart blocks.
  • blocks of the flowcharts support combinations of means for performing the specified functions and combinations of operations for performing the specified functions for performing the specified functions. It will also be understood that one or more blocks of the flowcharts, and combinations of blocks in the flowcharts, may be implemented by special purpose hardware-based computer systems which perform the specified functions, or combinations of special purpose hardware and computer instructions.
  • certain ones of the operations above may be modified or further amplified. Furthermore, in some embodiments, additional optional operations may be included. Modifications, additions, or amplifications to the operations above may be performed in any order and in any combination.

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Abstract

L'invention concerne des produits-programmes informatiques, des procédés et des appareils, permettant de fournir et de mettre en oeuvre une politique de variation de retard de paquet et de synchronisation.
EP17932045.2A 2017-11-17 2017-11-17 Procédé et appareil de synchronisation entre différents flux de paquets de données Withdrawn EP3711346A4 (fr)

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