EP3676704A4 - Method and system for predicting optimal number of threads for application running on electronic device - Google Patents

Method and system for predicting optimal number of threads for application running on electronic device Download PDF

Info

Publication number
EP3676704A4
EP3676704A4 EP18894561.2A EP18894561A EP3676704A4 EP 3676704 A4 EP3676704 A4 EP 3676704A4 EP 18894561 A EP18894561 A EP 18894561A EP 3676704 A4 EP3676704 A4 EP 3676704A4
Authority
EP
European Patent Office
Prior art keywords
threads
electronic device
application running
optimal number
predicting optimal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP18894561.2A
Other languages
German (de)
French (fr)
Other versions
EP3676704A1 (en
Inventor
Sriram NAGASWAMY
Suhas Shantaraja Palasamudram
Karthikeyan SOMANATHAN
Sandeep Palakkal
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of EP3676704A1 publication Critical patent/EP3676704A1/en
Publication of EP3676704A4 publication Critical patent/EP3676704A4/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44505—Configuring for program initiating, e.g. using registry, configuration files
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44568—Immediately runnable code
    • G06F9/44578—Preparing or optimising for loading
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G06F9/4893—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues taking into account power or heat criteria
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N7/00—Computing arrangements based on specific mathematical models
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00—Machine learning
    • G06N20/10—Machine learning using kernel methods, e.g. support vector machines [SVM]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N5/00—Computing arrangements using knowledge-based models
    • G06N5/01—Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
EP18894561.2A 2017-12-26 2018-12-12 Method and system for predicting optimal number of threads for application running on electronic device Pending EP3676704A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IN201741046612 2017-12-26
PCT/KR2018/015775 WO2019132330A1 (en) 2017-12-26 2018-12-12 Method and system for predicting optimal number of threads for application running on electronic device

Publications (2)

Publication Number Publication Date
EP3676704A1 EP3676704A1 (en) 2020-07-08
EP3676704A4 true EP3676704A4 (en) 2020-09-30

Family

ID=66950311

Family Applications (1)

Application Number Title Priority Date Filing Date
EP18894561.2A Pending EP3676704A4 (en) 2017-12-26 2018-12-12 Method and system for predicting optimal number of threads for application running on electronic device

Country Status (4)

Country Link
US (1) US11347557B2 (en)
EP (1) EP3676704A4 (en)
CN (1) CN111542808B (en)
WO (1) WO2019132330A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111324387A (en) * 2020-01-20 2020-06-23 北京无限光场科技有限公司 Application task control method, device, terminal and system
KR20240038165A (en) * 2020-08-21 2024-03-22 주식회사 딥엑스 Electronic devices configured to perform inference operations

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WO2011025720A1 (en) * 2009-08-28 2011-03-03 Advanced Micro Devices, Inc. Optimized thread scheduling via hardware performance monitoring
US20120151494A1 (en) * 2008-07-31 2012-06-14 International Business Machines Corporation Method for determining a number of threads to maximize utilization of a system

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US20020046230A1 (en) * 1998-04-29 2002-04-18 Daniel J. Dieterich Method for scheduling thread execution on a limited number of operating system threads
US6182210B1 (en) * 1997-12-16 2001-01-30 Intel Corporation Processor having multiple program counters and trace buffers outside an execution pipeline
US6477561B1 (en) * 1998-06-11 2002-11-05 Microsoft Corporation Thread optimization
US7137117B2 (en) * 2000-06-02 2006-11-14 Microsoft Corporation Dynamically variable idle time thread scheduling
US7363626B2 (en) * 2003-03-24 2008-04-22 Sun Microsystems, Inc. Thread level application partitioning
US7363369B2 (en) * 2003-10-16 2008-04-22 International Business Machines Corporation Monitoring thread usage to dynamically control a thread pool
CN101091164A (en) * 2004-05-20 2007-12-19 Bea系统公司 System and method for application server with self-tuned threading model
US7681196B2 (en) * 2004-11-18 2010-03-16 Oracle International Corporation Providing optimal number of threads to applications performing multi-tasking using threads
US8413151B1 (en) * 2007-12-19 2013-04-02 Nvidia Corporation Selective thread spawning within a multi-threaded processing system
US8954977B2 (en) * 2008-12-09 2015-02-10 Intel Corporation Software-based thread remapping for power savings
US8881157B2 (en) * 2009-09-11 2014-11-04 Empire Technology Development Llc Allocating threads to cores based on threads falling behind thread completion target deadline
US9594599B1 (en) * 2009-10-14 2017-03-14 Nvidia Corporation Method and system for distributing work batches to processing units based on a number of enabled streaming multiprocessors
KR20110089649A (en) * 2010-02-01 2011-08-09 삼성전자주식회사 Apparatus for parallel computing and the method thereof
JP5772948B2 (en) * 2011-03-17 2015-09-02 富士通株式会社 System and scheduling method
US9043788B2 (en) * 2012-08-10 2015-05-26 Concurix Corporation Experiment manager for manycore systems
CN103294550B (en) * 2013-05-29 2016-08-10 中国科学院计算技术研究所 A kind of heterogeneous polynuclear thread scheduling method, system and heterogeneous multi-nucleus processor
US9563474B2 (en) * 2013-06-13 2017-02-07 Wipro Limited Methods for managing threads within an application and devices thereof
US9342374B2 (en) * 2013-06-28 2016-05-17 Dell Products, L.P. Method of scheduling threads for execution on multiple processors within an information handling system
US20160077871A1 (en) * 2014-09-17 2016-03-17 Advanced Micro Devices, Inc. Predictive management of heterogeneous processing systems
US9424092B2 (en) * 2014-09-26 2016-08-23 Microsoft Technology Licensing, Llc Heterogeneous thread scheduling
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US20120151494A1 (en) * 2008-07-31 2012-06-14 International Business Machines Corporation Method for determining a number of threads to maximize utilization of a system
WO2011025720A1 (en) * 2009-08-28 2011-03-03 Advanced Micro Devices, Inc. Optimized thread scheduling via hardware performance monitoring

Non-Patent Citations (2)

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Title
See also references of WO2019132330A1 *
TARVO ALEXANDER ET AL: "Automatic performance prediction of multithreaded programs: a simulation approach", AUTOMATED SOFTWARE ENGINEERING, SPRINGER US, BOSTON, vol. 25, no. 1, 28 March 2017 (2017-03-28), pages 101 - 155, XP036402532, ISSN: 0928-8910, [retrieved on 20170328], DOI: 10.1007/S10515-017-0214-5 *

Also Published As

Publication number Publication date
CN111542808A (en) 2020-08-14
US20190196874A1 (en) 2019-06-27
US11347557B2 (en) 2022-05-31
CN111542808B (en) 2024-03-22
EP3676704A1 (en) 2020-07-08
WO2019132330A1 (en) 2019-07-04

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